Coverage Report

Created: 2023-06-12 08:35

/__w/smoldot/smoldot/repo/target/debug/build/cranelift-codegen-052ae5702e81f100/out/isle_x64.rs
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Source (jump to first uncovered line)
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// GENERATED BY ISLE. DO NOT EDIT!
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//
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// Generated automatically from the instruction-selection DSL code in:
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// - src/prelude.isle
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// - src/prelude_lower.isle
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// - src/isa/x64/inst.isle
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// - src/isa/x64/lower.isle
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// - /__w/smoldot/smoldot/repo/target/debug/build/cranelift-codegen-052ae5702e81f100/out/clif_lower.isle
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use super::*;  // Pulls in all external types.
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use std::marker::PhantomData;
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/// Context during lowering: an implementation of this trait
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/// must be provided with all external constructors and extractors.
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/// A mutable borrow is passed along through all lowering logic.
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pub trait Context {
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    fn unit(&mut self, ) -> Unit;
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    fn value_type(&mut self, arg0: Value) -> Type;
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    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
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    fn offset32(&mut self, arg0: Offset32) -> u32;
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    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
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    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
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    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
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    fn simm32(&mut self, arg0: Imm64) -> Option<u32>;
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    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
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    fn u8_as_u32(&mut self, arg0: u8) -> u32;
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    fn u8_as_u64(&mut self, arg0: u8) -> u64;
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    fn u16_as_u64(&mut self, arg0: u16) -> u64;
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    fn u32_as_u64(&mut self, arg0: u32) -> u64;
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    fn i64_as_u64(&mut self, arg0: i64) -> u64;
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    fn i64_neg(&mut self, arg0: i64) -> i64;
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    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
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    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
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    fn u64_as_i32(&mut self, arg0: u64) -> i32;
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    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
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    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
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    fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>;
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    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
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    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
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    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
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    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
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    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
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    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
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    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
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    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
46
    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
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    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
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    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
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    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
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    fn u64_not(&mut self, arg0: u64) -> u64;
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    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
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    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
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    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
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    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
55
    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
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    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
57
    fn u64_is_zero(&mut self, arg0: u64) -> bool;
58
    fn u64_is_odd(&mut self, arg0: u64) -> bool;
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    fn ty_umin(&mut self, arg0: Type) -> u64;
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    fn ty_umax(&mut self, arg0: Type) -> u64;
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    fn ty_smin(&mut self, arg0: Type) -> u64;
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    fn ty_smax(&mut self, arg0: Type) -> u64;
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    fn ty_bits(&mut self, arg0: Type) -> u8;
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    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
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    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
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    fn ty_mask(&mut self, arg0: Type) -> u64;
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    fn ty_bytes(&mut self, arg0: Type) -> u16;
68
    fn lane_type(&mut self, arg0: Type) -> Type;
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    fn mem_flags_trusted(&mut self, ) -> MemFlags;
70
    fn intcc_reverse(&mut self, arg0: &IntCC) -> IntCC;
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    fn intcc_inverse(&mut self, arg0: &IntCC) -> IntCC;
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    fn floatcc_reverse(&mut self, arg0: &FloatCC) -> FloatCC;
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    fn floatcc_inverse(&mut self, arg0: &FloatCC) -> FloatCC;
74
    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
75
    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
76
    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
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    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
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    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
80
    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
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    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
86
    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
89
    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
92
    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
93
    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
94
    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
95
    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
97
    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
101
    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
102
    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
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    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
104
    fn u64_from_bool(&mut self, arg0: bool) -> u64;
105
    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
106
    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
107
    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
108
    fn imm64(&mut self, arg0: u64) -> Imm64;
109
    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
110
    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
111
    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
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    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
113
    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
114
    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
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    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
116
    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
117
    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
118
    fn offset32_to_u32(&mut self, arg0: Offset32) -> u32;
119
    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
120
    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
121
    fn trap_code_division_by_zero(&mut self, ) -> TrapCode;
122
    fn trap_code_integer_overflow(&mut self, ) -> TrapCode;
123
    fn trap_code_bad_conversion_to_integer(&mut self, ) -> TrapCode;
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    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
125
    fn range_view(&mut self, arg0: Range) -> RangeView;
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    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
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    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
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    fn value_regs_invalid(&mut self, ) -> ValueRegs;
129
    fn output_none(&mut self, ) -> InstOutput;
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    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
131
    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
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    fn output_builder_new(&mut self, ) -> InstOutputBuilder;
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    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
134
    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
135
    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
136
    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
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    fn invalid_reg(&mut self, ) -> Reg;
138
    fn mark_value_used(&mut self, arg0: Value) -> Unit;
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    fn put_in_reg(&mut self, arg0: Value) -> Reg;
140
    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
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    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
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    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
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    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
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    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
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    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
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    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
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    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
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    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
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    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
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    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
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    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
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    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
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    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
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    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
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    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
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    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
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    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
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    fn emit(&mut self, arg0: &MInst) -> Unit;
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    fn sink_inst(&mut self, arg0: Inst) -> Unit;
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    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
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    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
162
    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
163
    fn tls_model(&mut self, arg0: Type) -> TlsModel;
164
    fn tls_model_is_elf_gd(&mut self, ) -> Option<Unit>;
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    fn tls_model_is_macho(&mut self, ) -> Option<Unit>;
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    fn tls_model_is_coff(&mut self, ) -> Option<Unit>;
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    fn preserve_frame_pointers(&mut self, ) -> Option<Unit>;
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    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
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    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
170
    fn symbol_value_data(&mut self, arg0: GlobalValue) -> Option<(ExternalName, RelocDistance, i64)>;
171
    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
172
    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
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    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
174
    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
175
    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
176
    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
177
    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
178
    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
179
    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
180
    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
181
    fn abi_num_args(&mut self, arg0: Sig) -> usize;
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    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
183
    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
184
    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
185
    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
186
    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
187
    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
188
    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
189
    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
190
    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
191
    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
192
    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
193
    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
194
    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
195
    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
196
    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
197
    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
198
    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
199
    fn jump_table_size(&mut self, arg0: &BoxVecMachLabel) -> u32;
200
    fn single_target(&mut self, arg0: &MachLabelSlice) -> Option<MachLabel>;
201
    fn two_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, MachLabel)>;
202
    fn jump_table_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, BoxVecMachLabel)>;
203
    fn operand_size_of_type_32_64(&mut self, arg0: Type) -> OperandSize;
204
    fn raw_operand_size_of_type(&mut self, arg0: Type) -> OperandSize;
205
    fn put_in_reg_mem_imm(&mut self, arg0: Value) -> RegMemImm;
206
    fn put_in_reg_mem(&mut self, arg0: Value) -> RegMem;
207
    fn synthetic_amode_to_reg_mem(&mut self, arg0: &SyntheticAmode) -> RegMem;
208
    fn amode_to_synthetic_amode(&mut self, arg0: &Amode) -> SyntheticAmode;
209
    fn amode_with_flags(&mut self, arg0: &Amode, arg1: MemFlags) -> Amode;
210
    fn amode_imm_reg(&mut self, arg0: u32, arg1: Gpr) -> Amode;
211
    fn amode_imm_reg_reg_shift(&mut self, arg0: u32, arg1: Gpr, arg2: Gpr, arg3: u8) -> Amode;
212
    fn sum_extend_fits_in_32_bits(&mut self, arg0: Type, arg1: Imm64, arg2: Offset32) -> Option<u32>;
213
    fn amode_offset(&mut self, arg0: &Amode, arg1: u32) -> Amode;
214
    fn zero_offset(&mut self, ) -> Offset32;
215
    fn intcc_to_cc(&mut self, arg0: &IntCC) -> CC;
216
    fn cc_invert(&mut self, arg0: &CC) -> CC;
217
    fn cc_nz_or_z(&mut self, arg0: &CC) -> Option<CC>;
218
    fn encode_fcmp_imm(&mut self, arg0: &FcmpImm) -> u8;
219
    fn encode_round_imm(&mut self, arg0: &RoundImm) -> u8;
220
    fn imm8_reg_to_imm8_gpr(&mut self, arg0: &Imm8Reg) -> Imm8Gpr;
221
    fn writable_gpr_to_reg(&mut self, arg0: WritableGpr) -> WritableReg;
222
    fn writable_xmm_to_reg(&mut self, arg0: WritableXmm) -> WritableReg;
223
    fn writable_reg_to_xmm(&mut self, arg0: WritableReg) -> WritableXmm;
224
    fn writable_xmm_to_xmm(&mut self, arg0: WritableXmm) -> Xmm;
225
    fn writable_gpr_to_gpr(&mut self, arg0: WritableGpr) -> Gpr;
226
    fn gpr_to_reg(&mut self, arg0: Gpr) -> Reg;
227
    fn gpr_to_gpr_mem(&mut self, arg0: Gpr) -> GprMem;
228
    fn gpr_to_gpr_mem_imm(&mut self, arg0: Gpr) -> GprMemImm;
229
    fn xmm_to_reg(&mut self, arg0: Xmm) -> Reg;
230
    fn xmm_to_xmm_mem_imm(&mut self, arg0: Xmm) -> XmmMemImm;
231
    fn xmm_mem_to_xmm_mem_imm(&mut self, arg0: &XmmMem) -> XmmMemImm;
232
    fn xmm_mem_to_xmm_mem_aligned(&mut self, arg0: &XmmMem) -> XmmMemAligned;
233
    fn xmm_mem_imm_to_xmm_mem_aligned_imm(&mut self, arg0: &XmmMemImm) -> XmmMemAlignedImm;
234
    fn temp_writable_gpr(&mut self, ) -> WritableGpr;
235
    fn temp_writable_xmm(&mut self, ) -> WritableXmm;
236
    fn reg_mem_to_xmm_mem(&mut self, arg0: &RegMem) -> XmmMem;
237
    fn reg_to_reg_mem_imm(&mut self, arg0: Reg) -> RegMemImm;
238
    fn gpr_mem_imm_new(&mut self, arg0: &RegMemImm) -> GprMemImm;
239
    fn xmm_mem_imm_new(&mut self, arg0: &RegMemImm) -> XmmMemImm;
240
    fn xmm_to_xmm_mem(&mut self, arg0: Xmm) -> XmmMem;
241
    fn xmm_mem_to_reg_mem(&mut self, arg0: &XmmMem) -> RegMem;
242
    fn gpr_mem_to_reg_mem(&mut self, arg0: &GprMem) -> RegMem;
243
    fn xmm_new(&mut self, arg0: Reg) -> Xmm;
244
    fn gpr_new(&mut self, arg0: Reg) -> Gpr;
245
    fn reg_mem_to_gpr_mem(&mut self, arg0: &RegMem) -> GprMem;
246
    fn reg_to_gpr_mem(&mut self, arg0: Reg) -> GprMem;
247
    fn put_in_xmm_mem(&mut self, arg0: Value) -> XmmMem;
248
    fn put_in_xmm_mem_imm(&mut self, arg0: Value) -> XmmMemImm;
249
    fn gpr_to_imm8_gpr(&mut self, arg0: Gpr) -> Imm8Gpr;
250
    fn imm8_to_imm8_gpr(&mut self, arg0: u8) -> Imm8Gpr;
251
    fn xmi_imm(&mut self, arg0: u32) -> XmmMemImm;
252
    fn intcc_without_eq(&mut self, arg0: &IntCC) -> IntCC;
253
    fn type_register_class(&mut self, arg0: Type) -> Option<RegisterClass>;
254
    fn avx512vl_enabled(&mut self, arg0: Type) -> bool;
255
    fn avx512dq_enabled(&mut self, arg0: Type) -> bool;
256
    fn avx512f_enabled(&mut self, arg0: Type) -> bool;
257
    fn avx512bitalg_enabled(&mut self, arg0: Type) -> bool;
258
    fn avx512vbmi_enabled(&mut self, arg0: Type) -> bool;
259
    fn use_lzcnt(&mut self, arg0: Type) -> bool;
260
    fn use_bmi1(&mut self, arg0: Type) -> bool;
261
    fn use_popcnt(&mut self, arg0: Type) -> bool;
262
    fn use_fma(&mut self, ) -> bool;
263
    fn use_sse41(&mut self, ) -> bool;
264
    fn use_sse42(&mut self, ) -> bool;
265
    fn use_avx_simd(&mut self, ) -> bool;
266
    fn use_avx2_simd(&mut self, ) -> bool;
267
    fn imm8_from_value(&mut self, arg0: Value) -> Option<Imm8Reg>;
268
    fn const_to_type_masked_imm8(&mut self, arg0: u64, arg1: Type) -> Imm8Gpr;
269
    fn shift_mask(&mut self, arg0: Type) -> u32;
270
    fn shift_amount_masked(&mut self, arg0: Type, arg1: Imm64) -> u32;
271
    fn simm32_from_value(&mut self, arg0: Value) -> Option<GprMemImm>;
272
    fn simm32_from_imm64(&mut self, arg0: Imm64) -> Option<GprMemImm>;
273
    fn sinkable_load(&mut self, arg0: Value) -> Option<SinkableLoad>;
274
    fn sinkable_load_exact(&mut self, arg0: Value) -> Option<SinkableLoad>;
275
    fn sink_load(&mut self, arg0: &SinkableLoad) -> SyntheticAmode;
276
    fn ext_mode(&mut self, arg0: u16, arg1: u16) -> ExtMode;
277
    fn gen_call(&mut self, arg0: SigRef, arg1: ExternalName, arg2: RelocDistance, arg3: ValueSlice) -> InstOutput;
278
    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
279
    fn nonzero_u64_fits_in_u32(&mut self, arg0: u64) -> Option<u64>;
280
    fn fcvt_uint_mask_const(&mut self, ) -> VCodeConstant;
281
    fn fcvt_uint_mask_high_const(&mut self, ) -> VCodeConstant;
282
    fn iadd_pairwise_mul_const_16(&mut self, ) -> VCodeConstant;
283
    fn iadd_pairwise_mul_const_32(&mut self, ) -> VCodeConstant;
284
    fn iadd_pairwise_xor_const_32(&mut self, ) -> VCodeConstant;
285
    fn iadd_pairwise_addd_const_32(&mut self, ) -> VCodeConstant;
286
    fn snarrow_umax_mask(&mut self, ) -> VCodeConstant;
287
    fn ty_int_bool_or_ref(&mut self, arg0: Type) -> Option<()>;
288
    fn atomic_rmw_op_to_mach_atomic_rmw_op(&mut self, arg0: &AtomicRmwOp) -> MachAtomicRmwOp;
289
    fn shuffle_0_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
290
    fn shuffle_0_15_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
291
    fn shuffle_16_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
292
    fn perm_from_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
293
    fn perm_from_mask_with_zeros(&mut self, arg0: &VecMask) -> Option<(VCodeConstant, VCodeConstant)>;
294
    fn swizzle_zero_mask(&mut self, ) -> VCodeConstant;
295
    fn sqmul_round_sat_mask(&mut self, ) -> VCodeConstant;
296
    fn uunarrow_umax_mask(&mut self, ) -> VCodeConstant;
297
    fn uunarrow_uint_mask(&mut self, ) -> VCodeConstant;
298
    fn const_to_synthetic_amode(&mut self, arg0: VCodeConstant) -> SyntheticAmode;
299
    fn preg_rbp(&mut self, ) -> PReg;
300
    fn preg_rsp(&mut self, ) -> PReg;
301
    fn preg_pinned(&mut self, ) -> PReg;
302
    fn libcall_1(&mut self, arg0: &LibCall, arg1: Reg) -> Reg;
303
    fn libcall_3(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg, arg3: Reg) -> Reg;
304
    fn ishl_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
305
    fn ishl_i8x16_mask_table(&mut self, ) -> SyntheticAmode;
306
    fn ushr_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
307
    fn ushr_i8x16_mask_table(&mut self, ) -> SyntheticAmode;
308
    fn vconst_all_ones_or_all_zeros(&mut self, arg0: Constant) -> Option<()>;
309
    fn sse_insertps_lane_imm(&mut self, arg0: u8) -> u8;
310
    fn popcount_4bit_table(&mut self, ) -> VCodeConstant;
311
    fn popcount_low_mask(&mut self, ) -> VCodeConstant;
312
    fn pblendw_imm(&mut self, arg0: Immediate) -> Option<u8>;
313
    fn palignr_imm_from_immediate(&mut self, arg0: Immediate) -> Option<u8>;
314
    fn pshuflw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
315
    fn pshuflw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
316
    fn pshufhw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
317
    fn pshufhw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
318
    fn pshufd_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
319
    fn pshufd_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
320
    fn shufps_imm(&mut self, arg0: Immediate) -> Option<u8>;
321
    fn shufps_rev_imm(&mut self, arg0: Immediate) -> Option<u8>;
322
    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
323
    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
324
    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
325
    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
326
    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
327
    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
328
}
329
330
           pub trait ContextIter {
331
               type Context;
332
               type Output;
333
               fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
334
           }
335
336
           pub struct ContextIterWrapper<Item, I: Iterator < Item = Item>, C: Context> {
337
               iter: I,
338
               _ctx: PhantomData<C>,
339
           }
340
           impl<Item, I: Iterator<Item = Item>, C: Context> From<I> for ContextIterWrapper<Item, I, C> {
341
0
               fn from(iter: I) -> Self {
342
0
                   Self { iter, _ctx: PhantomData }
343
0
               }
344
           }
345
           impl<Item, I: Iterator<Item = Item>, C: Context> ContextIter for ContextIterWrapper<Item, I, C> {
346
               type Context = C;
347
               type Output = Item;
348
0
               fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
349
0
                   self.iter.next()
350
0
               }
351
           }
352
           
353
354
/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
355
0
#[derive(Clone, Debug)]
356
pub enum MultiReg {
357
    Empty,
358
    One {
359
        a: Reg,
360
    },
361
    Two {
362
        a: Reg,
363
        b: Reg,
364
    },
365
    Three {
366
        a: Reg,
367
        b: Reg,
368
        c: Reg,
369
    },
370
    Four {
371
        a: Reg,
372
        b: Reg,
373
        c: Reg,
374
        d: Reg,
375
    },
376
}
377
378
/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 308.
379
214k
#[derive(Clone, 
D0
ebu
g0
)]
380
pub enum SideEffectNoResult {
381
    Inst {
382
        inst: MInst,
383
    },
384
    Inst2 {
385
        inst1: MInst,
386
        inst2: MInst,
387
    },
388
    Inst3 {
389
        inst1: MInst,
390
        inst2: MInst,
391
        inst3: MInst,
392
    },
393
}
394
395
/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 350.
396
942k
#[derive(Clone, 
D0
ebu
g0
)]
397
pub enum ProducesFlags {
398
    AlreadyExistingFlags,
399
    ProducesFlagsSideEffect {
400
        inst: MInst,
401
    },
402
    ProducesFlagsTwiceSideEffect {
403
        inst1: MInst,
404
        inst2: MInst,
405
    },
406
    ProducesFlagsReturnsReg {
407
        inst: MInst,
408
        result: Reg,
409
    },
410
    ProducesFlagsReturnsResultWithConsumer {
411
        inst: MInst,
412
        result: Reg,
413
    },
414
}
415
416
/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 369.
417
0
#[derive(Clone, Debug)]
418
pub enum ConsumesAndProducesFlags {
419
    SideEffect {
420
        inst: MInst,
421
    },
422
    ReturnsReg {
423
        inst: MInst,
424
        result: Reg,
425
    },
426
}
427
428
/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 377.
429
13.4k
#[derive(Clone, 
D0
ebu
g0
)]
430
pub enum ConsumesFlags {
431
    ConsumesFlagsSideEffect {
432
        inst: MInst,
433
    },
434
    ConsumesFlagsSideEffect2 {
435
        inst1: MInst,
436
        inst2: MInst,
437
    },
438
    ConsumesFlagsReturnsResultWithProducer {
439
        inst: MInst,
440
        result: Reg,
441
    },
442
    ConsumesFlagsReturnsReg {
443
        inst: MInst,
444
        result: Reg,
445
    },
446
    ConsumesFlagsTwiceReturnsValueRegs {
447
        inst1: MInst,
448
        inst2: MInst,
449
        result: ValueRegs,
450
    },
451
    ConsumesFlagsFourTimesReturnsValueRegs {
452
        inst1: MInst,
453
        inst2: MInst,
454
        inst3: MInst,
455
        inst4: MInst,
456
        result: ValueRegs,
457
    },
458
}
459
460
/// Internal type MInst: defined at src/isa/x64/inst.isle line 8.
461
5.66M
#[derive(Clone)]
462
pub enum MInst {
463
    Nop {
464
        len: u8,
465
    },
466
    AluRmiR {
467
        size: OperandSize,
468
        op: AluRmiROpcode,
469
        src1: Gpr,
470
        src2: GprMemImm,
471
        dst: WritableGpr,
472
    },
473
    AluRM {
474
        size: OperandSize,
475
        op: AluRmiROpcode,
476
        src1_dst: SyntheticAmode,
477
        src2: Gpr,
478
    },
479
    AluRmRVex {
480
        size: OperandSize,
481
        op: AluRmROpcode,
482
        src1: Gpr,
483
        src2: Gpr,
484
        dst: WritableGpr,
485
    },
486
    AluConstOp {
487
        op: AluRmiROpcode,
488
        size: OperandSize,
489
        dst: WritableGpr,
490
    },
491
    UnaryRmR {
492
        size: OperandSize,
493
        op: UnaryRmROpcode,
494
        src: GprMem,
495
        dst: WritableGpr,
496
    },
497
    Not {
498
        size: OperandSize,
499
        src: Gpr,
500
        dst: WritableGpr,
501
    },
502
    Neg {
503
        size: OperandSize,
504
        src: Gpr,
505
        dst: WritableGpr,
506
    },
507
    Div {
508
        size: OperandSize,
509
        sign: DivSignedness,
510
        trap: TrapCode,
511
        divisor: GprMem,
512
        dividend_lo: Gpr,
513
        dividend_hi: Gpr,
514
        dst_quotient: WritableGpr,
515
        dst_remainder: WritableGpr,
516
    },
517
    Div8 {
518
        sign: DivSignedness,
519
        trap: TrapCode,
520
        divisor: GprMem,
521
        dividend: Gpr,
522
        dst: WritableGpr,
523
    },
524
    MulHi {
525
        size: OperandSize,
526
        signed: bool,
527
        src1: Gpr,
528
        src2: GprMem,
529
        dst_lo: WritableGpr,
530
        dst_hi: WritableGpr,
531
    },
532
    UMulLo {
533
        size: OperandSize,
534
        src1: Gpr,
535
        src2: GprMem,
536
        dst: WritableGpr,
537
    },
538
    CheckedSRemSeq {
539
        size: OperandSize,
540
        dividend_lo: Gpr,
541
        dividend_hi: Gpr,
542
        divisor: Gpr,
543
        dst_quotient: WritableGpr,
544
        dst_remainder: WritableGpr,
545
    },
546
    CheckedSRemSeq8 {
547
        dividend: Gpr,
548
        divisor: Gpr,
549
        dst: WritableGpr,
550
    },
551
    SignExtendData {
552
        size: OperandSize,
553
        src: Gpr,
554
        dst: WritableGpr,
555
    },
556
    Imm {
557
        dst_size: OperandSize,
558
        simm64: u64,
559
        dst: WritableGpr,
560
    },
561
    MovRR {
562
        size: OperandSize,
563
        src: Gpr,
564
        dst: WritableGpr,
565
    },
566
    MovFromPReg {
567
        src: PReg,
568
        dst: WritableGpr,
569
    },
570
    MovToPReg {
571
        src: Gpr,
572
        dst: PReg,
573
    },
574
    MovzxRmR {
575
        ext_mode: ExtMode,
576
        src: GprMem,
577
        dst: WritableGpr,
578
    },
579
    Mov64MR {
580
        src: SyntheticAmode,
581
        dst: WritableGpr,
582
    },
583
    LoadEffectiveAddress {
584
        addr: SyntheticAmode,
585
        dst: WritableGpr,
586
    },
587
    MovsxRmR {
588
        ext_mode: ExtMode,
589
        src: GprMem,
590
        dst: WritableGpr,
591
    },
592
    MovImmM {
593
        size: OperandSize,
594
        simm64: u64,
595
        dst: SyntheticAmode,
596
    },
597
    MovRM {
598
        size: OperandSize,
599
        src: Gpr,
600
        dst: SyntheticAmode,
601
    },
602
    ShiftR {
603
        size: OperandSize,
604
        kind: ShiftKind,
605
        src: Gpr,
606
        num_bits: Imm8Gpr,
607
        dst: WritableGpr,
608
    },
609
    XmmRmiReg {
610
        opcode: SseOpcode,
611
        src1: Xmm,
612
        src2: XmmMemAlignedImm,
613
        dst: WritableXmm,
614
    },
615
    CmpRmiR {
616
        size: OperandSize,
617
        opcode: CmpOpcode,
618
        src: GprMemImm,
619
        dst: Gpr,
620
    },
621
    Setcc {
622
        cc: CC,
623
        dst: WritableGpr,
624
    },
625
    Bswap {
626
        size: OperandSize,
627
        src: Gpr,
628
        dst: WritableGpr,
629
    },
630
    Cmove {
631
        size: OperandSize,
632
        cc: CC,
633
        consequent: GprMem,
634
        alternative: Gpr,
635
        dst: WritableGpr,
636
    },
637
    XmmCmove {
638
        ty: Type,
639
        cc: CC,
640
        consequent: XmmMemAligned,
641
        alternative: Xmm,
642
        dst: WritableXmm,
643
    },
644
    Push64 {
645
        src: GprMemImm,
646
    },
647
    Pop64 {
648
        dst: WritableGpr,
649
    },
650
    StackProbeLoop {
651
        tmp: WritableReg,
652
        frame_size: u32,
653
        guard_size: u32,
654
    },
655
    XmmRmR {
656
        op: SseOpcode,
657
        src1: Xmm,
658
        src2: XmmMemAligned,
659
        dst: WritableXmm,
660
    },
661
    XmmRmRUnaligned {
662
        op: SseOpcode,
663
        src1: Xmm,
664
        src2: XmmMem,
665
        dst: WritableXmm,
666
    },
667
    XmmRmRBlend {
668
        op: SseOpcode,
669
        src1: Xmm,
670
        src2: XmmMemAligned,
671
        mask: Xmm,
672
        dst: WritableXmm,
673
    },
674
    XmmRmiRVex {
675
        op: AvxOpcode,
676
        src1: Xmm,
677
        src2: XmmMemImm,
678
        dst: WritableXmm,
679
    },
680
    XmmRmRImmVex {
681
        op: AvxOpcode,
682
        src1: Xmm,
683
        src2: XmmMem,
684
        dst: WritableXmm,
685
        imm: u8,
686
    },
687
    XmmVexPinsr {
688
        op: AvxOpcode,
689
        src1: Xmm,
690
        src2: GprMem,
691
        dst: WritableXmm,
692
        imm: u8,
693
    },
694
    XmmRmRVex3 {
695
        op: AvxOpcode,
696
        src1: Xmm,
697
        src2: Xmm,
698
        src3: XmmMem,
699
        dst: WritableXmm,
700
    },
701
    XmmRmRBlendVex {
702
        op: AvxOpcode,
703
        src1: Xmm,
704
        src2: XmmMem,
705
        mask: Xmm,
706
        dst: WritableXmm,
707
    },
708
    XmmUnaryRmRVex {
709
        op: AvxOpcode,
710
        src: XmmMem,
711
        dst: WritableXmm,
712
    },
713
    XmmUnaryRmRImmVex {
714
        op: AvxOpcode,
715
        src: XmmMem,
716
        dst: WritableXmm,
717
        imm: u8,
718
    },
719
    XmmMovRMVex {
720
        op: AvxOpcode,
721
        src: Xmm,
722
        dst: SyntheticAmode,
723
    },
724
    XmmMovRMImmVex {
725
        op: AvxOpcode,
726
        src: Xmm,
727
        dst: SyntheticAmode,
728
        imm: u8,
729
    },
730
    XmmToGprImmVex {
731
        op: AvxOpcode,
732
        src: Xmm,
733
        dst: WritableGpr,
734
        imm: u8,
735
    },
736
    GprToXmmVex {
737
        op: AvxOpcode,
738
        src: GprMem,
739
        dst: WritableXmm,
740
        src_size: OperandSize,
741
    },
742
    XmmToGprVex {
743
        op: AvxOpcode,
744
        src: Xmm,
745
        dst: WritableGpr,
746
        dst_size: OperandSize,
747
    },
748
    XmmRmREvex {
749
        op: Avx512Opcode,
750
        src1: XmmMem,
751
        src2: Xmm,
752
        dst: WritableXmm,
753
    },
754
    XmmRmREvex3 {
755
        op: Avx512Opcode,
756
        src1: XmmMem,
757
        src2: Xmm,
758
        src3: Xmm,
759
        dst: WritableXmm,
760
    },
761
    XmmUnaryRmR {
762
        op: SseOpcode,
763
        src: XmmMemAligned,
764
        dst: WritableXmm,
765
    },
766
    XmmUnaryRmRUnaligned {
767
        op: SseOpcode,
768
        src: XmmMem,
769
        dst: WritableXmm,
770
    },
771
    XmmUnaryRmRImm {
772
        op: SseOpcode,
773
        src: XmmMemAligned,
774
        imm: u8,
775
        dst: WritableXmm,
776
    },
777
    XmmUnaryRmREvex {
778
        op: Avx512Opcode,
779
        src: XmmMem,
780
        dst: WritableXmm,
781
    },
782
    XmmMovRM {
783
        op: SseOpcode,
784
        src: Xmm,
785
        dst: SyntheticAmode,
786
    },
787
    XmmMovRMImm {
788
        op: SseOpcode,
789
        src: Xmm,
790
        dst: SyntheticAmode,
791
        imm: u8,
792
    },
793
    XmmToGpr {
794
        op: SseOpcode,
795
        src: Xmm,
796
        dst: WritableGpr,
797
        dst_size: OperandSize,
798
    },
799
    XmmToGprImm {
800
        op: SseOpcode,
801
        src: Xmm,
802
        dst: WritableGpr,
803
        imm: u8,
804
    },
805
    GprToXmm {
806
        op: SseOpcode,
807
        src: GprMem,
808
        dst: WritableXmm,
809
        src_size: OperandSize,
810
    },
811
    CvtUint64ToFloatSeq {
812
        dst_size: OperandSize,
813
        src: Gpr,
814
        dst: WritableXmm,
815
        tmp_gpr1: WritableGpr,
816
        tmp_gpr2: WritableGpr,
817
    },
818
    CvtFloatToSintSeq {
819
        dst_size: OperandSize,
820
        src_size: OperandSize,
821
        is_saturating: bool,
822
        src: Xmm,
823
        dst: WritableGpr,
824
        tmp_gpr: WritableGpr,
825
        tmp_xmm: WritableXmm,
826
    },
827
    CvtFloatToUintSeq {
828
        dst_size: OperandSize,
829
        src_size: OperandSize,
830
        is_saturating: bool,
831
        src: Xmm,
832
        dst: WritableGpr,
833
        tmp_gpr: WritableGpr,
834
        tmp_xmm: WritableXmm,
835
        tmp_xmm2: WritableXmm,
836
    },
837
    XmmMinMaxSeq {
838
        size: OperandSize,
839
        is_min: bool,
840
        lhs: Xmm,
841
        rhs: Xmm,
842
        dst: WritableXmm,
843
    },
844
    XmmCmpRmR {
845
        op: SseOpcode,
846
        src: XmmMemAligned,
847
        dst: Xmm,
848
    },
849
    XmmRmRImm {
850
        op: SseOpcode,
851
        src1: Reg,
852
        src2: RegMem,
853
        dst: WritableReg,
854
        imm: u8,
855
        size: OperandSize,
856
    },
857
    CallKnown {
858
        dest: ExternalName,
859
        info: BoxCallInfo,
860
    },
861
    CallUnknown {
862
        dest: RegMem,
863
        info: BoxCallInfo,
864
    },
865
    Args {
866
        args: VecArgPair,
867
    },
868
    Ret {
869
        rets: VecRetPair,
870
    },
871
    JmpKnown {
872
        dst: MachLabel,
873
    },
874
    JmpIf {
875
        cc: CC,
876
        taken: MachLabel,
877
    },
878
    JmpCond {
879
        cc: CC,
880
        taken: MachLabel,
881
        not_taken: MachLabel,
882
    },
883
    JmpTableSeq {
884
        idx: Reg,
885
        tmp1: WritableReg,
886
        tmp2: WritableReg,
887
        default_target: MachLabel,
888
        targets: BoxVecMachLabel,
889
    },
890
    JmpUnknown {
891
        target: RegMem,
892
    },
893
    TrapIf {
894
        cc: CC,
895
        trap_code: TrapCode,
896
    },
897
    TrapIfAnd {
898
        cc1: CC,
899
        cc2: CC,
900
        trap_code: TrapCode,
901
    },
902
    TrapIfOr {
903
        cc1: CC,
904
        cc2: CC,
905
        trap_code: TrapCode,
906
    },
907
    Hlt,
908
    Ud2 {
909
        trap_code: TrapCode,
910
    },
911
    LoadExtName {
912
        dst: WritableReg,
913
        name: BoxExternalName,
914
        offset: i64,
915
    },
916
    LockCmpxchg {
917
        ty: Type,
918
        replacement: Reg,
919
        expected: Reg,
920
        mem: SyntheticAmode,
921
        dst_old: WritableReg,
922
    },
923
    AtomicRmwSeq {
924
        ty: Type,
925
        op: MachAtomicRmwOp,
926
        mem: SyntheticAmode,
927
        operand: Reg,
928
        temp: WritableReg,
929
        dst_old: WritableReg,
930
    },
931
    Fence {
932
        kind: FenceKind,
933
    },
934
    VirtualSPOffsetAdj {
935
        offset: i64,
936
    },
937
    XmmUninitializedValue {
938
        dst: WritableXmm,
939
    },
940
    ElfTlsGetAddr {
941
        symbol: ExternalName,
942
        dst: WritableGpr,
943
    },
944
    MachOTlsGetAddr {
945
        symbol: ExternalName,
946
        dst: WritableGpr,
947
    },
948
    CoffTlsGetAddr {
949
        symbol: ExternalName,
950
        dst: WritableGpr,
951
        tmp: WritableGpr,
952
    },
953
    Unwind {
954
        inst: UnwindInst,
955
    },
956
    DummyUse {
957
        reg: Reg,
958
    },
959
}
960
961
/// Internal type DivSignedness: defined at src/isa/x64/inst.isle line 668.
962
3.77k
#[derive(Copy, Clone, 
PartialEq0
, Eq,
D0
ebu
g0
)]
963
pub enum DivSignedness {
964
    Signed,
965
    Unsigned,
966
}
967
968
/// Internal type Amode: defined at src/isa/x64/inst.isle line 977.
969
11.6M
#[derive(Clone, 
D0
ebu
g0
)]
970
pub enum Amode {
971
    ImmReg {
972
        simm32: u32,
973
        base: Reg,
974
        flags: MemFlags,
975
    },
976
    ImmRegRegShift {
977
        simm32: u32,
978
        base: Gpr,
979
        index: Gpr,
980
        shift: u8,
981
        flags: MemFlags,
982
    },
983
    RipRelative {
984
        target: MachLabel,
985
    },
986
}
987
988
/// Internal type AvxOpcode: defined at src/isa/x64/inst.isle line 1254.
989
0
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
990
pub enum AvxOpcode {
991
    Vfmadd213ss,
992
    Vfmadd213sd,
993
    Vfmadd213ps,
994
    Vfmadd213pd,
995
    Vfmadd132ss,
996
    Vfmadd132sd,
997
    Vfmadd132ps,
998
    Vfmadd132pd,
999
    Vfnmadd213ss,
1000
    Vfnmadd213sd,
1001
    Vfnmadd213ps,
1002
    Vfnmadd213pd,
1003
    Vfnmadd132ss,
1004
    Vfnmadd132sd,
1005
    Vfnmadd132ps,
1006
    Vfnmadd132pd,
1007
    Vcmpps,
1008
    Vcmppd,
1009
    Vpsrlw,
1010
    Vpsrld,
1011
    Vpsrlq,
1012
    Vpaddb,
1013
    Vpaddw,
1014
    Vpaddd,
1015
    Vpaddq,
1016
    Vpaddsb,
1017
    Vpaddsw,
1018
    Vpaddusb,
1019
    Vpaddusw,
1020
    Vpsubb,
1021
    Vpsubw,
1022
    Vpsubd,
1023
    Vpsubq,
1024
    Vpsubsb,
1025
    Vpsubsw,
1026
    Vpsubusb,
1027
    Vpsubusw,
1028
    Vpavgb,
1029
    Vpavgw,
1030
    Vpand,
1031
    Vandps,
1032
    Vandpd,
1033
    Vpor,
1034
    Vorps,
1035
    Vorpd,
1036
    Vpxor,
1037
    Vxorps,
1038
    Vxorpd,
1039
    Vpmullw,
1040
    Vpmulld,
1041
    Vpmulhw,
1042
    Vpmulhd,
1043
    Vpmulhrsw,
1044
    Vpmulhuw,
1045
    Vpmuldq,
1046
    Vpmuludq,
1047
    Vpunpckhwd,
1048
    Vpunpcklwd,
1049
    Vunpcklps,
1050
    Vunpckhps,
1051
    Vandnps,
1052
    Vandnpd,
1053
    Vpandn,
1054
    Vaddps,
1055
    Vaddpd,
1056
    Vsubps,
1057
    Vsubpd,
1058
    Vmulps,
1059
    Vmulpd,
1060
    Vdivps,
1061
    Vdivpd,
1062
    Vpcmpeqb,
1063
    Vpcmpeqw,
1064
    Vpcmpeqd,
1065
    Vpcmpeqq,
1066
    Vpcmpgtb,
1067
    Vpcmpgtw,
1068
    Vpcmpgtd,
1069
    Vpcmpgtq,
1070
    Vminps,
1071
    Vminpd,
1072
    Vmaxps,
1073
    Vmaxpd,
1074
    Vblendvpd,
1075
    Vblendvps,
1076
    Vpblendvb,
1077
    Vmovlhps,
1078
    Vpmaxsb,
1079
    Vpmaxsw,
1080
    Vpmaxsd,
1081
    Vpminsb,
1082
    Vpminsw,
1083
    Vpminsd,
1084
    Vpmaxub,
1085
    Vpmaxuw,
1086
    Vpmaxud,
1087
    Vpminub,
1088
    Vpminuw,
1089
    Vpminud,
1090
    Vpunpcklbw,
1091
    Vpunpckhbw,
1092
    Vpacksswb,
1093
    Vpackssdw,
1094
    Vpackuswb,
1095
    Vpackusdw,
1096
    Vpalignr,
1097
    Vpinsrb,
1098
    Vpinsrw,
1099
    Vpinsrd,
1100
    Vpinsrq,
1101
    Vpmaddwd,
1102
    Vpmaddubsw,
1103
    Vinsertps,
1104
    Vpshufb,
1105
    Vshufps,
1106
    Vpsllw,
1107
    Vpslld,
1108
    Vpsllq,
1109
    Vpsraw,
1110
    Vpsrad,
1111
    Vpmovsxbw,
1112
    Vpmovzxbw,
1113
    Vpmovsxwd,
1114
    Vpmovzxwd,
1115
    Vpmovsxdq,
1116
    Vpmovzxdq,
1117
    Vaddss,
1118
    Vaddsd,
1119
    Vmulss,
1120
    Vmulsd,
1121
    Vsubss,
1122
    Vsubsd,
1123
    Vdivss,
1124
    Vdivsd,
1125
    Vpabsb,
1126
    Vpabsw,
1127
    Vpabsd,
1128
    Vminss,
1129
    Vminsd,
1130
    Vmaxss,
1131
    Vmaxsd,
1132
    Vsqrtps,
1133
    Vsqrtpd,
1134
    Vroundps,
1135
    Vroundpd,
1136
    Vcvtdq2pd,
1137
    Vcvtdq2ps,
1138
    Vcvtpd2ps,
1139
    Vcvtps2pd,
1140
    Vcvttpd2dq,
1141
    Vcvttps2dq,
1142
    Vphaddw,
1143
    Vphaddd,
1144
    Vpunpckhdq,
1145
    Vpunpckldq,
1146
    Vpunpckhqdq,
1147
    Vpunpcklqdq,
1148
    Vpshuflw,
1149
    Vpshufhw,
1150
    Vpshufd,
1151
    Vmovss,
1152
    Vmovsd,
1153
    Vmovups,
1154
    Vmovupd,
1155
    Vmovdqu,
1156
    Vpextrb,
1157
    Vpextrw,
1158
    Vpextrd,
1159
    Vpextrq,
1160
    Vpblendw,
1161
    Vmovddup,
1162
    Vpbroadcastb,
1163
    Vpbroadcastw,
1164
    Vpbroadcastd,
1165
    Vbroadcastss,
1166
    Vmovd,
1167
    Vmovq,
1168
    Vmovmskps,
1169
    Vmovmskpd,
1170
    Vpmovmskb,
1171
    Vcvtsi2ss,
1172
    Vcvtsi2sd,
1173
    Vcvtss2sd,
1174
    Vcvtsd2ss,
1175
    Vsqrtss,
1176
    Vsqrtsd,
1177
    Vroundss,
1178
    Vroundsd,
1179
}
1180
1181
/// Internal type RegisterClass: defined at src/isa/x64/inst.isle line 1720.
1182
0
#[derive(Clone, Debug)]
1183
pub enum RegisterClass {
1184
    Gpr {
1185
        single_register: bool,
1186
    },
1187
    Xmm,
1188
}
1189
1190
/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 1864.
1191
0
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1192
pub enum ExtendKind {
1193
    Sign,
1194
    Zero,
1195
}
1196
1197
/// Internal type IcmpCondResult: defined at src/isa/x64/inst.isle line 4609.
1198
250k
#[derive(Clone, 
Debug0
)]
1199
pub enum IcmpCondResult {
1200
    Condition {
1201
        producer: ProducesFlags,
1202
        cc: CC,
1203
    },
1204
}
1205
1206
/// Internal type FcmpCondResult: defined at src/isa/x64/inst.isle line 4722.
1207
0
#[derive(Clone, Debug)]
1208
pub enum FcmpCondResult {
1209
    Condition {
1210
        producer: ProducesFlags,
1211
        cc: CC,
1212
    },
1213
    AndCondition {
1214
        producer: ProducesFlags,
1215
        cc1: CC,
1216
        cc2: CC,
1217
    },
1218
    OrCondition {
1219
        producer: ProducesFlags,
1220
        cc1: CC,
1221
        cc2: CC,
1222
    },
1223
}
1224
1225
// Generated as internal constructor for term output_reg.
1226
2.47M
pub fn constructor_output_reg<C: Context>(
1227
2.47M
    ctx: &mut C,
1228
2.47M
    arg0: Reg,
1229
2.47M
) -> InstOutput {
1230
2.47M
    let v1 = C::value_reg(ctx, arg0);
1231
2.47M
    let v2 = C::output(ctx, v1);
1232
2.47M
    // Rule at src/prelude_lower.isle line 65.
1233
2.47M
    return v2;
1234
2.47M
}
1235
1236
// Generated as internal constructor for term output_value.
1237
0
pub fn constructor_output_value<C: Context>(
1238
0
    ctx: &mut C,
1239
0
    arg0: Value,
1240
0
) -> InstOutput {
1241
0
    let v1 = C::put_in_regs(ctx, arg0);
1242
0
    let v2 = C::output(ctx, v1);
1243
0
    // Rule at src/prelude_lower.isle line 69.
1244
0
    return v2;
1245
0
}
1246
1247
// Generated as internal constructor for term temp_reg.
1248
0
pub fn constructor_temp_reg<C: Context>(
1249
0
    ctx: &mut C,
1250
0
    arg0: Type,
1251
0
) -> Reg {
1252
0
    let v1 = C::temp_writable_reg(ctx, arg0);
1253
0
    let v2 = C::writable_reg_to_reg(ctx, v1);
1254
0
    // Rule at src/prelude_lower.isle line 89.
1255
0
    return v2;
1256
0
}
1257
1258
// Generated as internal constructor for term value_regs_range.
1259
0
pub fn constructor_value_regs_range<C: Context>(
1260
0
    ctx: &mut C,
1261
0
    arg0: ValueRegs,
1262
0
) -> Range {
1263
0
    let v2 = C::value_regs_len(ctx, arg0);
1264
0
    let v3 = C::range(ctx, 0x0, v2);
1265
0
    // Rule at src/prelude_lower.isle line 138.
1266
0
    return v3;
1267
0
}
1268
1269
// Generated as internal constructor for term lo_reg.
1270
0
pub fn constructor_lo_reg<C: Context>(
1271
0
    ctx: &mut C,
1272
0
    arg0: Value,
1273
0
) -> Reg {
1274
0
    let v1 = C::put_in_regs(ctx, arg0);
1275
0
    let v3 = C::value_regs_get(ctx, v1, 0x0);
1276
0
    // Rule at src/prelude_lower.isle line 149.
1277
0
    return v3;
1278
0
}
1279
1280
// Generated as internal constructor for term multi_reg_to_pair_and_single.
1281
0
pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
1282
0
    ctx: &mut C,
1283
0
    arg0: &MultiReg,
1284
0
) -> InstOutput {
1285
    if let &MultiReg::Three {
1286
0
        a: v1,
1287
0
        b: v2,
1288
0
        c: v3,
1289
0
    } = arg0 {
1290
0
        let v4 = C::value_regs(ctx, v1, v2);
1291
0
        let v5 = C::value_reg(ctx, v3);
1292
0
        let v6 = C::output_pair(ctx, v4, v5);
1293
0
        // Rule at src/prelude_lower.isle line 160.
1294
0
        return v6;
1295
0
    }
1296
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 159")
1297
0
}
1298
1299
// Generated as internal constructor for term multi_reg_to_pair.
1300
0
pub fn constructor_multi_reg_to_pair<C: Context>(
1301
0
    ctx: &mut C,
1302
0
    arg0: &MultiReg,
1303
0
) -> InstOutput {
1304
    if let &MultiReg::Two {
1305
0
        a: v1,
1306
0
        b: v2,
1307
0
    } = arg0 {
1308
0
        let v3 = C::value_regs(ctx, v1, v2);
1309
0
        let v4 = C::output(ctx, v3);
1310
0
        // Rule at src/prelude_lower.isle line 165.
1311
0
        return v4;
1312
0
    }
1313
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_pair", "src/prelude_lower.isle line 164")
1314
0
}
1315
1316
// Generated as internal constructor for term multi_reg_to_single.
1317
0
pub fn constructor_multi_reg_to_single<C: Context>(
1318
0
    ctx: &mut C,
1319
0
    arg0: &MultiReg,
1320
0
) -> InstOutput {
1321
    if let &MultiReg::One {
1322
0
        a: v1,
1323
0
    } = arg0 {
1324
0
        let v2 = C::value_reg(ctx, v1);
1325
0
        let v3 = C::output(ctx, v2);
1326
0
        // Rule at src/prelude_lower.isle line 170.
1327
0
        return v3;
1328
0
    }
1329
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_single", "src/prelude_lower.isle line 169")
1330
0
}
1331
1332
// Generated as internal constructor for term emit_side_effect.
1333
1.13M
pub fn constructor_emit_side_effect<C: Context>(
1334
1.13M
    ctx: &mut C,
1335
1.13M
    arg0: &SideEffectNoResult,
1336
1.13M
) -> Unit {
1337
1.13M
    match arg0 {
1338
        &SideEffectNoResult::Inst {
1339
840k
            inst: ref v1,
1340
840k
        } => {
1341
840k
            let v2 = C::emit(ctx, v1);
1342
840k
            // Rule at src/prelude_lower.isle line 318.
1343
840k
            return v2;
1344
        }
1345
        &SideEffectNoResult::Inst2 {
1346
296k
            inst1: ref v3,
1347
296k
            inst2: ref v4,
1348
296k
        } => {
1349
296k
            let v5 = C::emit(ctx, v3);
1350
296k
            let v6 = C::emit(ctx, v4);
1351
296k
            // Rule at src/prelude_lower.isle line 320.
1352
296k
            return v6;
1353
        }
1354
        &SideEffectNoResult::Inst3 {
1355
0
            inst1: ref v7,
1356
0
            inst2: ref v8,
1357
0
            inst3: ref v9,
1358
0
        } => {
1359
0
            let v10 = C::emit(ctx, v7);
1360
0
            let v11 = C::emit(ctx, v8);
1361
0
            let v12 = C::emit(ctx, v9);
1362
0
            // Rule at src/prelude_lower.isle line 323.
1363
0
            return v12;
1364
        }
1365
0
        _ => {}
1366
0
    }
1367
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "emit_side_effect", "src/prelude_lower.isle line 317")
1368
1.13M
}
1369
1370
// Generated as internal constructor for term side_effect.
1371
633k
pub fn constructor_side_effect<C: Context>(
1372
633k
    ctx: &mut C,
1373
633k
    arg0: &SideEffectNoResult,
1374
633k
) -> InstOutput {
1375
633k
    let v1 = constructor_emit_side_effect(ctx, arg0);
1376
633k
    let v2 = C::output_none(ctx);
1377
633k
    // Rule at src/prelude_lower.isle line 331.
1378
633k
    return v2;
1379
633k
}
1380
1381
// Generated as internal constructor for term side_effect_concat.
1382
0
pub fn constructor_side_effect_concat<C: Context>(
1383
0
    ctx: &mut C,
1384
0
    arg0: &SideEffectNoResult,
1385
0
    arg1: &SideEffectNoResult,
1386
0
) -> SideEffectNoResult {
1387
0
    match arg0 {
1388
        &SideEffectNoResult::Inst {
1389
0
            inst: ref v1,
1390
0
        } => {
1391
0
            match arg1 {
1392
                &SideEffectNoResult::Inst {
1393
0
                    inst: ref v3,
1394
0
                } => {
1395
0
                    let v4 = SideEffectNoResult::Inst2 {
1396
0
                        inst1: v1.clone(),
1397
0
                        inst2: v3.clone(),
1398
0
                    };
1399
0
                    // Rule at src/prelude_lower.isle line 336.
1400
0
                    return v4;
1401
                }
1402
                &SideEffectNoResult::Inst2 {
1403
0
                    inst1: ref v5,
1404
0
                    inst2: ref v6,
1405
0
                } => {
1406
0
                    let v7 = SideEffectNoResult::Inst3 {
1407
0
                        inst1: v1.clone(),
1408
0
                        inst2: v5.clone(),
1409
0
                        inst3: v6.clone(),
1410
0
                    };
1411
0
                    // Rule at src/prelude_lower.isle line 338.
1412
0
                    return v7;
1413
                }
1414
0
                _ => {}
1415
            }
1416
        }
1417
        &SideEffectNoResult::Inst2 {
1418
0
            inst1: ref v8,
1419
0
            inst2: ref v9,
1420
        } => {
1421
            if let &SideEffectNoResult::Inst {
1422
0
                inst: ref v3,
1423
0
            } = arg1 {
1424
0
                let v10 = SideEffectNoResult::Inst3 {
1425
0
                    inst1: v8.clone(),
1426
0
                    inst2: v9.clone(),
1427
0
                    inst3: v3.clone(),
1428
0
                };
1429
0
                // Rule at src/prelude_lower.isle line 340.
1430
0
                return v10;
1431
0
            }
1432
        }
1433
0
        _ => {}
1434
    }
1435
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "side_effect_concat", "src/prelude_lower.isle line 335")
1436
0
}
1437
1438
// Generated as internal constructor for term produces_flags_concat.
1439
0
pub fn constructor_produces_flags_concat<C: Context>(
1440
0
    ctx: &mut C,
1441
0
    arg0: &ProducesFlags,
1442
0
    arg1: &ProducesFlags,
1443
0
) -> ProducesFlags {
1444
    if let &ProducesFlags::ProducesFlagsSideEffect {
1445
0
        inst: ref v1,
1446
0
    } = arg0 {
1447
        if let &ProducesFlags::ProducesFlagsSideEffect {
1448
0
            inst: ref v3,
1449
0
        } = arg1 {
1450
0
            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
1451
0
                inst1: v1.clone(),
1452
0
                inst2: v3.clone(),
1453
0
            };
1454
0
            // Rule at src/prelude_lower.isle line 365.
1455
0
            return v4;
1456
0
        }
1457
0
    }
1458
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_concat", "src/prelude_lower.isle line 364")
1459
0
}
1460
1461
// Generated as internal constructor for term produces_flags_get_reg.
1462
0
pub fn constructor_produces_flags_get_reg<C: Context>(
1463
0
    ctx: &mut C,
1464
0
    arg0: &ProducesFlags,
1465
0
) -> Reg {
1466
0
    match arg0 {
1467
        &ProducesFlags::ProducesFlagsReturnsReg {
1468
0
            inst: ref v1,
1469
0
            result: v2,
1470
0
        } => {
1471
0
            // Rule at src/prelude_lower.isle line 395.
1472
0
            return v2;
1473
        }
1474
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1475
0
            inst: ref v3,
1476
0
            result: v4,
1477
0
        } => {
1478
0
            // Rule at src/prelude_lower.isle line 396.
1479
0
            return v4;
1480
        }
1481
0
        _ => {}
1482
0
    }
1483
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_get_reg", "src/prelude_lower.isle line 394")
1484
0
}
1485
1486
// Generated as internal constructor for term produces_flags_ignore.
1487
0
pub fn constructor_produces_flags_ignore<C: Context>(
1488
0
    ctx: &mut C,
1489
0
    arg0: &ProducesFlags,
1490
0
) -> ProducesFlags {
1491
0
    match arg0 {
1492
        &ProducesFlags::ProducesFlagsReturnsReg {
1493
0
            inst: ref v1,
1494
0
            result: v2,
1495
0
        } => {
1496
0
            let v3 = ProducesFlags::ProducesFlagsSideEffect {
1497
0
                inst: v1.clone(),
1498
0
            };
1499
0
            // Rule at src/prelude_lower.isle line 401.
1500
0
            return v3;
1501
        }
1502
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1503
0
            inst: ref v4,
1504
0
            result: v5,
1505
0
        } => {
1506
0
            let v6 = ProducesFlags::ProducesFlagsSideEffect {
1507
0
                inst: v4.clone(),
1508
0
            };
1509
0
            // Rule at src/prelude_lower.isle line 403.
1510
0
            return v6;
1511
        }
1512
0
        _ => {}
1513
0
    }
1514
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_ignore", "src/prelude_lower.isle line 400")
1515
0
}
1516
1517
// Generated as internal constructor for term consumes_flags_concat.
1518
0
pub fn constructor_consumes_flags_concat<C: Context>(
1519
0
    ctx: &mut C,
1520
0
    arg0: &ConsumesFlags,
1521
0
    arg1: &ConsumesFlags,
1522
0
) -> ConsumesFlags {
1523
0
    match arg0 {
1524
        &ConsumesFlags::ConsumesFlagsSideEffect {
1525
0
            inst: ref v8,
1526
        } => {
1527
            if let &ConsumesFlags::ConsumesFlagsSideEffect {
1528
0
                inst: ref v9,
1529
0
            } = arg1 {
1530
0
                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
1531
0
                    inst1: v8.clone(),
1532
0
                    inst2: v9.clone(),
1533
0
                };
1534
0
                // Rule at src/prelude_lower.isle line 416.
1535
0
                return v10;
1536
0
            }
1537
        }
1538
        &ConsumesFlags::ConsumesFlagsReturnsReg {
1539
0
            inst: ref v1,
1540
0
            result: v2,
1541
        } => {
1542
            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
1543
0
                inst: ref v4,
1544
0
                result: v5,
1545
0
            } = arg1 {
1546
0
                let v6 = C::value_regs(ctx, v2, v5);
1547
0
                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1548
0
                    inst1: v1.clone(),
1549
0
                    inst2: v4.clone(),
1550
0
                    result: v6,
1551
0
                };
1552
0
                // Rule at src/prelude_lower.isle line 410.
1553
0
                return v7;
1554
0
            }
1555
        }
1556
0
        _ => {}
1557
    }
1558
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "consumes_flags_concat", "src/prelude_lower.isle line 409")
1559
0
}
1560
1561
// Generated as internal constructor for term with_flags.
1562
61.7k
pub fn constructor_with_flags<C: Context>(
1563
61.7k
    ctx: &mut C,
1564
61.7k
    arg0: &ProducesFlags,
1565
61.7k
    arg1: &ConsumesFlags,
1566
61.7k
) -> ValueRegs {
1567
61.7k
    match arg0 {
1568
        &ProducesFlags::ProducesFlagsSideEffect {
1569
61.7k
            inst: ref v12,
1570
61.7k
        } => {
1571
61.7k
            match arg1 {
1572
                &ConsumesFlags::ConsumesFlagsReturnsReg {
1573
61.7k
                    inst: ref v13,
1574
61.7k
                    result: v14,
1575
61.7k
                } => {
1576
61.7k
                    let v15 = C::emit(ctx, v12);
1577
61.7k
                    let v16 = C::emit(ctx, v13);
1578
61.7k
                    let v17 = C::value_reg(ctx, v14);
1579
61.7k
                    // Rule at src/prelude_lower.isle line 447.
1580
61.7k
                    return v17;
1581
                }
1582
                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1583
0
                    inst1: ref v18,
1584
0
                    inst2: ref v19,
1585
0
                    result: v20,
1586
0
                } => {
1587
0
                    let v15 = C::emit(ctx, v12);
1588
0
                    let v21 = C::emit(ctx, v18);
1589
0
                    let v22 = C::emit(ctx, v19);
1590
0
                    // Rule at src/prelude_lower.isle line 453.
1591
0
                    return v20;
1592
                }
1593
                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1594
0
                    inst1: ref v23,
1595
0
                    inst2: ref v24,
1596
0
                    inst3: ref v25,
1597
0
                    inst4: ref v26,
1598
0
                    result: v27,
1599
0
                } => {
1600
0
                    let v15 = C::emit(ctx, v12);
1601
0
                    let v28 = C::emit(ctx, v23);
1602
0
                    let v29 = C::emit(ctx, v24);
1603
0
                    let v30 = C::emit(ctx, v25);
1604
0
                    let v31 = C::emit(ctx, v26);
1605
0
                    // Rule at src/prelude_lower.isle line 465.
1606
0
                    return v27;
1607
                }
1608
0
                _ => {}
1609
            }
1610
        }
1611
        &ProducesFlags::ProducesFlagsTwiceSideEffect {
1612
0
            inst1: ref v32,
1613
0
            inst2: ref v33,
1614
0
        } => {
1615
0
            match arg1 {
1616
                &ConsumesFlags::ConsumesFlagsReturnsReg {
1617
0
                    inst: ref v13,
1618
0
                    result: v14,
1619
0
                } => {
1620
0
                    let v34 = C::emit(ctx, v32);
1621
0
                    let v35 = C::emit(ctx, v33);
1622
0
                    let v36 = C::emit(ctx, v13);
1623
0
                    let v37 = C::value_reg(ctx, v14);
1624
0
                    // Rule at src/prelude_lower.isle line 481.
1625
0
                    return v37;
1626
                }
1627
                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1628
0
                    inst1: ref v18,
1629
0
                    inst2: ref v19,
1630
0
                    result: v20,
1631
0
                } => {
1632
0
                    let v34 = C::emit(ctx, v32);
1633
0
                    let v35 = C::emit(ctx, v33);
1634
0
                    let v38 = C::emit(ctx, v18);
1635
0
                    let v39 = C::emit(ctx, v19);
1636
0
                    // Rule at src/prelude_lower.isle line 488.
1637
0
                    return v20;
1638
                }
1639
                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1640
0
                    inst1: ref v23,
1641
0
                    inst2: ref v24,
1642
0
                    inst3: ref v25,
1643
0
                    inst4: ref v26,
1644
0
                    result: v27,
1645
0
                } => {
1646
0
                    let v34 = C::emit(ctx, v32);
1647
0
                    let v35 = C::emit(ctx, v33);
1648
0
                    let v40 = C::emit(ctx, v23);
1649
0
                    let v41 = C::emit(ctx, v24);
1650
0
                    let v42 = C::emit(ctx, v25);
1651
0
                    let v43 = C::emit(ctx, v26);
1652
0
                    // Rule at src/prelude_lower.isle line 501.
1653
0
                    return v27;
1654
                }
1655
0
                _ => {}
1656
            }
1657
        }
1658
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1659
0
            inst: ref v1,
1660
0
            result: v2,
1661
0
        } => {
1662
0
            match arg1 {
1663
                &ConsumesFlags::ConsumesFlagsSideEffect {
1664
0
                    inst: ref v9,
1665
0
                } => {
1666
0
                    let v6 = C::emit(ctx, v1);
1667
0
                    let v10 = C::emit(ctx, v9);
1668
0
                    let v11 = C::value_reg(ctx, v2);
1669
0
                    // Rule at src/prelude_lower.isle line 441.
1670
0
                    return v11;
1671
                }
1672
                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
1673
0
                    inst: ref v4,
1674
0
                    result: v5,
1675
0
                } => {
1676
0
                    let v6 = C::emit(ctx, v1);
1677
0
                    let v7 = C::emit(ctx, v4);
1678
0
                    let v8 = C::value_regs(ctx, v2, v5);
1679
0
                    // Rule at src/prelude_lower.isle line 433.
1680
0
                    return v8;
1681
                }
1682
0
                _ => {}
1683
            }
1684
        }
1685
0
        _ => {}
1686
    }
1687
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags", "src/prelude_lower.isle line 431")
1688
61.7k
}
1689
1690
// Generated as internal constructor for term with_flags_reg.
1691
11.1k
pub fn constructor_with_flags_reg<C: Context>(
1692
11.1k
    ctx: &mut C,
1693
11.1k
    arg0: &ProducesFlags,
1694
11.1k
    arg1: &ConsumesFlags,
1695
11.1k
) -> Reg {
1696
11.1k
    let v2 = constructor_with_flags(ctx, arg0, arg1);
1697
11.1k
    let v4 = C::value_regs_get(ctx, v2, 0x0);
1698
11.1k
    // Rule at src/prelude_lower.isle line 519.
1699
11.1k
    return v4;
1700
11.1k
}
1701
1702
// Generated as internal constructor for term flags_to_producesflags.
1703
0
pub fn constructor_flags_to_producesflags<C: Context>(
1704
0
    ctx: &mut C,
1705
0
    arg0: Value,
1706
0
) -> ProducesFlags {
1707
0
    let v1 = C::mark_value_used(ctx, arg0);
1708
0
    // Rule at src/prelude_lower.isle line 526.
1709
0
    return ProducesFlags::AlreadyExistingFlags;
1710
0
}
1711
1712
// Generated as internal constructor for term with_flags_side_effect.
1713
296k
pub fn constructor_with_flags_side_effect<C: Context>(
1714
296k
    ctx: &mut C,
1715
296k
    arg0: &ProducesFlags,
1716
296k
    arg1: &ConsumesFlags,
1717
296k
) -> SideEffectNoResult {
1718
296k
    match arg0 {
1719
        &ProducesFlags::AlreadyExistingFlags => {
1720
0
            match arg1 {
1721
                &ConsumesFlags::ConsumesFlagsSideEffect {
1722
0
                    inst: ref v2,
1723
0
                } => {
1724
0
                    let v3 = SideEffectNoResult::Inst {
1725
0
                        inst: v2.clone(),
1726
0
                    };
1727
0
                    // Rule at src/prelude_lower.isle line 537.
1728
0
                    return v3;
1729
                }
1730
                &ConsumesFlags::ConsumesFlagsSideEffect2 {
1731
0
                    inst1: ref v4,
1732
0
                    inst2: ref v5,
1733
0
                } => {
1734
0
                    let v6 = SideEffectNoResult::Inst2 {
1735
0
                        inst1: v4.clone(),
1736
0
                        inst2: v5.clone(),
1737
0
                    };
1738
0
                    // Rule at src/prelude_lower.isle line 542.
1739
0
                    return v6;
1740
                }
1741
0
                _ => {}
1742
            }
1743
        }
1744
        &ProducesFlags::ProducesFlagsSideEffect {
1745
296k
            inst: ref v7,
1746
296k
        } => {
1747
296k
            match arg1 {
1748
                &ConsumesFlags::ConsumesFlagsSideEffect {
1749
296k
                    inst: ref v2,
1750
296k
                } => {
1751
296k
                    let v8 = SideEffectNoResult::Inst2 {
1752
296k
                        inst1: v7.clone(),
1753
296k
                        inst2: v2.clone(),
1754
296k
                    };
1755
296k
                    // Rule at src/prelude_lower.isle line 547.
1756
296k
                    return v8;
1757
                }
1758
                &ConsumesFlags::ConsumesFlagsSideEffect2 {
1759
0
                    inst1: ref v4,
1760
0
                    inst2: ref v5,
1761
0
                } => {
1762
0
                    let v9 = SideEffectNoResult::Inst3 {
1763
0
                        inst1: v7.clone(),
1764
0
                        inst2: v4.clone(),
1765
0
                        inst3: v5.clone(),
1766
0
                    };
1767
0
                    // Rule at src/prelude_lower.isle line 552.
1768
0
                    return v9;
1769
                }
1770
0
                _ => {}
1771
            }
1772
        }
1773
        &ProducesFlags::ProducesFlagsTwiceSideEffect {
1774
0
            inst1: ref v10,
1775
0
            inst2: ref v11,
1776
        } => {
1777
            if let &ConsumesFlags::ConsumesFlagsSideEffect {
1778
0
                inst: ref v2,
1779
0
            } = arg1 {
1780
0
                let v12 = SideEffectNoResult::Inst3 {
1781
0
                    inst1: v10.clone(),
1782
0
                    inst2: v11.clone(),
1783
0
                    inst3: v2.clone(),
1784
0
                };
1785
0
                // Rule at src/prelude_lower.isle line 557.
1786
0
                return v12;
1787
0
            }
1788
        }
1789
0
        _ => {}
1790
    }
1791
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags_side_effect", "src/prelude_lower.isle line 535")
1792
296k
}
1793
1794
// Generated as internal constructor for term with_flags_chained.
1795
0
pub fn constructor_with_flags_chained<C: Context>(
1796
0
    ctx: &mut C,
1797
0
    arg0: &ProducesFlags,
1798
0
    arg1: &ConsumesAndProducesFlags,
1799
0
    arg2: &ConsumesFlags,
1800
0
) -> MultiReg {
1801
0
    match arg0 {
1802
        &ProducesFlags::ProducesFlagsSideEffect {
1803
0
            inst: ref v1,
1804
0
        } => {
1805
0
            match arg1 {
1806
                &ConsumesAndProducesFlags::SideEffect {
1807
0
                    inst: ref v3,
1808
0
                } => {
1809
0
                    match arg2 {
1810
                        &ConsumesFlags::ConsumesFlagsSideEffect {
1811
0
                            inst: ref v5,
1812
0
                        } => {
1813
0
                            let v6 = C::emit(ctx, v1);
1814
0
                            let v7 = C::emit(ctx, v3);
1815
0
                            let v8 = C::emit(ctx, v5);
1816
0
                            // Rule at src/prelude_lower.isle line 566.
1817
0
                            return MultiReg::Empty;
1818
                        }
1819
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
1820
0
                            inst1: ref v10,
1821
0
                            inst2: ref v11,
1822
0
                        } => {
1823
0
                            let v6 = C::emit(ctx, v1);
1824
0
                            let v7 = C::emit(ctx, v3);
1825
0
                            let v12 = C::emit(ctx, v10);
1826
0
                            let v13 = C::emit(ctx, v11);
1827
0
                            // Rule at src/prelude_lower.isle line 574.
1828
0
                            return MultiReg::Empty;
1829
                        }
1830
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
1831
0
                            inst: ref v14,
1832
0
                            result: v15,
1833
0
                        } => {
1834
0
                            let v6 = C::emit(ctx, v1);
1835
0
                            let v7 = C::emit(ctx, v3);
1836
0
                            let v16 = C::emit(ctx, v14);
1837
0
                            let v17 = MultiReg::One {
1838
0
                                a: v15,
1839
0
                            };
1840
0
                            // Rule at src/prelude_lower.isle line 583.
1841
0
                            return v17;
1842
                        }
1843
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1844
0
                            inst1: ref v18,
1845
0
                            inst2: ref v19,
1846
0
                            result: v20,
1847
0
                        } => {
1848
0
                            let v6 = C::emit(ctx, v1);
1849
0
                            let v7 = C::emit(ctx, v3);
1850
0
                            let v21 = C::emit(ctx, v18);
1851
0
                            let v22 = C::emit(ctx, v19);
1852
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
1853
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
1854
0
                            let v27 = MultiReg::Two {
1855
0
                                a: v24,
1856
0
                                b: v26,
1857
0
                            };
1858
0
                            // Rule at src/prelude_lower.isle line 591.
1859
0
                            return v27;
1860
                        }
1861
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1862
0
                            inst1: ref v28,
1863
0
                            inst2: ref v29,
1864
0
                            inst3: ref v30,
1865
0
                            inst4: ref v31,
1866
0
                            result: v32,
1867
0
                        } => {
1868
0
                            let v6 = C::emit(ctx, v1);
1869
0
                            let v7 = C::emit(ctx, v3);
1870
0
                            let v33 = C::emit(ctx, v28);
1871
0
                            let v34 = C::emit(ctx, v29);
1872
0
                            let v35 = C::emit(ctx, v30);
1873
0
                            let v36 = C::emit(ctx, v31);
1874
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
1875
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
1876
0
                            let v39 = MultiReg::Two {
1877
0
                                a: v37,
1878
0
                                b: v38,
1879
0
                            };
1880
0
                            // Rule at src/prelude_lower.isle line 600.
1881
0
                            return v39;
1882
                        }
1883
0
                        _ => {}
1884
                    }
1885
                }
1886
                &ConsumesAndProducesFlags::ReturnsReg {
1887
0
                    inst: ref v47,
1888
0
                    result: v48,
1889
0
                } => {
1890
0
                    match arg2 {
1891
                        &ConsumesFlags::ConsumesFlagsSideEffect {
1892
0
                            inst: ref v5,
1893
0
                        } => {
1894
0
                            let v6 = C::emit(ctx, v1);
1895
0
                            let v49 = C::emit(ctx, v47);
1896
0
                            let v8 = C::emit(ctx, v5);
1897
0
                            let v50 = MultiReg::One {
1898
0
                                a: v48,
1899
0
                            };
1900
0
                            // Rule at src/prelude_lower.isle line 660.
1901
0
                            return v50;
1902
                        }
1903
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
1904
0
                            inst1: ref v10,
1905
0
                            inst2: ref v11,
1906
0
                        } => {
1907
0
                            let v6 = C::emit(ctx, v1);
1908
0
                            let v49 = C::emit(ctx, v47);
1909
0
                            let v12 = C::emit(ctx, v10);
1910
0
                            let v13 = C::emit(ctx, v11);
1911
0
                            let v50 = MultiReg::One {
1912
0
                                a: v48,
1913
0
                            };
1914
0
                            // Rule at src/prelude_lower.isle line 668.
1915
0
                            return v50;
1916
                        }
1917
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
1918
0
                            inst: ref v14,
1919
0
                            result: v15,
1920
0
                        } => {
1921
0
                            let v6 = C::emit(ctx, v1);
1922
0
                            let v49 = C::emit(ctx, v47);
1923
0
                            let v16 = C::emit(ctx, v14);
1924
0
                            let v51 = MultiReg::Two {
1925
0
                                a: v48,
1926
0
                                b: v15,
1927
0
                            };
1928
0
                            // Rule at src/prelude_lower.isle line 677.
1929
0
                            return v51;
1930
                        }
1931
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1932
0
                            inst1: ref v18,
1933
0
                            inst2: ref v19,
1934
0
                            result: v20,
1935
0
                        } => {
1936
0
                            let v6 = C::emit(ctx, v1);
1937
0
                            let v49 = C::emit(ctx, v47);
1938
0
                            let v21 = C::emit(ctx, v18);
1939
0
                            let v22 = C::emit(ctx, v19);
1940
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
1941
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
1942
0
                            let v52 = MultiReg::Three {
1943
0
                                a: v48,
1944
0
                                b: v24,
1945
0
                                c: v26,
1946
0
                            };
1947
0
                            // Rule at src/prelude_lower.isle line 685.
1948
0
                            return v52;
1949
                        }
1950
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1951
0
                            inst1: ref v28,
1952
0
                            inst2: ref v29,
1953
0
                            inst3: ref v30,
1954
0
                            inst4: ref v31,
1955
0
                            result: v32,
1956
0
                        } => {
1957
0
                            let v6 = C::emit(ctx, v1);
1958
0
                            let v49 = C::emit(ctx, v47);
1959
0
                            let v33 = C::emit(ctx, v28);
1960
0
                            let v34 = C::emit(ctx, v29);
1961
0
                            let v35 = C::emit(ctx, v30);
1962
0
                            let v36 = C::emit(ctx, v31);
1963
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
1964
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
1965
0
                            let v53 = MultiReg::Three {
1966
0
                                a: v48,
1967
0
                                b: v37,
1968
0
                                c: v38,
1969
0
                            };
1970
0
                            // Rule at src/prelude_lower.isle line 694.
1971
0
                            return v53;
1972
                        }
1973
0
                        _ => {}
1974
                    }
1975
                }
1976
0
                _ => {}
1977
            }
1978
        }
1979
        &ProducesFlags::ProducesFlagsReturnsReg {
1980
0
            inst: ref v40,
1981
0
            result: v41,
1982
0
        } => {
1983
0
            match arg1 {
1984
                &ConsumesAndProducesFlags::SideEffect {
1985
0
                    inst: ref v3,
1986
0
                } => {
1987
0
                    match arg2 {
1988
                        &ConsumesFlags::ConsumesFlagsSideEffect {
1989
0
                            inst: ref v5,
1990
0
                        } => {
1991
0
                            let v42 = C::emit(ctx, v40);
1992
0
                            let v7 = C::emit(ctx, v3);
1993
0
                            let v8 = C::emit(ctx, v5);
1994
0
                            let v43 = MultiReg::One {
1995
0
                                a: v41,
1996
0
                            };
1997
0
                            // Rule at src/prelude_lower.isle line 613.
1998
0
                            return v43;
1999
                        }
2000
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2001
0
                            inst1: ref v10,
2002
0
                            inst2: ref v11,
2003
0
                        } => {
2004
0
                            let v42 = C::emit(ctx, v40);
2005
0
                            let v7 = C::emit(ctx, v3);
2006
0
                            let v12 = C::emit(ctx, v10);
2007
0
                            let v13 = C::emit(ctx, v11);
2008
0
                            let v43 = MultiReg::One {
2009
0
                                a: v41,
2010
0
                            };
2011
0
                            // Rule at src/prelude_lower.isle line 621.
2012
0
                            return v43;
2013
                        }
2014
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2015
0
                            inst: ref v14,
2016
0
                            result: v15,
2017
0
                        } => {
2018
0
                            let v42 = C::emit(ctx, v40);
2019
0
                            let v7 = C::emit(ctx, v3);
2020
0
                            let v16 = C::emit(ctx, v14);
2021
0
                            let v44 = MultiReg::Two {
2022
0
                                a: v41,
2023
0
                                b: v15,
2024
0
                            };
2025
0
                            // Rule at src/prelude_lower.isle line 630.
2026
0
                            return v44;
2027
                        }
2028
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2029
0
                            inst1: ref v18,
2030
0
                            inst2: ref v19,
2031
0
                            result: v20,
2032
0
                        } => {
2033
0
                            let v42 = C::emit(ctx, v40);
2034
0
                            let v7 = C::emit(ctx, v3);
2035
0
                            let v21 = C::emit(ctx, v18);
2036
0
                            let v22 = C::emit(ctx, v19);
2037
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2038
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2039
0
                            let v45 = MultiReg::Three {
2040
0
                                a: v41,
2041
0
                                b: v24,
2042
0
                                c: v26,
2043
0
                            };
2044
0
                            // Rule at src/prelude_lower.isle line 638.
2045
0
                            return v45;
2046
                        }
2047
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2048
0
                            inst1: ref v28,
2049
0
                            inst2: ref v29,
2050
0
                            inst3: ref v30,
2051
0
                            inst4: ref v31,
2052
0
                            result: v32,
2053
0
                        } => {
2054
0
                            let v42 = C::emit(ctx, v40);
2055
0
                            let v7 = C::emit(ctx, v3);
2056
0
                            let v33 = C::emit(ctx, v28);
2057
0
                            let v34 = C::emit(ctx, v29);
2058
0
                            let v35 = C::emit(ctx, v30);
2059
0
                            let v36 = C::emit(ctx, v31);
2060
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2061
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2062
0
                            let v46 = MultiReg::Three {
2063
0
                                a: v41,
2064
0
                                b: v37,
2065
0
                                c: v38,
2066
0
                            };
2067
0
                            // Rule at src/prelude_lower.isle line 647.
2068
0
                            return v46;
2069
                        }
2070
0
                        _ => {}
2071
                    }
2072
                }
2073
                &ConsumesAndProducesFlags::ReturnsReg {
2074
0
                    inst: ref v47,
2075
0
                    result: v48,
2076
0
                } => {
2077
0
                    match arg2 {
2078
                        &ConsumesFlags::ConsumesFlagsSideEffect {
2079
0
                            inst: ref v5,
2080
0
                        } => {
2081
0
                            let v42 = C::emit(ctx, v40);
2082
0
                            let v49 = C::emit(ctx, v47);
2083
0
                            let v8 = C::emit(ctx, v5);
2084
0
                            let v54 = MultiReg::Two {
2085
0
                                a: v41,
2086
0
                                b: v48,
2087
0
                            };
2088
0
                            // Rule at src/prelude_lower.isle line 707.
2089
0
                            return v54;
2090
                        }
2091
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2092
0
                            inst1: ref v10,
2093
0
                            inst2: ref v11,
2094
0
                        } => {
2095
0
                            let v42 = C::emit(ctx, v40);
2096
0
                            let v49 = C::emit(ctx, v47);
2097
0
                            let v12 = C::emit(ctx, v10);
2098
0
                            let v13 = C::emit(ctx, v11);
2099
0
                            let v54 = MultiReg::Two {
2100
0
                                a: v41,
2101
0
                                b: v48,
2102
0
                            };
2103
0
                            // Rule at src/prelude_lower.isle line 715.
2104
0
                            return v54;
2105
                        }
2106
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2107
0
                            inst: ref v14,
2108
0
                            result: v15,
2109
0
                        } => {
2110
0
                            let v42 = C::emit(ctx, v40);
2111
0
                            let v49 = C::emit(ctx, v47);
2112
0
                            let v16 = C::emit(ctx, v14);
2113
0
                            let v55 = MultiReg::Three {
2114
0
                                a: v41,
2115
0
                                b: v48,
2116
0
                                c: v15,
2117
0
                            };
2118
0
                            // Rule at src/prelude_lower.isle line 724.
2119
0
                            return v55;
2120
                        }
2121
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2122
0
                            inst1: ref v18,
2123
0
                            inst2: ref v19,
2124
0
                            result: v20,
2125
0
                        } => {
2126
0
                            let v42 = C::emit(ctx, v40);
2127
0
                            let v49 = C::emit(ctx, v47);
2128
0
                            let v21 = C::emit(ctx, v18);
2129
0
                            let v22 = C::emit(ctx, v19);
2130
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2131
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2132
0
                            let v56 = MultiReg::Four {
2133
0
                                a: v41,
2134
0
                                b: v48,
2135
0
                                c: v24,
2136
0
                                d: v26,
2137
0
                            };
2138
0
                            // Rule at src/prelude_lower.isle line 732.
2139
0
                            return v56;
2140
                        }
2141
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2142
0
                            inst1: ref v28,
2143
0
                            inst2: ref v29,
2144
0
                            inst3: ref v30,
2145
0
                            inst4: ref v31,
2146
0
                            result: v32,
2147
0
                        } => {
2148
0
                            let v42 = C::emit(ctx, v40);
2149
0
                            let v49 = C::emit(ctx, v47);
2150
0
                            let v33 = C::emit(ctx, v28);
2151
0
                            let v34 = C::emit(ctx, v29);
2152
0
                            let v35 = C::emit(ctx, v30);
2153
0
                            let v36 = C::emit(ctx, v31);
2154
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2155
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2156
0
                            let v57 = MultiReg::Four {
2157
0
                                a: v41,
2158
0
                                b: v48,
2159
0
                                c: v37,
2160
0
                                d: v38,
2161
0
                            };
2162
0
                            // Rule at src/prelude_lower.isle line 741.
2163
0
                            return v57;
2164
                        }
2165
0
                        _ => {}
2166
                    }
2167
                }
2168
0
                _ => {}
2169
            }
2170
        }
2171
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
2172
0
            inst: ref v58,
2173
0
            result: v59,
2174
        } => {
2175
            if let &ConsumesAndProducesFlags::ReturnsReg {
2176
0
                inst: ref v47,
2177
0
                result: v48,
2178
0
            } = arg1 {
2179
0
                match arg2 {
2180
                    &ConsumesFlags::ConsumesFlagsSideEffect {
2181
0
                        inst: ref v5,
2182
0
                    } => {
2183
0
                        let v60 = C::emit(ctx, v58);
2184
0
                        let v49 = C::emit(ctx, v47);
2185
0
                        let v8 = C::emit(ctx, v5);
2186
0
                        let v61 = MultiReg::Two {
2187
0
                            a: v59,
2188
0
                            b: v48,
2189
0
                        };
2190
0
                        // Rule at src/prelude_lower.isle line 753.
2191
0
                        return v61;
2192
                    }
2193
                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
2194
0
                        inst1: ref v10,
2195
0
                        inst2: ref v11,
2196
0
                    } => {
2197
0
                        let v60 = C::emit(ctx, v58);
2198
0
                        let v49 = C::emit(ctx, v47);
2199
0
                        let v12 = C::emit(ctx, v10);
2200
0
                        let v13 = C::emit(ctx, v11);
2201
0
                        let v61 = MultiReg::Two {
2202
0
                            a: v59,
2203
0
                            b: v48,
2204
0
                        };
2205
0
                        // Rule at src/prelude_lower.isle line 761.
2206
0
                        return v61;
2207
                    }
2208
                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
2209
0
                        inst: ref v63,
2210
0
                        result: v64,
2211
0
                    } => {
2212
0
                        let v60 = C::emit(ctx, v58);
2213
0
                        let v49 = C::emit(ctx, v47);
2214
0
                        let v65 = C::emit(ctx, v63);
2215
0
                        let v66 = MultiReg::Three {
2216
0
                            a: v59,
2217
0
                            b: v48,
2218
0
                            c: v64,
2219
0
                        };
2220
0
                        // Rule at src/prelude_lower.isle line 778.
2221
0
                        return v66;
2222
                    }
2223
                    &ConsumesFlags::ConsumesFlagsReturnsReg {
2224
0
                        inst: ref v14,
2225
0
                        result: v15,
2226
0
                    } => {
2227
0
                        let v60 = C::emit(ctx, v58);
2228
0
                        let v49 = C::emit(ctx, v47);
2229
0
                        let v16 = C::emit(ctx, v14);
2230
0
                        let v62 = MultiReg::Three {
2231
0
                            a: v59,
2232
0
                            b: v48,
2233
0
                            c: v15,
2234
0
                        };
2235
0
                        // Rule at src/prelude_lower.isle line 770.
2236
0
                        return v62;
2237
                    }
2238
                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2239
0
                        inst1: ref v18,
2240
0
                        inst2: ref v19,
2241
0
                        result: v20,
2242
0
                    } => {
2243
0
                        let v60 = C::emit(ctx, v58);
2244
0
                        let v49 = C::emit(ctx, v47);
2245
0
                        let v21 = C::emit(ctx, v18);
2246
0
                        let v22 = C::emit(ctx, v19);
2247
0
                        let v24 = C::value_regs_get(ctx, v20, 0x0);
2248
0
                        let v26 = C::value_regs_get(ctx, v20, 0x1);
2249
0
                        let v67 = MultiReg::Four {
2250
0
                            a: v59,
2251
0
                            b: v48,
2252
0
                            c: v24,
2253
0
                            d: v26,
2254
0
                        };
2255
0
                        // Rule at src/prelude_lower.isle line 786.
2256
0
                        return v67;
2257
                    }
2258
                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2259
0
                        inst1: ref v28,
2260
0
                        inst2: ref v29,
2261
0
                        inst3: ref v30,
2262
0
                        inst4: ref v31,
2263
0
                        result: v32,
2264
0
                    } => {
2265
0
                        let v60 = C::emit(ctx, v58);
2266
0
                        let v49 = C::emit(ctx, v47);
2267
0
                        let v33 = C::emit(ctx, v28);
2268
0
                        let v34 = C::emit(ctx, v29);
2269
0
                        let v35 = C::emit(ctx, v30);
2270
0
                        let v36 = C::emit(ctx, v31);
2271
0
                        let v37 = C::value_regs_get(ctx, v32, 0x0);
2272
0
                        let v38 = C::value_regs_get(ctx, v32, 0x1);
2273
0
                        let v68 = MultiReg::Four {
2274
0
                            a: v59,
2275
0
                            b: v48,
2276
0
                            c: v37,
2277
0
                            d: v38,
2278
0
                        };
2279
0
                        // Rule at src/prelude_lower.isle line 795.
2280
0
                        return v68;
2281
                    }
2282
0
                    _ => {}
2283
                }
2284
0
            }
2285
        }
2286
0
        _ => {}
2287
    }
2288
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags_chained", "src/prelude_lower.isle line 563")
2289
0
}
2290
2291
// Generated as internal constructor for term lower_return.
2292
24.9k
pub fn constructor_lower_return<C: Context>(
2293
24.9k
    ctx: &mut C,
2294
24.9k
    arg0: Range,
2295
24.9k
    arg1: ValueSlice,
2296
24.9k
) -> InstOutput {
2297
24.9k
    let v2 = C::gen_return(ctx, arg1);
2298
24.9k
    let v3 = C::output_none(ctx);
2299
24.9k
    // Rule at src/prelude_lower.isle line 990.
2300
24.9k
    return v3;
2301
24.9k
}
2302
2303
// Generated as internal constructor for term operand_size_bits.
2304
124k
pub fn constructor_operand_size_bits<C: Context>(
2305
124k
    ctx: &mut C,
2306
124k
    arg0: &OperandSize,
2307
124k
) -> u16 {
2308
124k
    match arg0 {
2309
        &OperandSize::Size8 => {
2310
            // Rule at src/isa/x64/inst.isle line 709.
2311
0
            return 0x8;
2312
        }
2313
        &OperandSize::Size16 => {
2314
            // Rule at src/isa/x64/inst.isle line 710.
2315
0
            return 0x10;
2316
        }
2317
        &OperandSize::Size32 => {
2318
            // Rule at src/isa/x64/inst.isle line 711.
2319
8.21k
            return 0x20;
2320
        }
2321
        &OperandSize::Size64 => {
2322
            // Rule at src/isa/x64/inst.isle line 712.
2323
116k
            return 0x40;
2324
        }
2325
0
        _ => {}
2326
0
    }
2327
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "operand_size_bits", "src/isa/x64/inst.isle line 708")
2328
124k
}
2329
2330
// Generated as internal constructor for term reg_mem_to_reg_mem_imm.
2331
0
pub fn constructor_reg_mem_to_reg_mem_imm<C: Context>(
2332
0
    ctx: &mut C,
2333
0
    arg0: &RegMem,
2334
0
) -> RegMemImm {
2335
0
    match arg0 {
2336
        &RegMem::Reg {
2337
0
            reg: v1,
2338
0
        } => {
2339
0
            let v2 = RegMemImm::Reg {
2340
0
                reg: v1,
2341
0
            };
2342
0
            // Rule at src/isa/x64/inst.isle line 951.
2343
0
            return v2;
2344
        }
2345
        &RegMem::Mem {
2346
0
            addr: ref v3,
2347
0
        } => {
2348
0
            let v4 = RegMemImm::Mem {
2349
0
                addr: v3.clone(),
2350
0
            };
2351
0
            // Rule at src/isa/x64/inst.isle line 953.
2352
0
            return v4;
2353
        }
2354
0
        _ => {}
2355
0
    }
2356
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "reg_mem_to_reg_mem_imm", "src/isa/x64/inst.isle line 950")
2357
0
}
2358
2359
// Generated as internal constructor for term amode_imm_reg_flags.
2360
0
pub fn constructor_amode_imm_reg_flags<C: Context>(
2361
0
    ctx: &mut C,
2362
0
    arg0: u32,
2363
0
    arg1: Gpr,
2364
0
    arg2: MemFlags,
2365
0
) -> Amode {
2366
0
    let v3 = &C::amode_imm_reg(ctx, arg0, arg1);
2367
0
    let v4 = &C::amode_with_flags(ctx, v3, arg2);
2368
0
    // Rule at src/isa/x64/inst.isle line 1005.
2369
0
    return v4.clone();
2370
0
}
2371
2372
// Generated as internal constructor for term amode_imm_reg_reg_shift_flags.
2373
0
pub fn constructor_amode_imm_reg_reg_shift_flags<C: Context>(
2374
0
    ctx: &mut C,
2375
0
    arg0: u32,
2376
0
    arg1: Gpr,
2377
0
    arg2: Gpr,
2378
0
    arg3: u8,
2379
0
    arg4: MemFlags,
2380
0
) -> Amode {
2381
0
    let v5 = &C::amode_imm_reg_reg_shift(ctx, arg0, arg1, arg2, arg3);
2382
0
    let v6 = &C::amode_with_flags(ctx, v5, arg4);
2383
0
    // Rule at src/isa/x64/inst.isle line 1012.
2384
0
    return v6.clone();
2385
0
}
2386
2387
// Generated as internal constructor for term to_amode.
2388
1.31M
pub fn constructor_to_amode<C: Context>(
2389
1.31M
    ctx: &mut C,
2390
1.31M
    arg0: MemFlags,
2391
1.31M
    arg1: Value,
2392
1.31M
    arg2: Offset32,
2393
1.31M
) -> Amode {
2394
1.31M
    let v2 = C::value_type(ctx, arg1);
2395
1.31M
    let v3 = C::ty_addr64(ctx, v2);
2396
1.31M
    if let Some(v4) = v3 {
2397
1.31M
        let v6 = &constructor_amode_initial(ctx, arg0, arg2);
2398
1.31M
        let v7 = &constructor_amode_add(ctx, v6, arg1);
2399
1.31M
        let v8 = &constructor_amode_finalize(ctx, v7);
2400
1.31M
        // Rule at src/isa/x64/inst.isle line 1174.
2401
1.31M
        return v8.clone();
2402
0
    }
2403
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "to_amode", "src/isa/x64/inst.isle line 1076")
2404
1.31M
}
2405
2406
// Generated as internal constructor for term amode_initial.
2407
1.31M
pub fn constructor_amode_initial<C: Context>(
2408
1.31M
    ctx: &mut C,
2409
1.31M
    arg0: MemFlags,
2410
1.31M
    arg1: Offset32,
2411
1.31M
) -> Amode {
2412
1.31M
    let v3 = C::invalid_reg(ctx);
2413
1.31M
    let v2 = C::offset32(ctx, arg1);
2414
1.31M
    let v4 = Amode::ImmReg {
2415
1.31M
        simm32: v2,
2416
1.31M
        base: v3,
2417
1.31M
        flags: arg0,
2418
1.31M
    };
2419
1.31M
    // Rule at src/isa/x64/inst.isle line 1082.
2420
1.31M
    return v4;
2421
1.31M
}
2422
2423
// Generated as internal constructor for term amode_add.
2424
4.07M
pub fn constructor_amode_add<C: Context>(
2425
4.07M
    ctx: &mut C,
2426
4.07M
    arg0: &Amode,
2427
4.07M
    arg1: Value,
2428
4.07M
) -> Amode {
2429
4.07M
    let v2 = C::def_inst(ctx, arg1);
2430
4.07M
    if let Some(
v33.83M
) = v2 {
2431
3.83M
        let v4 = &C::inst_data(ctx, v3);
2432
3.83M
        match v4 {
2433
            &InstructionData::Binary {
2434
1.37M
                opcode: ref v5,
2435
1.37M
                args: ref v6,
2436
1.37M
            } => {
2437
1.37M
                match v5 {
2438
                    &Opcode::Iadd => {
2439
1.37M
                        let v7 = C::unpack_value_array_2(ctx, v6);
2440
1.37M
                        let v10 = &constructor_amode_add(ctx, arg0, v7.0);
2441
1.37M
                        let v11 = &constructor_amode_add(ctx, v10, v7.1);
2442
1.37M
                        // Rule at src/isa/x64/inst.isle line 1096.
2443
1.37M
                        return v11.clone();
2444
                    }
2445
                    &Opcode::Ishl => {
2446
                        if let &Amode::ImmReg {
2447
18.4E
                            simm32: v12,
2448
18.4E
                            base: v13,
2449
18.4E
                            flags: v14,
2450
18.4E
                        } = arg0 {
2451
18.4E
                            let v15 = C::is_valid_reg(ctx, v13);
2452
18.4E
                            if v15 == true {
2453
18.4E
                                let v7 = C::unpack_value_array_2(ctx, v6);
2454
18.4E
                                let v22 = C::def_inst(ctx, v7.1);
2455
18.4E
                                if let Some(v23) = v22 {
2456
18.4E
                                    let v24 = &C::inst_data(ctx, v23);
2457
                                    if let &InstructionData::UnaryImm {
2458
18.4E
                                        opcode: ref v25,
2459
18.4E
                                        imm: v26,
2460
18.4E
                                    } = v24 {
2461
18.4E
                                        if let &Opcode::Iconst = v25 {
2462
18.4E
                                            let v27 = C::uimm8(ctx, v26);
2463
18.4E
                                            if let Some(v28) = v27 {
2464
18.4E
                                                let v29 = C::u8_as_u32(ctx, v28);
2465
18.4E
                                                let v31 = C::u32_lteq(ctx, v29, 0x3);
2466
18.4E
                                                if let Some(
v320
) = v31 {
2467
0
                                                    let v18 = C::gpr_new(ctx, v13);
2468
0
                                                    let v33 = constructor_put_in_gpr(ctx, v7.0);
2469
0
                                                    let v34 = Amode::ImmRegRegShift {
2470
0
                                                        simm32: v12,
2471
0
                                                        base: v18,
2472
0
                                                        index: v33,
2473
0
                                                        shift: v28,
2474
0
                                                        flags: v14,
2475
0
                                                    };
2476
0
                                                    // Rule at src/isa/x64/inst.isle line 1120.
2477
0
                                                    return v34;
2478
0
                                                }
2479
0
                                            }
2480
0
                                        }
2481
0
                                    }
2482
0
                                }
2483
0
                            }
2484
0
                        }
2485
                    }
2486
0
                    _ => {}
2487
                }
2488
            }
2489
            &InstructionData::Unary {
2490
946k
                opcode: ref v50,
2491
946k
                arg: v51,
2492
946k
            } => {
2493
946k
                match v50 {
2494
                    &Opcode::Uextend => {
2495
946k
                        match arg0 {
2496
                            &Amode::ImmReg {
2497
946k
                                simm32: v12,
2498
946k
                                base: v13,
2499
946k
                                flags: v14,
2500
946k
                            } => {
2501
946k
                                let v52 = C::def_inst(ctx, v51);
2502
946k
                                if let Some(
v53853k
) = v52 {
2503
853k
                                    let v54 = &C::inst_data(ctx, v53);
2504
                                    if let &InstructionData::UnaryImm {
2505
18.4E
                                        opcode: ref v55,
2506
18.4E
                                        imm: v56,
2507
853k
                                    } = v54 {
2508
18.4E
                                        if let &Opcode::Iconst = v55 {
2509
18.4E
                                            let v57 = C::simm32(ctx, v56);
2510
18.4E
                                            if let Some(v58) = v57 {
2511
18.4E
                                                let v59 = C::u32_nonnegative(ctx, v58);
2512
18.4E
                                                if let Some(v60) = v59 {
2513
18.4E
                                                    let v61 = C::s32_add_fallible(ctx, v12, v60);
2514
18.4E
                                                    if let Some(
v620
) = v61 {
2515
0
                                                        let v63 = Amode::ImmReg {
2516
0
                                                            simm32: v62,
2517
0
                                                            base: v13,
2518
0
                                                            flags: v14,
2519
0
                                                        };
2520
0
                                                        // Rule at src/isa/x64/inst.isle line 1145.
2521
0
                                                        return v63;
2522
0
                                                    }
2523
0
                                                }
2524
0
                                            }
2525
0
                                        }
2526
853k
                                    }
2527
93.2k
                                }
2528
                            }
2529
                            &Amode::ImmRegRegShift {
2530
0
                                simm32: v42,
2531
0
                                base: v43,
2532
0
                                index: v44,
2533
0
                                shift: v45,
2534
0
                                flags: v46,
2535
0
                            } => {
2536
0
                                let v52 = C::def_inst(ctx, v51);
2537
0
                                if let Some(v53) = v52 {
2538
0
                                    let v54 = &C::inst_data(ctx, v53);
2539
                                    if let &InstructionData::UnaryImm {
2540
0
                                        opcode: ref v55,
2541
0
                                        imm: v56,
2542
0
                                    } = v54 {
2543
0
                                        if let &Opcode::Iconst = v55 {
2544
0
                                            let v57 = C::simm32(ctx, v56);
2545
0
                                            if let Some(v58) = v57 {
2546
0
                                                let v59 = C::u32_nonnegative(ctx, v58);
2547
0
                                                if let Some(v60) = v59 {
2548
0
                                                    let v64 = C::s32_add_fallible(ctx, v42, v60);
2549
0
                                                    if let Some(v65) = v64 {
2550
0
                                                        let v66 = Amode::ImmRegRegShift {
2551
0
                                                            simm32: v65,
2552
0
                                                            base: v43,
2553
0
                                                            index: v44,
2554
0
                                                            shift: v45,
2555
0
                                                            flags: v46,
2556
0
                                                        };
2557
0
                                                        // Rule at src/isa/x64/inst.isle line 1149.
2558
0
                                                        return v66;
2559
0
                                                    }
2560
0
                                                }
2561
0
                                            }
2562
0
                                        }
2563
0
                                    }
2564
0
                                }
2565
                            }
2566
0
                            _ => {}
2567
                        }
2568
                    }
2569
                    &Opcode::Sextend => {
2570
0
                        match arg0 {
2571
                            &Amode::ImmReg {
2572
0
                                simm32: v12,
2573
0
                                base: v13,
2574
0
                                flags: v14,
2575
0
                            } => {
2576
0
                                let v52 = C::def_inst(ctx, v51);
2577
0
                                if let Some(v53) = v52 {
2578
0
                                    let v54 = &C::inst_data(ctx, v53);
2579
                                    if let &InstructionData::UnaryImm {
2580
0
                                        opcode: ref v55,
2581
0
                                        imm: v56,
2582
0
                                    } = v54 {
2583
0
                                        if let &Opcode::Iconst = v55 {
2584
0
                                            let v57 = C::simm32(ctx, v56);
2585
0
                                            if let Some(v58) = v57 {
2586
0
                                                let v67 = C::s32_add_fallible(ctx, v12, v58);
2587
0
                                                if let Some(v68) = v67 {
2588
0
                                                    let v69 = Amode::ImmReg {
2589
0
                                                        simm32: v68,
2590
0
                                                        base: v13,
2591
0
                                                        flags: v14,
2592
0
                                                    };
2593
0
                                                    // Rule at src/isa/x64/inst.isle line 1155.
2594
0
                                                    return v69;
2595
0
                                                }
2596
0
                                            }
2597
0
                                        }
2598
0
                                    }
2599
0
                                }
2600
                            }
2601
                            &Amode::ImmRegRegShift {
2602
0
                                simm32: v42,
2603
0
                                base: v43,
2604
0
                                index: v44,
2605
0
                                shift: v45,
2606
0
                                flags: v46,
2607
0
                            } => {
2608
0
                                let v52 = C::def_inst(ctx, v51);
2609
0
                                if let Some(v53) = v52 {
2610
0
                                    let v54 = &C::inst_data(ctx, v53);
2611
                                    if let &InstructionData::UnaryImm {
2612
0
                                        opcode: ref v55,
2613
0
                                        imm: v56,
2614
0
                                    } = v54 {
2615
0
                                        if let &Opcode::Iconst = v55 {
2616
0
                                            let v57 = C::simm32(ctx, v56);
2617
0
                                            if let Some(v58) = v57 {
2618
0
                                                let v70 = C::s32_add_fallible(ctx, v42, v58);
2619
0
                                                if let Some(v71) = v70 {
2620
0
                                                    let v72 = Amode::ImmRegRegShift {
2621
0
                                                        simm32: v71,
2622
0
                                                        base: v43,
2623
0
                                                        index: v44,
2624
0
                                                        shift: v45,
2625
0
                                                        flags: v46,
2626
0
                                                    };
2627
0
                                                    // Rule at src/isa/x64/inst.isle line 1159.
2628
0
                                                    return v72;
2629
0
                                                }
2630
0
                                            }
2631
0
                                        }
2632
0
                                    }
2633
0
                                }
2634
                            }
2635
0
                            _ => {}
2636
                        }
2637
                    }
2638
0
                    _ => {}
2639
                }
2640
            }
2641
            &InstructionData::UnaryImm {
2642
433k
                opcode: ref v35,
2643
433k
                imm: v36,
2644
433k
            } => {
2645
433k
                if let &Opcode::Iconst = v35 {
2646
433k
                    match arg0 {
2647
                        &Amode::ImmReg {
2648
33.1k
                            simm32: v12,
2649
33.1k
                            base: v13,
2650
33.1k
                            flags: v14,
2651
33.1k
                        } => {
2652
33.1k
                            let v37 = C::simm32(ctx, v36);
2653
33.1k
                            if let Some(v38) = v37 {
2654
33.1k
                                let v39 = C::s32_add_fallible(ctx, v12, v38);
2655
33.1k
                                if let Some(
v4033.1k
) = v39 {
2656
33.1k
                                    let v41 = Amode::ImmReg {
2657
33.1k
                                        simm32: v40,
2658
33.1k
                                        base: v13,
2659
33.1k
                                        flags: v14,
2660
33.1k
                                    };
2661
33.1k
                                    // Rule at src/isa/x64/inst.isle line 1132.
2662
33.1k
                                    return v41;
2663
0
                                }
2664
0
                            }
2665
                        }
2666
                        &Amode::ImmRegRegShift {
2667
400k
                            simm32: v42,
2668
400k
                            base: v43,
2669
400k
                            index: v44,
2670
400k
                            shift: v45,
2671
400k
                            flags: v46,
2672
400k
                        } => {
2673
400k
                            let v37 = C::simm32(ctx, v36);
2674
400k
                            if let Some(v38) = v37 {
2675
400k
                                let v47 = C::s32_add_fallible(ctx, v42, v38);
2676
400k
                                if let Some(v48) = v47 {
2677
400k
                                    let v49 = Amode::ImmRegRegShift {
2678
400k
                                        simm32: v48,
2679
400k
                                        base: v43,
2680
400k
                                        index: v44,
2681
400k
                                        shift: v45,
2682
400k
                                        flags: v46,
2683
400k
                                    };
2684
400k
                                    // Rule at src/isa/x64/inst.isle line 1136.
2685
400k
                                    return v49;
2686
0
                                }
2687
0
                            }
2688
                        }
2689
0
                        _ => {}
2690
                    }
2691
0
                }
2692
            }
2693
1.07M
            _ => {}
2694
        }
2695
241k
    }
2696
2.26M
    match arg0 {
2697
        &Amode::ImmReg {
2698
2.26M
            simm32: v12,
2699
2.26M
            base: v13,
2700
2.26M
            flags: v14,
2701
2.26M
        } => {
2702
2.26M
            let v15 = C::is_valid_reg(ctx, v13);
2703
2.26M
            match v15 {
2704
                true => {
2705
946k
                    let v18 = C::gpr_new(ctx, v13);
2706
946k
                    let v19 = constructor_put_in_gpr(ctx, arg1);
2707
946k
                    let v21 = Amode::ImmRegRegShift {
2708
946k
                        simm32: v12,
2709
946k
                        base: v18,
2710
946k
                        index: v19,
2711
946k
                        shift: 0x0,
2712
946k
                        flags: v14,
2713
946k
                    };
2714
946k
                    // Rule at src/isa/x64/inst.isle line 1111.
2715
946k
                    return v21;
2716
                }
2717
                false => {
2718
1.31M
                    let v16 = C::put_in_reg(ctx, arg1);
2719
1.31M
                    let v17 = Amode::ImmReg {
2720
1.31M
                        simm32: v12,
2721
1.31M
                        base: v16,
2722
1.31M
                        flags: v14,
2723
1.31M
                    };
2724
1.31M
                    // Rule at src/isa/x64/inst.isle line 1105.
2725
1.31M
                    return v17;
2726
                }
2727
                _ => {}
2728
            }
2729
        }
2730
        &Amode::ImmRegRegShift {
2731
0
            simm32: v42,
2732
0
            base: v43,
2733
0
            index: v44,
2734
0
            shift: v45,
2735
0
            flags: v46,
2736
0
        } => {
2737
0
            let v74 = &constructor_put_in_gpr_mem_imm(ctx, arg1);
2738
0
            let v75 = constructor_x64_add(ctx, I64, v43, v74);
2739
0
            let v76 = Amode::ImmRegRegShift {
2740
0
                simm32: v42,
2741
0
                base: v75,
2742
0
                index: v44,
2743
0
                shift: v45,
2744
0
                flags: v46,
2745
0
            };
2746
0
            // Rule at src/isa/x64/inst.isle line 1169.
2747
0
            return v76;
2748
        }
2749
0
        _ => {}
2750
    }
2751
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "amode_add", "src/isa/x64/inst.isle line 1087")
2752
4.07M
}
2753
2754
// Generated as internal constructor for term amode_finalize.
2755
pub fn constructor_amode_finalize<C: Context>(
2756
    ctx: &mut C,
2757
    arg0: &Amode,
2758
) -> Amode {
2759
    if let &Amode::ImmReg {
2760
367k
        simm32: v1,
2761
367k
        base: v2,
2762
367k
        flags: v3,
2763
1.31M
    } = arg0 {
2764
367k
        let v4 = C::is_valid_reg(ctx, v2);
2765
367k
        if v4 == false {
2766
0
            let v7 = constructor_imm(ctx, I64, 0x0);
2767
0
            let v8 = Amode::ImmReg {
2768
0
                simm32: v1,
2769
0
                base: v7,
2770
0
                flags: v3,
2771
0
            };
2772
0
            // Rule at src/isa/x64/inst.isle line 1181.
2773
0
            return v8;
2774
368k
        }
2775
947k
    }
2776
    // Rule at src/isa/x64/inst.isle line 1183.
2777
1.31M
    return arg0.clone();
2778
1.31M
}
2779
2780
// Generated as internal constructor for term put_masked_in_imm8_gpr.
2781
54.6k
pub fn constructor_put_masked_in_imm8_gpr<C: Context>(
2782
54.6k
    ctx: &mut C,
2783
54.6k
    arg0: Value,
2784
54.6k
    arg1: Type,
2785
54.6k
) -> Imm8Gpr {
2786
54.6k
    let v1 = C::def_inst(ctx, arg0);
2787
54.6k
    if let Some(
v254.6k
) = v1 {
2788
54.6k
        let v3 = &C::inst_data(ctx, v2);
2789
        if let &InstructionData::UnaryImm {
2790
54.0k
            opcode: ref v4,
2791
54.0k
            imm: v5,
2792
54.6k
        } = v3 {
2793
54.0k
            if let &Opcode::Iconst = v4 {
2794
54.0k
                let v6 = C::u64_from_imm64(ctx, v5);
2795
54.0k
                let v8 = &C::const_to_type_masked_imm8(ctx, v6, arg1);
2796
54.0k
                // Rule at src/isa/x64/inst.isle line 1218.
2797
54.0k
                return v8.clone();
2798
0
            }
2799
562
        }
2800
14
    }
2801
576
    let v9 = C::fits_in_16(ctx, arg1);
2802
576
    if let Some(
v100
) = v9 {
2803
0
        let v12 = C::put_in_regs(ctx, arg0);
2804
0
        let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
2805
0
        let v15 = C::shift_mask(ctx, v10);
2806
0
        let v16 = RegMemImm::Imm {
2807
0
            simm32: v15,
2808
0
        };
2809
0
        let v17 = &C::gpr_mem_imm_new(ctx, &v16);
2810
0
        let v18 = constructor_x64_and(ctx, I64, v14, v17);
2811
0
        let v19 = &C::gpr_to_imm8_gpr(ctx, v18);
2812
0
        // Rule at src/isa/x64/inst.isle line 1220.
2813
0
        return v19.clone();
2814
576
    }
2815
576
    let v12 = C::put_in_regs(ctx, arg0);
2816
576
    let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
2817
576
    let v20 = &C::gpr_to_imm8_gpr(ctx, v14);
2818
576
    // Rule at src/isa/x64/inst.isle line 1222.
2819
576
    return v20.clone();
2820
54.6k
}
2821
2822
// Generated as internal constructor for term reg_to_gpr_mem_imm.
2823
11.1k
pub fn constructor_reg_to_gpr_mem_imm<C: Context>(
2824
11.1k
    ctx: &mut C,
2825
11.1k
    arg0: Reg,
2826
11.1k
) -> GprMemImm {
2827
11.1k
    let v1 = C::gpr_new(ctx, arg0);
2828
11.1k
    let v2 = &C::gpr_to_gpr_mem_imm(ctx, v1);
2829
11.1k
    // Rule at src/isa/x64/inst.isle line 1628.
2830
11.1k
    return v2.clone();
2831
11.1k
}
2832
2833
// Generated as internal constructor for term put_in_gpr.
2834
3.04M
pub fn constructor_put_in_gpr<C: Context>(
2835
3.04M
    ctx: &mut C,
2836
3.04M
    arg0: Value,
2837
3.04M
) -> Gpr {
2838
3.04M
    let v1 = C::put_in_reg(ctx, arg0);
2839
3.04M
    let v2 = C::gpr_new(ctx, v1);
2840
3.04M
    // Rule at src/isa/x64/inst.isle line 1635.
2841
3.04M
    return v2;
2842
3.04M
}
2843
2844
// Generated as internal constructor for term put_in_gpr_mem.
2845
138k
pub fn constructor_put_in_gpr_mem<C: Context>(
2846
138k
    ctx: &mut C,
2847
138k
    arg0: Value,
2848
138k
) -> GprMem {
2849
138k
    let v1 = &C::put_in_reg_mem(ctx, arg0);
2850
138k
    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
2851
138k
    // Rule at src/isa/x64/inst.isle line 1642.
2852
138k
    return v2.clone();
2853
138k
}
2854
2855
// Generated as internal constructor for term put_in_gpr_mem_imm.
2856
962k
pub fn constructor_put_in_gpr_mem_imm<C: Context>(
2857
962k
    ctx: &mut C,
2858
962k
    arg0: Value,
2859
962k
) -> GprMemImm {
2860
962k
    let v1 = &C::put_in_reg_mem_imm(ctx, arg0);
2861
962k
    let v2 = &C::gpr_mem_imm_new(ctx, v1);
2862
962k
    // Rule at src/isa/x64/inst.isle line 1649.
2863
962k
    return v2.clone();
2864
962k
}
2865
2866
// Generated as internal constructor for term put_in_xmm.
2867
1
pub fn constructor_put_in_xmm<C: Context>(
2868
1
    ctx: &mut C,
2869
1
    arg0: Value,
2870
1
) -> Xmm {
2871
1
    let v1 = C::put_in_reg(ctx, arg0);
2872
1
    let v2 = C::xmm_new(ctx, v1);
2873
1
    // Rule at src/isa/x64/inst.isle line 1656.
2874
1
    return v2;
2875
1
}
2876
2877
// Generated as internal constructor for term output_gpr.
2878
1.76M
pub fn constructor_output_gpr<C: Context>(
2879
1.76M
    ctx: &mut C,
2880
1.76M
    arg0: Gpr,
2881
1.76M
) -> InstOutput {
2882
1.76M
    let v1 = C::gpr_to_reg(ctx, arg0);
2883
1.76M
    let v2 = constructor_output_reg(ctx, v1);
2884
1.76M
    // Rule at src/isa/x64/inst.isle line 1673.
2885
1.76M
    return v2;
2886
1.76M
}
2887
2888
// Generated as internal constructor for term value_gprs.
2889
0
pub fn constructor_value_gprs<C: Context>(
2890
0
    ctx: &mut C,
2891
0
    arg0: Gpr,
2892
0
    arg1: Gpr,
2893
0
) -> ValueRegs {
2894
0
    let v2 = C::gpr_to_reg(ctx, arg0);
2895
0
    let v3 = C::gpr_to_reg(ctx, arg1);
2896
0
    let v4 = C::value_regs(ctx, v2, v3);
2897
0
    // Rule at src/isa/x64/inst.isle line 1678.
2898
0
    return v4;
2899
0
}
2900
2901
// Generated as internal constructor for term output_xmm.
2902
0
pub fn constructor_output_xmm<C: Context>(
2903
0
    ctx: &mut C,
2904
0
    arg0: Xmm,
2905
0
) -> InstOutput {
2906
0
    let v1 = C::xmm_to_reg(ctx, arg0);
2907
0
    let v2 = constructor_output_reg(ctx, v1);
2908
0
    // Rule at src/isa/x64/inst.isle line 1683.
2909
0
    return v2;
2910
0
}
2911
2912
// Generated as internal constructor for term value_regs_get_gpr.
2913
10.1k
pub fn constructor_value_regs_get_gpr<C: Context>(
2914
10.1k
    ctx: &mut C,
2915
10.1k
    arg0: ValueRegs,
2916
10.1k
    arg1: usize,
2917
10.1k
) -> Gpr {
2918
10.1k
    let v2 = C::value_regs_get(ctx, arg0, arg1);
2919
10.1k
    let v3 = C::gpr_new(ctx, v2);
2920
10.1k
    // Rule at src/isa/x64/inst.isle line 1690.
2921
10.1k
    return v3;
2922
10.1k
}
2923
2924
// Generated as internal constructor for term lo_gpr.
2925
0
pub fn constructor_lo_gpr<C: Context>(
2926
0
    ctx: &mut C,
2927
0
    arg0: Value,
2928
0
) -> Gpr {
2929
0
    let v1 = constructor_lo_reg(ctx, arg0);
2930
0
    let v2 = C::gpr_new(ctx, v1);
2931
0
    // Rule at src/isa/x64/inst.isle line 1703.
2932
0
    return v2;
2933
0
}
2934
2935
// Generated as internal constructor for term sink_load_to_gpr_mem_imm.
2936
8.45k
pub fn constructor_sink_load_to_gpr_mem_imm<C: Context>(
2937
8.45k
    ctx: &mut C,
2938
8.45k
    arg0: &SinkableLoad,
2939
8.45k
) -> GprMemImm {
2940
8.45k
    let v1 = &constructor_sink_load_to_reg_mem_imm(ctx, arg0);
2941
8.45k
    let v2 = &C::gpr_mem_imm_new(ctx, v1);
2942
8.45k
    // Rule at src/isa/x64/inst.isle line 1841.
2943
8.45k
    return v2.clone();
2944
8.45k
}
2945
2946
// Generated as internal constructor for term sink_load_to_xmm_mem.
2947
0
pub fn constructor_sink_load_to_xmm_mem<C: Context>(
2948
0
    ctx: &mut C,
2949
0
    arg0: &SinkableLoad,
2950
0
) -> XmmMem {
2951
0
    let v1 = &constructor_sink_load_to_reg_mem(ctx, arg0);
2952
0
    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
2953
0
    // Rule at src/isa/x64/inst.isle line 1845.
2954
0
    return v2.clone();
2955
0
}
2956
2957
// Generated as internal constructor for term sink_load_to_reg_mem.
2958
0
pub fn constructor_sink_load_to_reg_mem<C: Context>(
2959
0
    ctx: &mut C,
2960
0
    arg0: &SinkableLoad,
2961
0
) -> RegMem {
2962
0
    let v1 = &C::sink_load(ctx, arg0);
2963
0
    let v2 = RegMem::Mem {
2964
0
        addr: v1.clone(),
2965
0
    };
2966
0
    // Rule at src/isa/x64/inst.isle line 1849.
2967
0
    return v2;
2968
0
}
2969
2970
// Generated as internal constructor for term sink_load_to_gpr_mem.
2971
0
pub fn constructor_sink_load_to_gpr_mem<C: Context>(
2972
0
    ctx: &mut C,
2973
0
    arg0: &SinkableLoad,
2974
0
) -> GprMem {
2975
0
    let v1 = &C::sink_load(ctx, arg0);
2976
0
    let v2 = RegMem::Mem {
2977
0
        addr: v1.clone(),
2978
0
    };
2979
0
    let v3 = &C::reg_mem_to_gpr_mem(ctx, &v2);
2980
0
    // Rule at src/isa/x64/inst.isle line 1852.
2981
0
    return v3.clone();
2982
0
}
2983
2984
// Generated as internal constructor for term sink_load_to_reg_mem_imm.
2985
9.99k
pub fn constructor_sink_load_to_reg_mem_imm<C: Context>(
2986
9.99k
    ctx: &mut C,
2987
9.99k
    arg0: &SinkableLoad,
2988
9.99k
) -> RegMemImm {
2989
9.99k
    let v1 = &C::sink_load(ctx, arg0);
2990
9.99k
    let v2 = RegMemImm::Mem {
2991
9.99k
        addr: v1.clone(),
2992
9.99k
    };
2993
9.99k
    // Rule at src/isa/x64/inst.isle line 1855.
2994
9.99k
    return v2;
2995
9.99k
}
2996
2997
// Generated as internal constructor for term extend_to_gpr.
2998
521k
pub fn constructor_extend_to_gpr<C: Context>(
2999
521k
    ctx: &mut C,
3000
521k
    arg0: Value,
3001
521k
    arg1: Type,
3002
521k
    arg2: &ExtendKind,
3003
521k
) -> Gpr {
3004
521k
    let v1 = C::value_type(ctx, arg0);
3005
521k
    if v1 == arg1 {
3006
9.45k
        let v4 = constructor_put_in_gpr(ctx, arg0);
3007
9.45k
        // Rule at src/isa/x64/inst.isle line 1876.
3008
9.45k
        return v4;
3009
511k
    }
3010
511k
    if let &ExtendKind::Zero = arg2 {
3011
511k
        if v1 == I32 {
3012
500k
            if arg1 == I64 {
3013
500k
                let v5 = constructor_value32_zeros_upper32(ctx, arg0);
3014
500k
                if v5 == true {
3015
387k
                    let v4 = constructor_put_in_gpr(ctx, arg0);
3016
387k
                    // Rule at src/isa/x64/inst.isle line 1884.
3017
387k
                    return v4;
3018
113k
                }
3019
132
            }
3020
11.2k
        }
3021
125k
        let v6 = C::def_inst(ctx, arg0);
3022
125k
        if let Some(
v777.2k
) = v6 {
3023
77.2k
            let v8 = &C::inst_data(ctx, v7);
3024
            if let &InstructionData::BinaryImm8 {
3025
159
                opcode: ref v9,
3026
159
                arg: v10,
3027
159
                imm: v11,
3028
77.2k
            } = v8 {
3029
159
                if let &Opcode::Extractlane = v9 {
3030
0
                    let v4 = constructor_put_in_gpr(ctx, arg0);
3031
0
                    // Rule at src/isa/x64/inst.isle line 1900.
3032
0
                    return v4;
3033
0
                }
3034
77.0k
            }
3035
47.8k
        }
3036
29
    }
3037
124k
    let v13 = &C::operand_size_of_type_32_64(ctx, arg1);
3038
124k
    let v14 = constructor_operand_size_bits(ctx, v13);
3039
124k
    let v12 = C::ty_bits_u16(ctx, v1);
3040
124k
    let v15 = &C::ext_mode(ctx, v12, v14);
3041
124k
    let v16 = &constructor_put_in_gpr_mem(ctx, arg0);
3042
124k
    let v17 = constructor_extend(ctx, arg2, arg1, v15, v16);
3043
124k
    // Rule at src/isa/x64/inst.isle line 1903.
3044
124k
    return v17;
3045
521k
}
3046
3047
// Generated as internal constructor for term extend.
3048
124k
pub fn constructor_extend<C: Context>(
3049
124k
    ctx: &mut C,
3050
124k
    arg0: &ExtendKind,
3051
124k
    arg1: Type,
3052
124k
    arg2: &ExtMode,
3053
124k
    arg3: &GprMem,
3054
124k
) -> Gpr {
3055
124k
    match arg0 {
3056
        &ExtendKind::Sign => {
3057
29
            let v5 = constructor_x64_movsx(ctx, arg2, arg3);
3058
29
            // Rule at src/isa/x64/inst.isle line 1923.
3059
29
            return v5;
3060
        }
3061
        &ExtendKind::Zero => {
3062
124k
            let v4 = constructor_x64_movzx(ctx, arg2, arg3);
3063
124k
            // Rule at src/isa/x64/inst.isle line 1919.
3064
124k
            return v4;
3065
        }
3066
0
        _ => {}
3067
0
    }
3068
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "extend", "src/isa/x64/inst.isle line 1916")
3069
124k
}
3070
3071
// Generated as internal constructor for term value32_zeros_upper32.
3072
500k
pub fn constructor_value32_zeros_upper32<C: Context>(
3073
500k
    ctx: &mut C,
3074
500k
    arg0: Value,
3075
500k
) -> bool {
3076
500k
    let v1 = C::def_inst(ctx, arg0);
3077
500k
    if let Some(
v2452k
) = v1 {
3078
452k
        let v3 = &C::inst_data(ctx, v2);
3079
452k
        match v3 {
3080
            &InstructionData::Binary {
3081
387k
                opcode: ref v4,
3082
387k
                args: ref v5,
3083
387k
            } => {
3084
387k
                match v4 {
3085
                    &Opcode::Iadd => {
3086
                        // Rule at src/isa/x64/inst.isle line 1930.
3087
369k
                        return true;
3088
                    }
3089
                    &Opcode::Isub => {
3090
                        // Rule at src/isa/x64/inst.isle line 1931.
3091
16.0k
                        return true;
3092
                    }
3093
                    &Opcode::Imul => {
3094
                        // Rule at src/isa/x64/inst.isle line 1932.
3095
3
                        return true;
3096
                    }
3097
                    &Opcode::Band => {
3098
                        // Rule at src/isa/x64/inst.isle line 1933.
3099
560
                        return true;
3100
                    }
3101
                    &Opcode::Bor => {
3102
                        // Rule at src/isa/x64/inst.isle line 1934.
3103
565
                        return true;
3104
                    }
3105
                    &Opcode::Bxor => {
3106
                        // Rule at src/isa/x64/inst.isle line 1935.
3107
37
                        return true;
3108
                    }
3109
                    &Opcode::Ishl => {
3110
                        // Rule at src/isa/x64/inst.isle line 1936.
3111
15
                        return true;
3112
                    }
3113
                    &Opcode::Ushr => {
3114
                        // Rule at src/isa/x64/inst.isle line 1937.
3115
112
                        return true;
3116
                    }
3117
907
                    _ => {}
3118
                }
3119
            }
3120
            &InstructionData::Load {
3121
51.7k
                opcode: ref v10,
3122
51.7k
                arg: v11,
3123
51.7k
                flags: v12,
3124
51.7k
                offset: v13,
3125
51.7k
            } => {
3126
51.7k
                if let &Opcode::Uload32 = v10 {
3127
                    // Rule at src/isa/x64/inst.isle line 1938.
3128
0
                    return true;
3129
51.7k
                }
3130
            }
3131
13.1k
            _ => {}
3132
        }
3133
47.8k
    }
3134
    // Rule at src/isa/x64/inst.isle line 1939.
3135
113k
    return false;
3136
500k
}
3137
3138
// Generated as internal constructor for term vec_int_type.
3139
0
pub fn constructor_vec_int_type<C: Context>(
3140
0
    ctx: &mut C,
3141
0
    arg0: Type,
3142
0
) -> Type {
3143
0
    let v1 = C::multi_lane(ctx, arg0);
3144
0
    if let Some(v2) = v1 {
3145
0
        match v2.0 {
3146
            0x8 => {
3147
0
                if v2.1 == 0x10 {
3148
                    // Rule at src/isa/x64/inst.isle line 1945.
3149
0
                    return I8X16;
3150
0
                }
3151
            }
3152
            0x10 => {
3153
0
                if v2.1 == 0x8 {
3154
                    // Rule at src/isa/x64/inst.isle line 1946.
3155
0
                    return I16X8;
3156
0
                }
3157
            }
3158
            0x20 => {
3159
0
                if v2.1 == 0x4 {
3160
                    // Rule at src/isa/x64/inst.isle line 1947.
3161
0
                    return I32X4;
3162
0
                }
3163
            }
3164
            0x40 => {
3165
0
                if v2.1 == 0x2 {
3166
                    // Rule at src/isa/x64/inst.isle line 1948.
3167
0
                    return I64X2;
3168
0
                }
3169
            }
3170
0
            _ => {}
3171
        }
3172
0
    }
3173
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "vec_int_type", "src/isa/x64/inst.isle line 1944")
3174
0
}
3175
3176
// Generated as internal constructor for term x64_xor_vector.
3177
0
pub fn constructor_x64_xor_vector<C: Context>(
3178
0
    ctx: &mut C,
3179
0
    arg0: Type,
3180
0
    arg1: Xmm,
3181
0
    arg2: &XmmMem,
3182
0
) -> Xmm {
3183
0
    match arg0 {
3184
        F32 => {
3185
0
            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
3186
0
            // Rule at src/isa/x64/inst.isle line 1952.
3187
0
            return v3;
3188
        }
3189
        F64 => {
3190
0
            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
3191
0
            // Rule at src/isa/x64/inst.isle line 1953.
3192
0
            return v4;
3193
        }
3194
        F32X4 => {
3195
0
            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
3196
0
            // Rule at src/isa/x64/inst.isle line 1954.
3197
0
            return v3;
3198
        }
3199
        F64X2 => {
3200
0
            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
3201
0
            // Rule at src/isa/x64/inst.isle line 1955.
3202
0
            return v4;
3203
        }
3204
0
        _ => {}
3205
0
    }
3206
0
    let v5 = C::multi_lane(ctx, arg0);
3207
0
    if let Some(v6) = v5 {
3208
0
        let v9 = constructor_x64_pxor(ctx, arg1, arg2);
3209
0
        // Rule at src/isa/x64/inst.isle line 1956.
3210
0
        return v9;
3211
0
    }
3212
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_xor_vector", "src/isa/x64/inst.isle line 1951")
3213
0
}
3214
3215
// Generated as internal constructor for term vector_all_ones.
3216
0
pub fn constructor_vector_all_ones<C: Context>(
3217
0
    ctx: &mut C,
3218
0
) -> Xmm {
3219
0
    let v0 = constructor_xmm_uninit_value(ctx);
3220
0
    let v1 = &C::xmm_to_xmm_mem(ctx, v0);
3221
0
    let v2 = constructor_x64_pcmpeqd(ctx, v0, v1);
3222
0
    // Rule at src/isa/x64/inst.isle line 1968.
3223
0
    return v2;
3224
0
}
3225
3226
// Generated as internal constructor for term xmm_uninit_value.
3227
0
pub fn constructor_xmm_uninit_value<C: Context>(
3228
0
    ctx: &mut C,
3229
0
) -> Xmm {
3230
0
    let v0 = C::temp_writable_xmm(ctx);
3231
0
    let v1 = MInst::XmmUninitializedValue {
3232
0
        dst: v0,
3233
0
    };
3234
0
    let v2 = C::emit(ctx, &v1);
3235
0
    let v3 = C::writable_xmm_to_xmm(ctx, v0);
3236
0
    // Rule at src/isa/x64/inst.isle line 1974.
3237
0
    return v3;
3238
0
}
3239
3240
// Generated as internal constructor for term make_i64x2_from_lanes.
3241
0
pub fn constructor_make_i64x2_from_lanes<C: Context>(
3242
0
    ctx: &mut C,
3243
0
    arg0: &GprMem,
3244
0
    arg1: &GprMem,
3245
0
) -> Xmm {
3246
0
    let v2 = constructor_xmm_uninit_value(ctx);
3247
0
    let v4 = constructor_x64_pinsrq(ctx, v2, arg0, 0x0);
3248
0
    let v6 = constructor_x64_pinsrq(ctx, v4, arg1, 0x1);
3249
0
    // Rule at src/isa/x64/inst.isle line 1981.
3250
0
    return v6;
3251
0
}
3252
3253
// Generated as internal constructor for term mov_rmi_to_xmm.
3254
0
pub fn constructor_mov_rmi_to_xmm<C: Context>(
3255
0
    ctx: &mut C,
3256
0
    arg0: &RegMemImm,
3257
0
) -> XmmMemImm {
3258
0
    match arg0 {
3259
        &RegMemImm::Reg {
3260
0
            reg: v4,
3261
0
        } => {
3262
0
            let v5 = &C::reg_to_gpr_mem(ctx, v4);
3263
0
            let v6 = constructor_x64_movd_to_xmm(ctx, v5);
3264
0
            let v7 = &C::xmm_to_xmm_mem_imm(ctx, v6);
3265
0
            // Rule at src/isa/x64/inst.isle line 1991.
3266
0
            return v7.clone();
3267
        }
3268
        &RegMemImm::Mem {
3269
0
            addr: ref v1,
3270
0
        } => {
3271
0
            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
3272
0
            // Rule at src/isa/x64/inst.isle line 1989.
3273
0
            return v2.clone();
3274
        }
3275
        &RegMemImm::Imm {
3276
0
            simm32: v3,
3277
0
        } => {
3278
0
            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
3279
0
            // Rule at src/isa/x64/inst.isle line 1990.
3280
0
            return v2.clone();
3281
        }
3282
0
        _ => {}
3283
0
    }
3284
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "mov_rmi_to_xmm", "src/isa/x64/inst.isle line 1988")
3285
0
}
3286
3287
// Generated as internal constructor for term load_ext_name.
3288
0
pub fn constructor_load_ext_name<C: Context>(
3289
0
    ctx: &mut C,
3290
0
    arg0: ExternalName,
3291
0
    arg1: i64,
3292
0
) -> Reg {
3293
0
    let v2 = C::temp_writable_gpr(ctx);
3294
0
    let v3 = C::writable_gpr_to_reg(ctx, v2);
3295
0
    let v4 = C::box_external_name(ctx, arg0);
3296
0
    let v5 = MInst::LoadExtName {
3297
0
        dst: v3,
3298
0
        name: v4,
3299
0
        offset: arg1,
3300
0
    };
3301
0
    let v6 = C::emit(ctx, &v5);
3302
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
3303
0
    // Rule at src/isa/x64/inst.isle line 2005.
3304
0
    return v7;
3305
0
}
3306
3307
// Generated as internal constructor for term x64_load.
3308
584
pub fn constructor_x64_load<C: Context>(
3309
584
    ctx: &mut C,
3310
584
    arg0: Type,
3311
584
    arg1: &SyntheticAmode,
3312
584
    arg2: &ExtKind,
3313
584
) -> Reg {
3314
584
    match arg0 {
3315
        I64 => {
3316
584
            let v11 = C::temp_writable_gpr(ctx);
3317
584
            let v12 = MInst::Mov64MR {
3318
584
                src: arg1.clone(),
3319
584
                dst: v11,
3320
584
            };
3321
584
            let v13 = C::emit(ctx, &v12);
3322
584
            let v14 = constructor_writable_gpr_to_r_reg(ctx, v11);
3323
584
            // Rule at src/isa/x64/inst.isle line 2017.
3324
584
            return v14;
3325
        }
3326
        F32 => {
3327
0
            let v15 = constructor_x64_movss_load(ctx, arg1);
3328
0
            let v16 = C::xmm_to_reg(ctx, v15);
3329
0
            // Rule at src/isa/x64/inst.isle line 2022.
3330
0
            return v16;
3331
        }
3332
        F64 => {
3333
0
            let v17 = constructor_x64_movsd_load(ctx, arg1);
3334
0
            let v18 = C::xmm_to_reg(ctx, v17);
3335
0
            // Rule at src/isa/x64/inst.isle line 2025.
3336
0
            return v18;
3337
        }
3338
        F32X4 => {
3339
0
            let v19 = constructor_x64_movups_load(ctx, arg1);
3340
0
            let v20 = C::xmm_to_reg(ctx, v19);
3341
0
            // Rule at src/isa/x64/inst.isle line 2028.
3342
0
            return v20;
3343
        }
3344
        F64X2 => {
3345
0
            let v21 = constructor_x64_movupd_load(ctx, arg1);
3346
0
            let v22 = C::xmm_to_reg(ctx, v21);
3347
0
            // Rule at src/isa/x64/inst.isle line 2031.
3348
0
            return v22;
3349
        }
3350
0
        _ => {}
3351
0
    }
3352
0
    let v1 = C::fits_in_32(ctx, arg0);
3353
0
    if let Some(v2) = v1 {
3354
0
        if let &ExtKind::SignExtend = arg2 {
3355
0
            let v5 = C::ty_bytes(ctx, v2);
3356
0
            let v7 = &C::ext_mode(ctx, v5, 0x8);
3357
0
            let v8 = &constructor_synthetic_amode_to_gpr_mem(ctx, arg1);
3358
0
            let v9 = constructor_x64_movsx(ctx, v7, v8);
3359
0
            let v10 = C::gpr_to_reg(ctx, v9);
3360
0
            // Rule at src/isa/x64/inst.isle line 2013.
3361
0
            return v10;
3362
0
        }
3363
0
    }
3364
0
    let v23 = C::multi_lane(ctx, arg0);
3365
0
    if let Some(v24) = v23 {
3366
0
        let v27 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg1);
3367
0
        let v28 = constructor_x64_movdqu_load(ctx, v27);
3368
0
        let v29 = C::xmm_to_reg(ctx, v28);
3369
0
        // Rule at src/isa/x64/inst.isle line 2034.
3370
0
        return v29;
3371
0
    }
3372
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_load", "src/isa/x64/inst.isle line 2011")
3373
584
}
3374
3375
// Generated as internal constructor for term x64_mov.
3376
378k
pub fn constructor_x64_mov<C: Context>(
3377
378k
    ctx: &mut C,
3378
378k
    arg0: &Amode,
3379
378k
) -> Reg {
3380
378k
    let v1 = C::temp_writable_gpr(ctx);
3381
378k
    let v2 = &C::amode_to_synthetic_amode(ctx, arg0);
3382
378k
    let v3 = MInst::Mov64MR {
3383
378k
        src: v2.clone(),
3384
378k
        dst: v1,
3385
378k
    };
3386
378k
    let v4 = C::emit(ctx, &v3);
3387
378k
    let v5 = constructor_writable_gpr_to_r_reg(ctx, v1);
3388
378k
    // Rule at src/isa/x64/inst.isle line 2038.
3389
378k
    return v5;
3390
378k
}
3391
3392
// Generated as internal constructor for term x64_movzx.
3393
536k
pub fn constructor_x64_movzx<C: Context>(
3394
536k
    ctx: &mut C,
3395
536k
    arg0: &ExtMode,
3396
536k
    arg1: &GprMem,
3397
536k
) -> Gpr {
3398
536k
    let v2 = C::temp_writable_gpr(ctx);
3399
536k
    let v3 = MInst::MovzxRmR {
3400
536k
        ext_mode: arg0.clone(),
3401
536k
        src: arg1.clone(),
3402
536k
        dst: v2,
3403
536k
    };
3404
536k
    let v4 = C::emit(ctx, &v3);
3405
536k
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
3406
536k
    // Rule at src/isa/x64/inst.isle line 2044.
3407
536k
    return v5;
3408
536k
}
3409
3410
// Generated as internal constructor for term x64_movsx.
3411
205
pub fn constructor_x64_movsx<C: Context>(
3412
205
    ctx: &mut C,
3413
205
    arg0: &ExtMode,
3414
205
    arg1: &GprMem,
3415
205
) -> Gpr {
3416
205
    let v2 = C::temp_writable_gpr(ctx);
3417
205
    let v3 = MInst::MovsxRmR {
3418
205
        ext_mode: arg0.clone(),
3419
205
        src: arg1.clone(),
3420
205
        dst: v2,
3421
205
    };
3422
205
    let v4 = C::emit(ctx, &v3);
3423
205
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
3424
205
    // Rule at src/isa/x64/inst.isle line 2050.
3425
205
    return v5;
3426
205
}
3427
3428
// Generated as internal constructor for term x64_movss_load.
3429
0
pub fn constructor_x64_movss_load<C: Context>(
3430
0
    ctx: &mut C,
3431
0
    arg0: &SyntheticAmode,
3432
0
) -> Xmm {
3433
0
    let v4 = C::use_avx_simd(ctx);
3434
0
    if v4 == true {
3435
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3436
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovss, v2);
3437
0
        // Rule at src/isa/x64/inst.isle line 2058.
3438
0
        return v6;
3439
0
    }
3440
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3441
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movss, v2);
3442
0
    // Rule at src/isa/x64/inst.isle line 2056.
3443
0
    return v3;
3444
0
}
3445
3446
// Generated as internal constructor for term x64_movss_store.
3447
0
pub fn constructor_x64_movss_store<C: Context>(
3448
0
    ctx: &mut C,
3449
0
    arg0: &SyntheticAmode,
3450
0
    arg1: Xmm,
3451
0
) -> SideEffectNoResult {
3452
0
    let v4 = C::use_avx_simd(ctx);
3453
0
    if v4 == true {
3454
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovss, arg0, arg1);
3455
0
        // Rule at src/isa/x64/inst.isle line 2065.
3456
0
        return v6.clone();
3457
0
    }
3458
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movss, arg0, arg1);
3459
0
    // Rule at src/isa/x64/inst.isle line 2063.
3460
0
    return v3.clone();
3461
0
}
3462
3463
// Generated as internal constructor for term x64_movsd_load.
3464
0
pub fn constructor_x64_movsd_load<C: Context>(
3465
0
    ctx: &mut C,
3466
0
    arg0: &SyntheticAmode,
3467
0
) -> Xmm {
3468
0
    let v4 = C::use_avx_simd(ctx);
3469
0
    if v4 == true {
3470
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3471
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovsd, v2);
3472
0
        // Rule at src/isa/x64/inst.isle line 2072.
3473
0
        return v6;
3474
0
    }
3475
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3476
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movsd, v2);
3477
0
    // Rule at src/isa/x64/inst.isle line 2070.
3478
0
    return v3;
3479
0
}
3480
3481
// Generated as internal constructor for term x64_movsd_store.
3482
1
pub fn constructor_x64_movsd_store<C: Context>(
3483
1
    ctx: &mut C,
3484
1
    arg0: &SyntheticAmode,
3485
1
    arg1: Xmm,
3486
1
) -> SideEffectNoResult {
3487
1
    let v4 = C::use_avx_simd(ctx);
3488
1
    if v4 == true {
3489
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovsd, arg0, arg1);
3490
0
        // Rule at src/isa/x64/inst.isle line 2079.
3491
0
        return v6.clone();
3492
1
    }
3493
1
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movsd, arg0, arg1);
3494
1
    // Rule at src/isa/x64/inst.isle line 2077.
3495
1
    return v3.clone();
3496
1
}
3497
3498
// Generated as internal constructor for term x64_movups_load.
3499
0
pub fn constructor_x64_movups_load<C: Context>(
3500
0
    ctx: &mut C,
3501
0
    arg0: &SyntheticAmode,
3502
0
) -> Xmm {
3503
0
    let v4 = C::use_avx_simd(ctx);
3504
0
    if v4 == true {
3505
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3506
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovups, v2);
3507
0
        // Rule at src/isa/x64/inst.isle line 2086.
3508
0
        return v6;
3509
0
    }
3510
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3511
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movups, v2);
3512
0
    // Rule at src/isa/x64/inst.isle line 2084.
3513
0
    return v3;
3514
0
}
3515
3516
// Generated as internal constructor for term x64_movups_store.
3517
0
pub fn constructor_x64_movups_store<C: Context>(
3518
0
    ctx: &mut C,
3519
0
    arg0: &SyntheticAmode,
3520
0
    arg1: Xmm,
3521
0
) -> SideEffectNoResult {
3522
0
    let v4 = C::use_avx_simd(ctx);
3523
0
    if v4 == true {
3524
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovups, arg0, arg1);
3525
0
        // Rule at src/isa/x64/inst.isle line 2093.
3526
0
        return v6.clone();
3527
0
    }
3528
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movups, arg0, arg1);
3529
0
    // Rule at src/isa/x64/inst.isle line 2091.
3530
0
    return v3.clone();
3531
0
}
3532
3533
// Generated as internal constructor for term x64_movupd_load.
3534
0
pub fn constructor_x64_movupd_load<C: Context>(
3535
0
    ctx: &mut C,
3536
0
    arg0: &SyntheticAmode,
3537
0
) -> Xmm {
3538
0
    let v4 = C::use_avx_simd(ctx);
3539
0
    if v4 == true {
3540
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3541
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovupd, v2);
3542
0
        // Rule at src/isa/x64/inst.isle line 2100.
3543
0
        return v6;
3544
0
    }
3545
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
3546
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movupd, v2);
3547
0
    // Rule at src/isa/x64/inst.isle line 2098.
3548
0
    return v3;
3549
0
}
3550
3551
// Generated as internal constructor for term x64_movupd_store.
3552
0
pub fn constructor_x64_movupd_store<C: Context>(
3553
0
    ctx: &mut C,
3554
0
    arg0: &SyntheticAmode,
3555
0
    arg1: Xmm,
3556
0
) -> SideEffectNoResult {
3557
0
    let v4 = C::use_avx_simd(ctx);
3558
0
    if v4 == true {
3559
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovupd, arg0, arg1);
3560
0
        // Rule at src/isa/x64/inst.isle line 2107.
3561
0
        return v6.clone();
3562
0
    }
3563
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movupd, arg0, arg1);
3564
0
    // Rule at src/isa/x64/inst.isle line 2105.
3565
0
    return v3.clone();
3566
0
}
3567
3568
// Generated as internal constructor for term x64_movd_to_gpr.
3569
0
pub fn constructor_x64_movd_to_gpr<C: Context>(
3570
0
    ctx: &mut C,
3571
0
    arg0: Xmm,
3572
0
) -> Gpr {
3573
0
    let v4 = C::use_avx_simd(ctx);
3574
0
    if v4 == true {
3575
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
3576
0
        // Rule at src/isa/x64/inst.isle line 2115.
3577
0
        return v6;
3578
0
    }
3579
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
3580
0
    // Rule at src/isa/x64/inst.isle line 2113.
3581
0
    return v3;
3582
0
}
3583
3584
// Generated as internal constructor for term x64_movd_to_xmm.
3585
0
pub fn constructor_x64_movd_to_xmm<C: Context>(
3586
0
    ctx: &mut C,
3587
0
    arg0: &GprMem,
3588
0
) -> Xmm {
3589
0
    let v4 = C::use_avx_simd(ctx);
3590
0
    if v4 == true {
3591
0
        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
3592
0
        // Rule at src/isa/x64/inst.isle line 2123.
3593
0
        return v6;
3594
0
    }
3595
0
    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
3596
0
    // Rule at src/isa/x64/inst.isle line 2121.
3597
0
    return v3;
3598
0
}
3599
3600
// Generated as internal constructor for term x64_movq_to_xmm.
3601
0
pub fn constructor_x64_movq_to_xmm<C: Context>(
3602
0
    ctx: &mut C,
3603
0
    arg0: &GprMem,
3604
0
) -> Xmm {
3605
0
    let v4 = C::use_avx_simd(ctx);
3606
0
    if v4 == true {
3607
0
        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
3608
0
        // Rule at src/isa/x64/inst.isle line 2131.
3609
0
        return v6;
3610
0
    }
3611
0
    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
3612
0
    // Rule at src/isa/x64/inst.isle line 2129.
3613
0
    return v3;
3614
0
}
3615
3616
// Generated as internal constructor for term x64_movq_to_gpr.
3617
0
pub fn constructor_x64_movq_to_gpr<C: Context>(
3618
0
    ctx: &mut C,
3619
0
    arg0: Xmm,
3620
0
) -> Gpr {
3621
0
    let v4 = C::use_avx_simd(ctx);
3622
0
    if v4 == true {
3623
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
3624
0
        // Rule at src/isa/x64/inst.isle line 2139.
3625
0
        return v6;
3626
0
    }
3627
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
3628
0
    // Rule at src/isa/x64/inst.isle line 2137.
3629
0
    return v3;
3630
0
}
3631
3632
// Generated as internal constructor for term x64_movdqu_load.
3633
0
pub fn constructor_x64_movdqu_load<C: Context>(
3634
0
    ctx: &mut C,
3635
0
    arg0: &XmmMem,
3636
0
) -> Xmm {
3637
0
    let v3 = C::use_avx_simd(ctx);
3638
0
    if v3 == true {
3639
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovdqu, arg0);
3640
0
        // Rule at src/isa/x64/inst.isle line 2146.
3641
0
        return v5;
3642
0
    }
3643
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movdqu, arg0);
3644
0
    // Rule at src/isa/x64/inst.isle line 2144.
3645
0
    return v2;
3646
0
}
3647
3648
// Generated as internal constructor for term x64_movdqu_store.
3649
0
pub fn constructor_x64_movdqu_store<C: Context>(
3650
0
    ctx: &mut C,
3651
0
    arg0: &SyntheticAmode,
3652
0
    arg1: Xmm,
3653
0
) -> SideEffectNoResult {
3654
0
    let v4 = C::use_avx_simd(ctx);
3655
0
    if v4 == true {
3656
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovdqu, arg0, arg1);
3657
0
        // Rule at src/isa/x64/inst.isle line 2153.
3658
0
        return v6.clone();
3659
0
    }
3660
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movdqu, arg0, arg1);
3661
0
    // Rule at src/isa/x64/inst.isle line 2151.
3662
0
    return v3.clone();
3663
0
}
3664
3665
// Generated as internal constructor for term x64_pmovsxbw.
3666
0
pub fn constructor_x64_pmovsxbw<C: Context>(
3667
0
    ctx: &mut C,
3668
0
    arg0: &XmmMem,
3669
0
) -> Xmm {
3670
0
    let v3 = C::use_avx_simd(ctx);
3671
0
    if v3 == true {
3672
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxbw, arg0);
3673
0
        // Rule at src/isa/x64/inst.isle line 2160.
3674
0
        return v5;
3675
0
    }
3676
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxbw, arg0);
3677
0
    // Rule at src/isa/x64/inst.isle line 2158.
3678
0
    return v2;
3679
0
}
3680
3681
// Generated as internal constructor for term x64_pmovzxbw.
3682
0
pub fn constructor_x64_pmovzxbw<C: Context>(
3683
0
    ctx: &mut C,
3684
0
    arg0: &XmmMem,
3685
0
) -> Xmm {
3686
0
    let v3 = C::use_avx_simd(ctx);
3687
0
    if v3 == true {
3688
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxbw, arg0);
3689
0
        // Rule at src/isa/x64/inst.isle line 2167.
3690
0
        return v5;
3691
0
    }
3692
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxbw, arg0);
3693
0
    // Rule at src/isa/x64/inst.isle line 2165.
3694
0
    return v2;
3695
0
}
3696
3697
// Generated as internal constructor for term x64_pmovsxwd.
3698
0
pub fn constructor_x64_pmovsxwd<C: Context>(
3699
0
    ctx: &mut C,
3700
0
    arg0: &XmmMem,
3701
0
) -> Xmm {
3702
0
    let v3 = C::use_avx_simd(ctx);
3703
0
    if v3 == true {
3704
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxwd, arg0);
3705
0
        // Rule at src/isa/x64/inst.isle line 2174.
3706
0
        return v5;
3707
0
    }
3708
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxwd, arg0);
3709
0
    // Rule at src/isa/x64/inst.isle line 2172.
3710
0
    return v2;
3711
0
}
3712
3713
// Generated as internal constructor for term x64_pmovzxwd.
3714
0
pub fn constructor_x64_pmovzxwd<C: Context>(
3715
0
    ctx: &mut C,
3716
0
    arg0: &XmmMem,
3717
0
) -> Xmm {
3718
0
    let v3 = C::use_avx_simd(ctx);
3719
0
    if v3 == true {
3720
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxwd, arg0);
3721
0
        // Rule at src/isa/x64/inst.isle line 2181.
3722
0
        return v5;
3723
0
    }
3724
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxwd, arg0);
3725
0
    // Rule at src/isa/x64/inst.isle line 2179.
3726
0
    return v2;
3727
0
}
3728
3729
// Generated as internal constructor for term x64_pmovsxdq.
3730
0
pub fn constructor_x64_pmovsxdq<C: Context>(
3731
0
    ctx: &mut C,
3732
0
    arg0: &XmmMem,
3733
0
) -> Xmm {
3734
0
    let v3 = C::use_avx_simd(ctx);
3735
0
    if v3 == true {
3736
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxdq, arg0);
3737
0
        // Rule at src/isa/x64/inst.isle line 2188.
3738
0
        return v5;
3739
0
    }
3740
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxdq, arg0);
3741
0
    // Rule at src/isa/x64/inst.isle line 2186.
3742
0
    return v2;
3743
0
}
3744
3745
// Generated as internal constructor for term x64_pmovzxdq.
3746
0
pub fn constructor_x64_pmovzxdq<C: Context>(
3747
0
    ctx: &mut C,
3748
0
    arg0: &XmmMem,
3749
0
) -> Xmm {
3750
0
    let v3 = C::use_avx_simd(ctx);
3751
0
    if v3 == true {
3752
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxdq, arg0);
3753
0
        // Rule at src/isa/x64/inst.isle line 2195.
3754
0
        return v5;
3755
0
    }
3756
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxdq, arg0);
3757
0
    // Rule at src/isa/x64/inst.isle line 2193.
3758
0
    return v2;
3759
0
}
3760
3761
// Generated as internal constructor for term x64_movrm.
3762
522k
pub fn constructor_x64_movrm<C: Context>(
3763
522k
    ctx: &mut C,
3764
522k
    arg0: Type,
3765
522k
    arg1: &SyntheticAmode,
3766
522k
    arg2: Gpr,
3767
522k
) -> SideEffectNoResult {
3768
522k
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
3769
522k
    let v4 = MInst::MovRM {
3770
522k
        size: v3.clone(),
3771
522k
        src: arg2,
3772
522k
        dst: arg1.clone(),
3773
522k
    };
3774
522k
    let v5 = SideEffectNoResult::Inst {
3775
522k
        inst: v4,
3776
522k
    };
3777
522k
    // Rule at src/isa/x64/inst.isle line 2200.
3778
522k
    return v5;
3779
522k
}
3780
3781
// Generated as internal constructor for term xmm_movrm.
3782
1
pub fn constructor_xmm_movrm<C: Context>(
3783
1
    ctx: &mut C,
3784
1
    arg0: &SseOpcode,
3785
1
    arg1: &SyntheticAmode,
3786
1
    arg2: Xmm,
3787
1
) -> SideEffectNoResult {
3788
1
    let v3 = MInst::XmmMovRM {
3789
1
        op: arg0.clone(),
3790
1
        src: arg2,
3791
1
        dst: arg1.clone(),
3792
1
    };
3793
1
    let v4 = SideEffectNoResult::Inst {
3794
1
        inst: v3,
3795
1
    };
3796
1
    // Rule at src/isa/x64/inst.isle line 2205.
3797
1
    return v4;
3798
1
}
3799
3800
// Generated as internal constructor for term xmm_movrm_imm.
3801
0
pub fn constructor_xmm_movrm_imm<C: Context>(
3802
0
    ctx: &mut C,
3803
0
    arg0: &SseOpcode,
3804
0
    arg1: &SyntheticAmode,
3805
0
    arg2: Xmm,
3806
0
    arg3: u8,
3807
0
) -> SideEffectNoResult {
3808
0
    let v4 = MInst::XmmMovRMImm {
3809
0
        op: arg0.clone(),
3810
0
        src: arg2,
3811
0
        dst: arg1.clone(),
3812
0
        imm: arg3,
3813
0
    };
3814
0
    let v5 = SideEffectNoResult::Inst {
3815
0
        inst: v4,
3816
0
    };
3817
0
    // Rule at src/isa/x64/inst.isle line 2209.
3818
0
    return v5;
3819
0
}
3820
3821
// Generated as internal constructor for term xmm_movrm_vex.
3822
0
pub fn constructor_xmm_movrm_vex<C: Context>(
3823
0
    ctx: &mut C,
3824
0
    arg0: &AvxOpcode,
3825
0
    arg1: &SyntheticAmode,
3826
0
    arg2: Xmm,
3827
0
) -> SideEffectNoResult {
3828
0
    let v3 = MInst::XmmMovRMVex {
3829
0
        op: arg0.clone(),
3830
0
        src: arg2,
3831
0
        dst: arg1.clone(),
3832
0
    };
3833
0
    let v4 = SideEffectNoResult::Inst {
3834
0
        inst: v3,
3835
0
    };
3836
0
    // Rule at src/isa/x64/inst.isle line 2213.
3837
0
    return v4;
3838
0
}
3839
3840
// Generated as internal constructor for term xmm_movrm_imm_vex.
3841
0
pub fn constructor_xmm_movrm_imm_vex<C: Context>(
3842
0
    ctx: &mut C,
3843
0
    arg0: &AvxOpcode,
3844
0
    arg1: &SyntheticAmode,
3845
0
    arg2: Xmm,
3846
0
    arg3: u8,
3847
0
) -> SideEffectNoResult {
3848
0
    let v4 = MInst::XmmMovRMImmVex {
3849
0
        op: arg0.clone(),
3850
0
        src: arg2,
3851
0
        dst: arg1.clone(),
3852
0
        imm: arg3,
3853
0
    };
3854
0
    let v5 = SideEffectNoResult::Inst {
3855
0
        inst: v4,
3856
0
    };
3857
0
    // Rule at src/isa/x64/inst.isle line 2217.
3858
0
    return v5;
3859
0
}
3860
3861
// Generated as internal constructor for term x64_xmm_load_const.
3862
0
pub fn constructor_x64_xmm_load_const<C: Context>(
3863
0
    ctx: &mut C,
3864
0
    arg0: Type,
3865
0
    arg1: VCodeConstant,
3866
0
) -> Xmm {
3867
0
    let v2 = &C::const_to_synthetic_amode(ctx, arg1);
3868
0
    let v4 = constructor_x64_load(ctx, arg0, v2, &ExtKind::None);
3869
0
    let v5 = C::xmm_new(ctx, v4);
3870
0
    // Rule at src/isa/x64/inst.isle line 2222.
3871
0
    return v5;
3872
0
}
3873
3874
// Generated as internal constructor for term alu_rmi_r.
3875
787k
pub fn constructor_alu_rmi_r<C: Context>(
3876
787k
    ctx: &mut C,
3877
787k
    arg0: Type,
3878
787k
    arg1: &AluRmiROpcode,
3879
787k
    arg2: Gpr,
3880
787k
    arg3: &GprMemImm,
3881
787k
) -> Gpr {
3882
787k
    let v4 = C::temp_writable_gpr(ctx);
3883
787k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
3884
787k
    let v6 = MInst::AluRmiR {
3885
787k
        size: v5.clone(),
3886
787k
        op: arg1.clone(),
3887
787k
        src1: arg2,
3888
787k
        src2: arg3.clone(),
3889
787k
        dst: v4,
3890
787k
    };
3891
787k
    let v7 = C::emit(ctx, &v6);
3892
787k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
3893
787k
    // Rule at src/isa/x64/inst.isle line 2233.
3894
787k
    return v8;
3895
787k
}
3896
3897
// Generated as internal constructor for term x64_add.
3898
652k
pub fn constructor_x64_add<C: Context>(
3899
652k
    ctx: &mut C,
3900
652k
    arg0: Type,
3901
652k
    arg1: Gpr,
3902
652k
    arg2: &GprMemImm,
3903
652k
) -> Gpr {
3904
652k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
3905
652k
    // Rule at src/isa/x64/inst.isle line 2241.
3906
652k
    return v4;
3907
652k
}
3908
3909
// Generated as internal constructor for term x64_add_with_flags_paired.
3910
0
pub fn constructor_x64_add_with_flags_paired<C: Context>(
3911
0
    ctx: &mut C,
3912
0
    arg0: Type,
3913
0
    arg1: Gpr,
3914
0
    arg2: &GprMemImm,
3915
0
) -> ProducesFlags {
3916
0
    let v3 = C::temp_writable_gpr(ctx);
3917
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
3918
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
3919
0
    let v6 = MInst::AluRmiR {
3920
0
        size: v4.clone(),
3921
0
        op: AluRmiROpcode::Add,
3922
0
        src1: arg1,
3923
0
        src2: arg2.clone(),
3924
0
        dst: v3,
3925
0
    };
3926
0
    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
3927
0
        inst: v6,
3928
0
        result: v7,
3929
0
    };
3930
0
    // Rule at src/isa/x64/inst.isle line 2249.
3931
0
    return v8;
3932
0
}
3933
3934
// Generated as internal constructor for term x64_alurmi_with_flags_paired.
3935
0
pub fn constructor_x64_alurmi_with_flags_paired<C: Context>(
3936
0
    ctx: &mut C,
3937
0
    arg0: &AluRmiROpcode,
3938
0
    arg1: Type,
3939
0
    arg2: Gpr,
3940
0
    arg3: &GprMemImm,
3941
0
) -> ProducesFlags {
3942
0
    let v2 = C::fits_in_64(ctx, arg1);
3943
0
    if let Some(v3) = v2 {
3944
0
        let v6 = C::temp_writable_gpr(ctx);
3945
0
        let v7 = &C::raw_operand_size_of_type(ctx, v3);
3946
0
        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
3947
0
        let v8 = MInst::AluRmiR {
3948
0
            size: v7.clone(),
3949
0
            op: arg0.clone(),
3950
0
            src1: arg2,
3951
0
            src2: arg3.clone(),
3952
0
            dst: v6,
3953
0
        };
3954
0
        let v10 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
3955
0
            inst: v8,
3956
0
            result: v9,
3957
0
        };
3958
0
        // Rule at src/isa/x64/inst.isle line 2260.
3959
0
        return v10;
3960
0
    }
3961
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_alurmi_with_flags_paired", "src/isa/x64/inst.isle line 2259")
3962
0
}
3963
3964
// Generated as internal constructor for term x64_alurmi_with_flags_chained.
3965
0
pub fn constructor_x64_alurmi_with_flags_chained<C: Context>(
3966
0
    ctx: &mut C,
3967
0
    arg0: &AluRmiROpcode,
3968
0
    arg1: Type,
3969
0
    arg2: Gpr,
3970
0
    arg3: &GprMemImm,
3971
0
) -> ConsumesAndProducesFlags {
3972
0
    let v2 = C::fits_in_64(ctx, arg1);
3973
0
    if let Some(v3) = v2 {
3974
0
        let v6 = C::temp_writable_gpr(ctx);
3975
0
        let v7 = &C::raw_operand_size_of_type(ctx, v3);
3976
0
        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
3977
0
        let v8 = MInst::AluRmiR {
3978
0
            size: v7.clone(),
3979
0
            op: arg0.clone(),
3980
0
            src1: arg2,
3981
0
            src2: arg3.clone(),
3982
0
            dst: v6,
3983
0
        };
3984
0
        let v10 = ConsumesAndProducesFlags::ReturnsReg {
3985
0
            inst: v8,
3986
0
            result: v9,
3987
0
        };
3988
0
        // Rule at src/isa/x64/inst.isle line 2272.
3989
0
        return v10;
3990
0
    }
3991
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_alurmi_with_flags_chained", "src/isa/x64/inst.isle line 2271")
3992
0
}
3993
3994
// Generated as internal constructor for term x64_adc_paired.
3995
0
pub fn constructor_x64_adc_paired<C: Context>(
3996
0
    ctx: &mut C,
3997
0
    arg0: Type,
3998
0
    arg1: Gpr,
3999
0
    arg2: &GprMemImm,
4000
0
) -> ConsumesFlags {
4001
0
    let v3 = C::temp_writable_gpr(ctx);
4002
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4003
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4004
0
    let v6 = MInst::AluRmiR {
4005
0
        size: v4.clone(),
4006
0
        op: AluRmiROpcode::Adc,
4007
0
        src1: arg1,
4008
0
        src2: arg2.clone(),
4009
0
        dst: v3,
4010
0
    };
4011
0
    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
4012
0
        inst: v6,
4013
0
        result: v7,
4014
0
    };
4015
0
    // Rule at src/isa/x64/inst.isle line 2284.
4016
0
    return v8;
4017
0
}
4018
4019
// Generated as internal constructor for term x64_sub.
4020
41.9k
pub fn constructor_x64_sub<C: Context>(
4021
41.9k
    ctx: &mut C,
4022
41.9k
    arg0: Type,
4023
41.9k
    arg1: Gpr,
4024
41.9k
    arg2: &GprMemImm,
4025
41.9k
) -> Gpr {
4026
41.9k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
4027
41.9k
    // Rule at src/isa/x64/inst.isle line 2296.
4028
41.9k
    return v4;
4029
41.9k
}
4030
4031
// Generated as internal constructor for term x64_sub_with_flags_paired.
4032
0
pub fn constructor_x64_sub_with_flags_paired<C: Context>(
4033
0
    ctx: &mut C,
4034
0
    arg0: Type,
4035
0
    arg1: Gpr,
4036
0
    arg2: &GprMemImm,
4037
0
) -> ProducesFlags {
4038
0
    let v3 = C::temp_writable_gpr(ctx);
4039
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4040
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4041
0
    let v6 = MInst::AluRmiR {
4042
0
        size: v4.clone(),
4043
0
        op: AluRmiROpcode::Sub,
4044
0
        src1: arg1,
4045
0
        src2: arg2.clone(),
4046
0
        dst: v3,
4047
0
    };
4048
0
    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4049
0
        inst: v6,
4050
0
        result: v7,
4051
0
    };
4052
0
    // Rule at src/isa/x64/inst.isle line 2304.
4053
0
    return v8;
4054
0
}
4055
4056
// Generated as internal constructor for term x64_sbb_paired.
4057
0
pub fn constructor_x64_sbb_paired<C: Context>(
4058
0
    ctx: &mut C,
4059
0
    arg0: Type,
4060
0
    arg1: Gpr,
4061
0
    arg2: &GprMemImm,
4062
0
) -> ConsumesFlags {
4063
0
    let v3 = C::temp_writable_gpr(ctx);
4064
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4065
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4066
0
    let v6 = MInst::AluRmiR {
4067
0
        size: v4.clone(),
4068
0
        op: AluRmiROpcode::Sbb,
4069
0
        src1: arg1,
4070
0
        src2: arg2.clone(),
4071
0
        dst: v3,
4072
0
    };
4073
0
    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
4074
0
        inst: v6,
4075
0
        result: v7,
4076
0
    };
4077
0
    // Rule at src/isa/x64/inst.isle line 2316.
4078
0
    return v8;
4079
0
}
4080
4081
// Generated as internal constructor for term x64_mul.
4082
28.8k
pub fn constructor_x64_mul<C: Context>(
4083
28.8k
    ctx: &mut C,
4084
28.8k
    arg0: Type,
4085
28.8k
    arg1: Gpr,
4086
28.8k
    arg2: &GprMemImm,
4087
28.8k
) -> Gpr {
4088
28.8k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Mul, arg1, arg2);
4089
28.8k
    // Rule at src/isa/x64/inst.isle line 2328.
4090
28.8k
    return v4;
4091
28.8k
}
4092
4093
// Generated as internal constructor for term x64_umullo.
4094
0
pub fn constructor_x64_umullo<C: Context>(
4095
0
    ctx: &mut C,
4096
0
    arg0: Type,
4097
0
    arg1: Gpr,
4098
0
    arg2: &GprMem,
4099
0
) -> Gpr {
4100
0
    let v3 = C::temp_writable_gpr(ctx);
4101
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
4102
0
    let v5 = MInst::UMulLo {
4103
0
        size: v4.clone(),
4104
0
        src1: arg1,
4105
0
        src2: arg2.clone(),
4106
0
        dst: v3,
4107
0
    };
4108
0
    let v6 = C::emit(ctx, &v5);
4109
0
    let v7 = C::writable_gpr_to_gpr(ctx, v3);
4110
0
    // Rule at src/isa/x64/inst.isle line 2336.
4111
0
    return v7;
4112
0
}
4113
4114
// Generated as internal constructor for term x64_umullo_with_flags_paired.
4115
0
pub fn constructor_x64_umullo_with_flags_paired<C: Context>(
4116
0
    ctx: &mut C,
4117
0
    arg0: Type,
4118
0
    arg1: Gpr,
4119
0
    arg2: &GprMem,
4120
0
) -> ProducesFlags {
4121
0
    let v3 = C::temp_writable_gpr(ctx);
4122
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
4123
0
    let v6 = constructor_writable_gpr_to_r_reg(ctx, v3);
4124
0
    let v5 = MInst::UMulLo {
4125
0
        size: v4.clone(),
4126
0
        src1: arg1,
4127
0
        src2: arg2.clone(),
4128
0
        dst: v3,
4129
0
    };
4130
0
    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4131
0
        inst: v5,
4132
0
        result: v6,
4133
0
    };
4134
0
    // Rule at src/isa/x64/inst.isle line 2343.
4135
0
    return v7;
4136
0
}
4137
4138
// Generated as internal constructor for term x64_and.
4139
50.0k
pub fn constructor_x64_and<C: Context>(
4140
50.0k
    ctx: &mut C,
4141
50.0k
    arg0: Type,
4142
50.0k
    arg1: Gpr,
4143
50.0k
    arg2: &GprMemImm,
4144
50.0k
) -> Gpr {
4145
50.0k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
4146
50.0k
    // Rule at src/isa/x64/inst.isle line 2354.
4147
50.0k
    return v4;
4148
50.0k
}
4149
4150
// Generated as internal constructor for term x64_and_with_flags_paired.
4151
0
pub fn constructor_x64_and_with_flags_paired<C: Context>(
4152
0
    ctx: &mut C,
4153
0
    arg0: Type,
4154
0
    arg1: Gpr,
4155
0
    arg2: &GprMemImm,
4156
0
) -> ProducesFlags {
4157
0
    let v3 = C::temp_writable_gpr(ctx);
4158
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4159
0
    let v6 = MInst::AluRmiR {
4160
0
        size: v4.clone(),
4161
0
        op: AluRmiROpcode::And,
4162
0
        src1: arg1,
4163
0
        src2: arg2.clone(),
4164
0
        dst: v3,
4165
0
    };
4166
0
    let v7 = ProducesFlags::ProducesFlagsSideEffect {
4167
0
        inst: v6,
4168
0
    };
4169
0
    // Rule at src/isa/x64/inst.isle line 2361.
4170
0
    return v7;
4171
0
}
4172
4173
// Generated as internal constructor for term x64_or.
4174
11.8k
pub fn constructor_x64_or<C: Context>(
4175
11.8k
    ctx: &mut C,
4176
11.8k
    arg0: Type,
4177
11.8k
    arg1: Gpr,
4178
11.8k
    arg2: &GprMemImm,
4179
11.8k
) -> Gpr {
4180
11.8k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
4181
11.8k
    // Rule at src/isa/x64/inst.isle line 2372.
4182
11.8k
    return v4;
4183
11.8k
}
4184
4185
// Generated as internal constructor for term x64_xor.
4186
2.62k
pub fn constructor_x64_xor<C: Context>(
4187
2.62k
    ctx: &mut C,
4188
2.62k
    arg0: Type,
4189
2.62k
    arg1: Gpr,
4190
2.62k
    arg2: &GprMemImm,
4191
2.62k
) -> Gpr {
4192
2.62k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
4193
2.62k
    // Rule at src/isa/x64/inst.isle line 2380.
4194
2.62k
    return v4;
4195
2.62k
}
4196
4197
// Generated as internal constructor for term alu_rm_r_vex.
4198
231
pub fn constructor_alu_rm_r_vex<C: Context>(
4199
231
    ctx: &mut C,
4200
231
    arg0: Type,
4201
231
    arg1: &AluRmROpcode,
4202
231
    arg2: Gpr,
4203
231
    arg3: Gpr,
4204
231
) -> Gpr {
4205
231
    let v4 = C::temp_writable_gpr(ctx);
4206
231
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
4207
231
    let v6 = MInst::AluRmRVex {
4208
231
        size: v5.clone(),
4209
231
        op: arg1.clone(),
4210
231
        src1: arg2,
4211
231
        src2: arg3,
4212
231
        dst: v4,
4213
231
    };
4214
231
    let v7 = C::emit(ctx, &v6);
4215
231
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
4216
231
    // Rule at src/isa/x64/inst.isle line 2388.
4217
231
    return v8;
4218
231
}
4219
4220
// Generated as internal constructor for term x64_andn.
4221
231
pub fn constructor_x64_andn<C: Context>(
4222
231
    ctx: &mut C,
4223
231
    arg0: Type,
4224
231
    arg1: Gpr,
4225
231
    arg2: Gpr,
4226
231
) -> Gpr {
4227
231
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Andn, arg1, arg2);
4228
231
    // Rule at src/isa/x64/inst.isle line 2395.
4229
231
    return v4;
4230
231
}
4231
4232
// Generated as internal constructor for term imm_i64.
4233
0
pub fn constructor_imm_i64<C: Context>(
4234
0
    ctx: &mut C,
4235
0
    arg0: Type,
4236
0
    arg1: i64,
4237
0
) -> Reg {
4238
0
    let v2 = C::i64_as_u64(ctx, arg1);
4239
0
    let v3 = constructor_imm(ctx, arg0, v2);
4240
0
    // Rule at src/isa/x64/inst.isle line 2402.
4241
0
    return v3;
4242
0
}
4243
4244
// Generated as internal constructor for term imm.
4245
335k
pub fn constructor_imm<C: Context>(
4246
335k
    ctx: &mut C,
4247
335k
    arg0: Type,
4248
335k
    arg1: u64,
4249
335k
) -> Reg {
4250
335k
    match arg0 {
4251
        I64 => {
4252
64.5k
            let v20 = C::nonzero_u64_fits_in_u32(ctx, arg1);
4253
64.5k
            if let Some(
v2116.4k
) = v20 {
4254
16.4k
                let v5 = C::temp_writable_gpr(ctx);
4255
16.4k
                let v23 = MInst::Imm {
4256
16.4k
                    dst_size: OperandSize::Size32,
4257
16.4k
                    simm64: v21,
4258
16.4k
                    dst: v5,
4259
16.4k
                };
4260
16.4k
                let v24 = C::emit(ctx, &v23);
4261
16.4k
                let v25 = constructor_writable_gpr_to_r_reg(ctx, v5);
4262
16.4k
                // Rule at src/isa/x64/inst.isle line 2433.
4263
16.4k
                return v25;
4264
48.0k
            }
4265
        }
4266
        F32 => {
4267
0
            let v4 = C::u64_is_zero(ctx, arg1);
4268
0
            match v4 {
4269
                true => {
4270
0
                    let v35 = constructor_xmm_zero(ctx, arg0);
4271
0
                    let v36 = C::xmm_to_reg(ctx, v35);
4272
0
                    // Rule at src/isa/x64/inst.isle line 2451.
4273
0
                    return v36;
4274
                }
4275
                false => {
4276
0
                    let v11 = constructor_imm(ctx, I32, arg1);
4277
0
                    let v12 = &C::reg_to_gpr_mem(ctx, v11);
4278
0
                    let v13 = constructor_x64_movd_to_xmm(ctx, v12);
4279
0
                    let v14 = C::xmm_to_reg(ctx, v13);
4280
0
                    // Rule at src/isa/x64/inst.isle line 2424.
4281
0
                    return v14;
4282
                }
4283
                _ => {}
4284
            }
4285
        }
4286
        F64 => {
4287
0
            let v4 = C::u64_is_zero(ctx, arg1);
4288
0
            match v4 {
4289
                true => {
4290
0
                    let v35 = constructor_xmm_zero(ctx, arg0);
4291
0
                    let v36 = C::xmm_to_reg(ctx, v35);
4292
0
                    // Rule at src/isa/x64/inst.isle line 2456.
4293
0
                    return v36;
4294
                }
4295
                false => {
4296
0
                    let v16 = constructor_imm(ctx, I64, arg1);
4297
0
                    let v17 = &C::reg_to_gpr_mem(ctx, v16);
4298
0
                    let v18 = constructor_x64_movq_to_xmm(ctx, v17);
4299
0
                    let v19 = C::xmm_to_reg(ctx, v18);
4300
0
                    // Rule at src/isa/x64/inst.isle line 2428.
4301
0
                    return v19;
4302
                }
4303
                _ => {}
4304
            }
4305
        }
4306
270k
        _ => {}
4307
    }
4308
318k
    let v1 = C::fits_in_64(ctx, arg0);
4309
318k
    if let Some(v2) = v1 {
4310
318k
        let v4 = C::u64_is_zero(ctx, arg1);
4311
318k
        match v4 {
4312
            true => {
4313
84.6k
                let v5 = C::temp_writable_gpr(ctx);
4314
84.6k
                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
4315
84.6k
                let v27 = MInst::AluConstOp {
4316
84.6k
                    op: AluRmiROpcode::Xor,
4317
84.6k
                    size: v6.clone(),
4318
84.6k
                    dst: v5,
4319
84.6k
                };
4320
84.6k
                let v28 = C::emit(ctx, &v27);
4321
84.6k
                let v29 = C::writable_gpr_to_gpr(ctx, v5);
4322
84.6k
                let v30 = C::gpr_to_reg(ctx, v29);
4323
84.6k
                // Rule at src/isa/x64/inst.isle line 2439.
4324
84.6k
                return v30;
4325
            }
4326
            false => {
4327
234k
                let v5 = C::temp_writable_gpr(ctx);
4328
234k
                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
4329
234k
                let v7 = MInst::Imm {
4330
234k
                    dst_size: v6.clone(),
4331
234k
                    simm64: arg1,
4332
234k
                    dst: v5,
4333
234k
                };
4334
234k
                let v8 = C::emit(ctx, &v7);
4335
234k
                let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
4336
234k
                // Rule at src/isa/x64/inst.isle line 2417.
4337
234k
                return v9;
4338
            }
4339
            _ => {}
4340
        }
4341
0
    }
4342
0
    if arg1 == 0x0 {
4343
0
        let v31 = C::multi_lane(ctx, arg0);
4344
0
        if let Some(v32) = v31 {
4345
0
            let v35 = constructor_xmm_zero(ctx, arg0);
4346
0
            let v36 = C::xmm_to_reg(ctx, v35);
4347
0
            // Rule at src/isa/x64/inst.isle line 2447.
4348
0
            return v36;
4349
0
        }
4350
0
    }
4351
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "imm", "src/isa/x64/inst.isle line 2414")
4352
335k
}
4353
4354
// Generated as internal constructor for term xmm_zero.
4355
0
pub fn constructor_xmm_zero<C: Context>(
4356
0
    ctx: &mut C,
4357
0
    arg0: Type,
4358
0
) -> Xmm {
4359
0
    let v1 = constructor_xmm_uninit_value(ctx);
4360
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
4361
0
    let v3 = constructor_x64_xor_vector(ctx, arg0, v1, v2);
4362
0
    // Rule at src/isa/x64/inst.isle line 2461.
4363
0
    return v3;
4364
0
}
4365
4366
// Generated as internal constructor for term shift_r.
4367
54.6k
pub fn constructor_shift_r<C: Context>(
4368
54.6k
    ctx: &mut C,
4369
54.6k
    arg0: Type,
4370
54.6k
    arg1: &ShiftKind,
4371
54.6k
    arg2: Gpr,
4372
54.6k
    arg3: &Imm8Gpr,
4373
54.6k
) -> Gpr {
4374
54.6k
    let v4 = C::temp_writable_gpr(ctx);
4375
54.6k
    let v5 = &C::raw_operand_size_of_type(ctx, arg0);
4376
54.6k
    let v6 = MInst::ShiftR {
4377
54.6k
        size: v5.clone(),
4378
54.6k
        kind: arg1.clone(),
4379
54.6k
        src: arg2,
4380
54.6k
        num_bits: arg3.clone(),
4381
54.6k
        dst: v4,
4382
54.6k
    };
4383
54.6k
    let v7 = C::emit(ctx, &v6);
4384
54.6k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
4385
54.6k
    // Rule at src/isa/x64/inst.isle line 2467.
4386
54.6k
    return v8;
4387
54.6k
}
4388
4389
// Generated as internal constructor for term x64_rotl.
4390
979
pub fn constructor_x64_rotl<C: Context>(
4391
979
    ctx: &mut C,
4392
979
    arg0: Type,
4393
979
    arg1: Gpr,
4394
979
    arg2: &Imm8Gpr,
4395
979
) -> Gpr {
4396
979
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateLeft, arg1, arg2);
4397
979
    // Rule at src/isa/x64/inst.isle line 2477.
4398
979
    return v4;
4399
979
}
4400
4401
// Generated as internal constructor for term x64_rotr.
4402
3
pub fn constructor_x64_rotr<C: Context>(
4403
3
    ctx: &mut C,
4404
3
    arg0: Type,
4405
3
    arg1: Gpr,
4406
3
    arg2: &Imm8Gpr,
4407
3
) -> Gpr {
4408
3
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateRight, arg1, arg2);
4409
3
    // Rule at src/isa/x64/inst.isle line 2482.
4410
3
    return v4;
4411
3
}
4412
4413
// Generated as internal constructor for term x64_shl.
4414
44.2k
pub fn constructor_x64_shl<C: Context>(
4415
44.2k
    ctx: &mut C,
4416
44.2k
    arg0: Type,
4417
44.2k
    arg1: Gpr,
4418
44.2k
    arg2: &Imm8Gpr,
4419
44.2k
) -> Gpr {
4420
44.2k
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftLeft, arg1, arg2);
4421
44.2k
    // Rule at src/isa/x64/inst.isle line 2487.
4422
44.2k
    return v4;
4423
44.2k
}
4424
4425
// Generated as internal constructor for term x64_shr.
4426
9.25k
pub fn constructor_x64_shr<C: Context>(
4427
9.25k
    ctx: &mut C,
4428
9.25k
    arg0: Type,
4429
9.25k
    arg1: Gpr,
4430
9.25k
    arg2: &Imm8Gpr,
4431
9.25k
) -> Gpr {
4432
9.25k
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightLogical, arg1, arg2);
4433
9.25k
    // Rule at src/isa/x64/inst.isle line 2492.
4434
9.25k
    return v4;
4435
9.25k
}
4436
4437
// Generated as internal constructor for term x64_sar.
4438
209
pub fn constructor_x64_sar<C: Context>(
4439
209
    ctx: &mut C,
4440
209
    arg0: Type,
4441
209
    arg1: Gpr,
4442
209
    arg2: &Imm8Gpr,
4443
209
) -> Gpr {
4444
209
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightArithmetic, arg1, arg2);
4445
209
    // Rule at src/isa/x64/inst.isle line 2497.
4446
209
    return v4;
4447
209
}
4448
4449
// Generated as internal constructor for term x64_bswap.
4450
0
pub fn constructor_x64_bswap<C: Context>(
4451
0
    ctx: &mut C,
4452
0
    arg0: Type,
4453
0
    arg1: Gpr,
4454
0
) -> Gpr {
4455
0
    let v2 = C::temp_writable_gpr(ctx);
4456
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
4457
0
    let v4 = MInst::Bswap {
4458
0
        size: v3.clone(),
4459
0
        src: arg1,
4460
0
        dst: v2,
4461
0
    };
4462
0
    let v5 = C::emit(ctx, &v4);
4463
0
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
4464
0
    // Rule at src/isa/x64/inst.isle line 2504.
4465
0
    return v6;
4466
0
}
4467
4468
// Generated as internal constructor for term cmp_rmi_r.
4469
358k
pub fn constructor_cmp_rmi_r<C: Context>(
4470
358k
    ctx: &mut C,
4471
358k
    arg0: &OperandSize,
4472
358k
    arg1: &CmpOpcode,
4473
358k
    arg2: &GprMemImm,
4474
358k
    arg3: Gpr,
4475
358k
) -> ProducesFlags {
4476
358k
    let v4 = MInst::CmpRmiR {
4477
358k
        size: arg0.clone(),
4478
358k
        opcode: arg1.clone(),
4479
358k
        src: arg2.clone(),
4480
358k
        dst: arg3,
4481
358k
    };
4482
358k
    let v5 = ProducesFlags::ProducesFlagsSideEffect {
4483
358k
        inst: v4,
4484
358k
    };
4485
358k
    // Rule at src/isa/x64/inst.isle line 2512.
4486
358k
    return v5;
4487
358k
}
4488
4489
// Generated as internal constructor for term x64_cmp.
4490
195k
pub fn constructor_x64_cmp<C: Context>(
4491
195k
    ctx: &mut C,
4492
195k
    arg0: &OperandSize,
4493
195k
    arg1: &GprMemImm,
4494
195k
    arg2: Gpr,
4495
195k
) -> ProducesFlags {
4496
195k
    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, arg1, arg2);
4497
195k
    // Rule at src/isa/x64/inst.isle line 2521.
4498
195k
    return v4.clone();
4499
195k
}
4500
4501
// Generated as internal constructor for term x64_cmp_imm.
4502
0
pub fn constructor_x64_cmp_imm<C: Context>(
4503
0
    ctx: &mut C,
4504
0
    arg0: &OperandSize,
4505
0
    arg1: u32,
4506
0
    arg2: Gpr,
4507
0
) -> ProducesFlags {
4508
0
    let v4 = RegMemImm::Imm {
4509
0
        simm32: arg1,
4510
0
    };
4511
0
    let v5 = &C::gpr_mem_imm_new(ctx, &v4);
4512
0
    let v6 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, v5, arg2);
4513
0
    // Rule at src/isa/x64/inst.isle line 2526.
4514
0
    return v6.clone();
4515
0
}
4516
4517
// Generated as internal constructor for term xmm_cmp_rm_r.
4518
0
pub fn constructor_xmm_cmp_rm_r<C: Context>(
4519
0
    ctx: &mut C,
4520
0
    arg0: &SseOpcode,
4521
0
    arg1: &XmmMemAligned,
4522
0
    arg2: Xmm,
4523
0
) -> ProducesFlags {
4524
0
    let v3 = MInst::XmmCmpRmR {
4525
0
        op: arg0.clone(),
4526
0
        src: arg1.clone(),
4527
0
        dst: arg2,
4528
0
    };
4529
0
    let v4 = ProducesFlags::ProducesFlagsSideEffect {
4530
0
        inst: v3,
4531
0
    };
4532
0
    // Rule at src/isa/x64/inst.isle line 2531.
4533
0
    return v4;
4534
0
}
4535
4536
// Generated as internal constructor for term x64_ucomis.
4537
0
pub fn constructor_x64_ucomis<C: Context>(
4538
0
    ctx: &mut C,
4539
0
    arg0: Value,
4540
0
    arg1: Value,
4541
0
) -> ProducesFlags {
4542
0
    let v1 = C::value_type(ctx, arg0);
4543
0
    match v1 {
4544
        F32 => {
4545
0
            let v4 = constructor_put_in_xmm(ctx, arg0);
4546
0
            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
4547
0
            let v6 = constructor_put_in_xmm(ctx, arg1);
4548
0
            let v7 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomiss, v5, v6);
4549
0
            // Rule at src/isa/x64/inst.isle line 2537.
4550
0
            return v7.clone();
4551
        }
4552
        F64 => {
4553
0
            let v4 = constructor_put_in_xmm(ctx, arg0);
4554
0
            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
4555
0
            let v6 = constructor_put_in_xmm(ctx, arg1);
4556
0
            let v9 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomisd, v5, v6);
4557
0
            // Rule at src/isa/x64/inst.isle line 2541.
4558
0
            return v9.clone();
4559
        }
4560
0
        _ => {}
4561
0
    }
4562
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_ucomis", "src/isa/x64/inst.isle line 2536")
4563
0
}
4564
4565
// Generated as internal constructor for term x64_test.
4566
163k
pub fn constructor_x64_test<C: Context>(
4567
163k
    ctx: &mut C,
4568
163k
    arg0: &OperandSize,
4569
163k
    arg1: &GprMemImm,
4570
163k
    arg2: Gpr,
4571
163k
) -> ProducesFlags {
4572
163k
    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Test, arg1, arg2);
4573
163k
    // Rule at src/isa/x64/inst.isle line 2546.
4574
163k
    return v4.clone();
4575
163k
}
4576
4577
// Generated as internal constructor for term x64_ptest.
4578
0
pub fn constructor_x64_ptest<C: Context>(
4579
0
    ctx: &mut C,
4580
0
    arg0: &XmmMem,
4581
0
    arg1: Xmm,
4582
0
) -> ProducesFlags {
4583
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
4584
0
    let v4 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ptest, v3, arg1);
4585
0
    // Rule at src/isa/x64/inst.isle line 2551.
4586
0
    return v4.clone();
4587
0
}
4588
4589
// Generated as internal constructor for term cmove.
4590
50.9k
pub fn constructor_cmove<C: Context>(
4591
50.9k
    ctx: &mut C,
4592
50.9k
    arg0: Type,
4593
50.9k
    arg1: &CC,
4594
50.9k
    arg2: &GprMem,
4595
50.9k
    arg3: Gpr,
4596
50.9k
) -> ConsumesFlags {
4597
50.9k
    let v4 = C::temp_writable_gpr(ctx);
4598
50.9k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
4599
50.9k
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v4);
4600
50.9k
    let v6 = MInst::Cmove {
4601
50.9k
        size: v5.clone(),
4602
50.9k
        cc: arg1.clone(),
4603
50.9k
        consequent: arg2.clone(),
4604
50.9k
        alternative: arg3,
4605
50.9k
        dst: v4,
4606
50.9k
    };
4607
50.9k
    let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
4608
50.9k
        inst: v6,
4609
50.9k
        result: v7,
4610
50.9k
    };
4611
50.9k
    // Rule at src/isa/x64/inst.isle line 2558.
4612
50.9k
    return v8;
4613
50.9k
}
4614
4615
// Generated as internal constructor for term cmove_xmm.
4616
0
pub fn constructor_cmove_xmm<C: Context>(
4617
0
    ctx: &mut C,
4618
0
    arg0: Type,
4619
0
    arg1: &CC,
4620
0
    arg2: &XmmMemAligned,
4621
0
    arg3: Xmm,
4622
0
) -> ConsumesFlags {
4623
0
    let v4 = C::temp_writable_xmm(ctx);
4624
0
    let v6 = constructor_writable_xmm_to_r_reg(ctx, v4);
4625
0
    let v5 = MInst::XmmCmove {
4626
0
        ty: arg0,
4627
0
        cc: arg1.clone(),
4628
0
        consequent: arg2.clone(),
4629
0
        alternative: arg3,
4630
0
        dst: v4,
4631
0
    };
4632
0
    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
4633
0
        inst: v5,
4634
0
        result: v6,
4635
0
    };
4636
0
    // Rule at src/isa/x64/inst.isle line 2566.
4637
0
    return v7;
4638
0
}
4639
4640
// Generated as internal constructor for term cmove_from_values.
4641
13.4k
pub fn constructor_cmove_from_values<C: Context>(
4642
13.4k
    ctx: &mut C,
4643
13.4k
    arg0: Type,
4644
13.4k
    arg1: &CC,
4645
13.4k
    arg2: Value,
4646
13.4k
    arg3: Value,
4647
13.4k
) -> ConsumesFlags {
4648
13.4k
    let v1 = &C::type_register_class(ctx, arg0);
4649
13.4k
    if let Some(v2) = v1 {
4650
13.4k
        match v2 {
4651
            &RegisterClass::Gpr {
4652
13.4k
                single_register: v3,
4653
13.4k
            } => {
4654
13.4k
                match v3 {
4655
                    true => {
4656
13.4k
                        let v26 = &constructor_put_in_gpr_mem(ctx, arg2);
4657
13.4k
                        let v27 = constructor_put_in_gpr(ctx, arg3);
4658
13.4k
                        let v28 = &constructor_cmove(ctx, arg0, arg1, v26, v27);
4659
13.4k
                        // Rule at src/isa/x64/inst.isle line 2597.
4660
13.4k
                        return v28.clone();
4661
                    }
4662
                    false => {
4663
0
                        if arg0 == I128 {
4664
0
                            let v7 = C::put_in_regs(ctx, arg2);
4665
0
                            let v8 = C::put_in_regs(ctx, arg3);
4666
0
                            let v9 = C::temp_writable_gpr(ctx);
4667
0
                            let v10 = C::temp_writable_gpr(ctx);
4668
0
                            let v13 = constructor_value_regs_get_gpr(ctx, v7, 0x0);
4669
0
                            let v14 = &C::gpr_to_gpr_mem(ctx, v13);
4670
0
                            let v15 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
4671
0
                            let v18 = constructor_value_regs_get_gpr(ctx, v7, 0x1);
4672
0
                            let v19 = &C::gpr_to_gpr_mem(ctx, v18);
4673
0
                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
4674
0
                            let v22 = constructor_writable_gpr_to_r_reg(ctx, v9);
4675
0
                            let v23 = constructor_writable_gpr_to_r_reg(ctx, v10);
4676
0
                            let v24 = C::value_regs(ctx, v22, v23);
4677
0
                            let v16 = MInst::Cmove {
4678
0
                                size: OperandSize::Size64,
4679
0
                                cc: arg1.clone(),
4680
0
                                consequent: v14.clone(),
4681
0
                                alternative: v15,
4682
0
                                dst: v9,
4683
0
                            };
4684
0
                            let v21 = MInst::Cmove {
4685
0
                                size: OperandSize::Size64,
4686
0
                                cc: arg1.clone(),
4687
0
                                consequent: v19.clone(),
4688
0
                                alternative: v20,
4689
0
                                dst: v10,
4690
0
                            };
4691
0
                            let v25 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
4692
0
                                inst1: v16,
4693
0
                                inst2: v21,
4694
0
                                result: v24,
4695
0
                            };
4696
0
                            // Rule at src/isa/x64/inst.isle line 2576.
4697
0
                            return v25;
4698
0
                        }
4699
                    }
4700
                    _ => {}
4701
                }
4702
            }
4703
            &RegisterClass::Xmm => {
4704
0
                let v29 = &constructor_put_in_xmm_mem_aligned(ctx, arg2);
4705
0
                let v30 = constructor_put_in_xmm(ctx, arg3);
4706
0
                let v31 = &constructor_cmove_xmm(ctx, arg0, arg1, v29, v30);
4707
0
                // Rule at src/isa/x64/inst.isle line 2600.
4708
0
                return v31.clone();
4709
            }
4710
0
            _ => {}
4711
        }
4712
0
    }
4713
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmove_from_values", "src/isa/x64/inst.isle line 2575")
4714
13.4k
}
4715
4716
// Generated as internal constructor for term cmove_or.
4717
0
pub fn constructor_cmove_or<C: Context>(
4718
0
    ctx: &mut C,
4719
0
    arg0: Type,
4720
0
    arg1: &CC,
4721
0
    arg2: &CC,
4722
0
    arg3: &GprMem,
4723
0
    arg4: Gpr,
4724
0
) -> ConsumesFlags {
4725
0
    let v5 = C::temp_writable_gpr(ctx);
4726
0
    let v6 = C::temp_writable_gpr(ctx);
4727
0
    let v7 = &C::operand_size_of_type_32_64(ctx, arg0);
4728
0
    let v9 = C::writable_gpr_to_gpr(ctx, v6);
4729
0
    let v11 = constructor_writable_gpr_to_value_regs(ctx, v5);
4730
0
    let v8 = MInst::Cmove {
4731
0
        size: v7.clone(),
4732
0
        cc: arg1.clone(),
4733
0
        consequent: arg3.clone(),
4734
0
        alternative: arg4,
4735
0
        dst: v6,
4736
0
    };
4737
0
    let v10 = MInst::Cmove {
4738
0
        size: v7.clone(),
4739
0
        cc: arg2.clone(),
4740
0
        consequent: arg3.clone(),
4741
0
        alternative: v9,
4742
0
        dst: v5,
4743
0
    };
4744
0
    let v12 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
4745
0
        inst1: v8,
4746
0
        inst2: v10,
4747
0
        result: v11,
4748
0
    };
4749
0
    // Rule at src/isa/x64/inst.isle line 2607.
4750
0
    return v12;
4751
0
}
4752
4753
// Generated as internal constructor for term cmove_or_xmm.
4754
0
pub fn constructor_cmove_or_xmm<C: Context>(
4755
0
    ctx: &mut C,
4756
0
    arg0: Type,
4757
0
    arg1: &CC,
4758
0
    arg2: &CC,
4759
0
    arg3: &XmmMemAligned,
4760
0
    arg4: Xmm,
4761
0
) -> ConsumesFlags {
4762
0
    let v5 = C::temp_writable_xmm(ctx);
4763
0
    let v6 = C::temp_writable_xmm(ctx);
4764
0
    let v8 = C::writable_xmm_to_xmm(ctx, v6);
4765
0
    let v10 = constructor_writable_xmm_to_value_regs(ctx, v5);
4766
0
    let v7 = MInst::XmmCmove {
4767
0
        ty: arg0,
4768
0
        cc: arg1.clone(),
4769
0
        consequent: arg3.clone(),
4770
0
        alternative: arg4,
4771
0
        dst: v6,
4772
0
    };
4773
0
    let v9 = MInst::XmmCmove {
4774
0
        ty: arg0,
4775
0
        cc: arg2.clone(),
4776
0
        consequent: arg3.clone(),
4777
0
        alternative: v8,
4778
0
        dst: v5,
4779
0
    };
4780
0
    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
4781
0
        inst1: v7,
4782
0
        inst2: v9,
4783
0
        result: v10,
4784
0
    };
4785
0
    // Rule at src/isa/x64/inst.isle line 2619.
4786
0
    return v11;
4787
0
}
4788
4789
// Generated as internal constructor for term cmove_or_from_values.
4790
0
pub fn constructor_cmove_or_from_values<C: Context>(
4791
0
    ctx: &mut C,
4792
0
    arg0: Type,
4793
0
    arg1: &CC,
4794
0
    arg2: &CC,
4795
0
    arg3: Value,
4796
0
    arg4: Value,
4797
0
) -> ConsumesFlags {
4798
0
    let v1 = &C::type_register_class(ctx, arg0);
4799
0
    if let Some(v2) = v1 {
4800
0
        match v2 {
4801
            &RegisterClass::Gpr {
4802
0
                single_register: v3,
4803
0
            } => {
4804
0
                match v3 {
4805
                    true => {
4806
0
                        let v37 = &constructor_put_in_gpr_mem(ctx, arg3);
4807
0
                        let v38 = constructor_put_in_gpr(ctx, arg4);
4808
0
                        let v39 = &constructor_cmove_or(ctx, arg0, arg1, arg2, v37, v38);
4809
0
                        // Rule at src/isa/x64/inst.isle line 2652.
4810
0
                        return v39.clone();
4811
                    }
4812
                    false => {
4813
0
                        if arg0 == I128 {
4814
0
                            let v8 = C::put_in_regs(ctx, arg3);
4815
0
                            let v9 = C::put_in_regs(ctx, arg4);
4816
0
                            let v10 = C::temp_writable_gpr(ctx);
4817
0
                            let v11 = C::temp_writable_gpr(ctx);
4818
0
                            let v12 = C::temp_writable_gpr(ctx);
4819
0
                            let v13 = C::temp_writable_gpr(ctx);
4820
0
                            let v16 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
4821
0
                            let v17 = &C::gpr_to_gpr_mem(ctx, v16);
4822
0
                            let v18 = constructor_value_regs_get_gpr(ctx, v9, 0x0);
4823
0
                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
4824
0
                            let v21 = &C::gpr_to_gpr_mem(ctx, v20);
4825
0
                            let v22 = C::writable_gpr_to_gpr(ctx, v12);
4826
0
                            let v25 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
4827
0
                            let v26 = &C::gpr_to_gpr_mem(ctx, v25);
4828
0
                            let v27 = constructor_value_regs_get_gpr(ctx, v9, 0x1);
4829
0
                            let v29 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
4830
0
                            let v30 = &C::gpr_to_gpr_mem(ctx, v29);
4831
0
                            let v31 = C::writable_gpr_to_gpr(ctx, v13);
4832
0
                            let v33 = constructor_writable_gpr_to_r_reg(ctx, v10);
4833
0
                            let v34 = constructor_writable_gpr_to_r_reg(ctx, v11);
4834
0
                            let v35 = C::value_regs(ctx, v33, v34);
4835
0
                            let v19 = MInst::Cmove {
4836
0
                                size: OperandSize::Size64,
4837
0
                                cc: arg1.clone(),
4838
0
                                consequent: v17.clone(),
4839
0
                                alternative: v18,
4840
0
                                dst: v12,
4841
0
                            };
4842
0
                            let v23 = MInst::Cmove {
4843
0
                                size: OperandSize::Size64,
4844
0
                                cc: arg2.clone(),
4845
0
                                consequent: v21.clone(),
4846
0
                                alternative: v22,
4847
0
                                dst: v10,
4848
0
                            };
4849
0
                            let v28 = MInst::Cmove {
4850
0
                                size: OperandSize::Size64,
4851
0
                                cc: arg1.clone(),
4852
0
                                consequent: v26.clone(),
4853
0
                                alternative: v27,
4854
0
                                dst: v13,
4855
0
                            };
4856
0
                            let v32 = MInst::Cmove {
4857
0
                                size: OperandSize::Size64,
4858
0
                                cc: arg2.clone(),
4859
0
                                consequent: v30.clone(),
4860
0
                                alternative: v31,
4861
0
                                dst: v11,
4862
0
                            };
4863
0
                            let v36 = ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
4864
0
                                inst1: v19,
4865
0
                                inst2: v23,
4866
0
                                inst3: v28,
4867
0
                                inst4: v32,
4868
0
                                result: v35,
4869
0
                            };
4870
0
                            // Rule at src/isa/x64/inst.isle line 2633.
4871
0
                            return v36;
4872
0
                        }
4873
                    }
4874
                    _ => {}
4875
                }
4876
            }
4877
            &RegisterClass::Xmm => {
4878
0
                let v40 = &constructor_put_in_xmm_mem_aligned(ctx, arg3);
4879
0
                let v41 = constructor_put_in_xmm(ctx, arg4);
4880
0
                let v42 = &constructor_cmove_or_xmm(ctx, arg0, arg1, arg2, v40, v41);
4881
0
                // Rule at src/isa/x64/inst.isle line 2655.
4882
0
                return v42.clone();
4883
            }
4884
0
            _ => {}
4885
        }
4886
0
    }
4887
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmove_or_from_values", "src/isa/x64/inst.isle line 2632")
4888
0
}
4889
4890
// Generated as internal constructor for term x64_setcc.
4891
10.7k
pub fn constructor_x64_setcc<C: Context>(
4892
10.7k
    ctx: &mut C,
4893
10.7k
    arg0: &CC,
4894
10.7k
) -> ConsumesFlags {
4895
10.7k
    let v1 = C::temp_writable_gpr(ctx);
4896
10.7k
    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
4897
10.7k
    let v2 = MInst::Setcc {
4898
10.7k
        cc: arg0.clone(),
4899
10.7k
        dst: v1,
4900
10.7k
    };
4901
10.7k
    let v4 = ConsumesFlags::ConsumesFlagsReturnsReg {
4902
10.7k
        inst: v2,
4903
10.7k
        result: v3,
4904
10.7k
    };
4905
10.7k
    // Rule at src/isa/x64/inst.isle line 2660.
4906
10.7k
    return v4;
4907
10.7k
}
4908
4909
// Generated as internal constructor for term x64_setcc_paired.
4910
0
pub fn constructor_x64_setcc_paired<C: Context>(
4911
0
    ctx: &mut C,
4912
0
    arg0: &CC,
4913
0
) -> ConsumesFlags {
4914
0
    let v1 = C::temp_writable_gpr(ctx);
4915
0
    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
4916
0
    let v2 = MInst::Setcc {
4917
0
        cc: arg0.clone(),
4918
0
        dst: v1,
4919
0
    };
4920
0
    let v4 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
4921
0
        inst: v2,
4922
0
        result: v3,
4923
0
    };
4924
0
    // Rule at src/isa/x64/inst.isle line 2669.
4925
0
    return v4;
4926
0
}
4927
4928
// Generated as internal constructor for term xmm_rm_r.
4929
0
pub fn constructor_xmm_rm_r<C: Context>(
4930
0
    ctx: &mut C,
4931
0
    arg0: &SseOpcode,
4932
0
    arg1: Xmm,
4933
0
    arg2: &XmmMemAligned,
4934
0
) -> Xmm {
4935
0
    let v3 = C::temp_writable_xmm(ctx);
4936
0
    let v4 = MInst::XmmRmR {
4937
0
        op: arg0.clone(),
4938
0
        src1: arg1,
4939
0
        src2: arg2.clone(),
4940
0
        dst: v3,
4941
0
    };
4942
0
    let v5 = C::emit(ctx, &v4);
4943
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
4944
0
    // Rule at src/isa/x64/inst.isle line 2677.
4945
0
    return v6;
4946
0
}
4947
4948
// Generated as internal constructor for term xmm_rm_r_unaligned.
4949
0
pub fn constructor_xmm_rm_r_unaligned<C: Context>(
4950
0
    ctx: &mut C,
4951
0
    arg0: &SseOpcode,
4952
0
    arg1: Xmm,
4953
0
    arg2: &XmmMem,
4954
0
) -> Xmm {
4955
0
    let v3 = C::temp_writable_xmm(ctx);
4956
0
    let v4 = MInst::XmmRmRUnaligned {
4957
0
        op: arg0.clone(),
4958
0
        src1: arg1,
4959
0
        src2: arg2.clone(),
4960
0
        dst: v3,
4961
0
    };
4962
0
    let v5 = C::emit(ctx, &v4);
4963
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
4964
0
    // Rule at src/isa/x64/inst.isle line 2684.
4965
0
    return v6;
4966
0
}
4967
4968
// Generated as internal constructor for term x64_paddb.
4969
0
pub fn constructor_x64_paddb<C: Context>(
4970
0
    ctx: &mut C,
4971
0
    arg0: Xmm,
4972
0
    arg1: &XmmMem,
4973
0
) -> Xmm {
4974
0
    let v5 = C::use_avx_simd(ctx);
4975
0
    if v5 == true {
4976
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
4977
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddb, arg0, v7);
4978
0
        // Rule at src/isa/x64/inst.isle line 2693.
4979
0
        return v8;
4980
0
    }
4981
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
4982
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddb, arg0, v3);
4983
0
    // Rule at src/isa/x64/inst.isle line 2691.
4984
0
    return v4;
4985
0
}
4986
4987
// Generated as internal constructor for term x64_paddw.
4988
0
pub fn constructor_x64_paddw<C: Context>(
4989
0
    ctx: &mut C,
4990
0
    arg0: Xmm,
4991
0
    arg1: &XmmMem,
4992
0
) -> Xmm {
4993
0
    let v5 = C::use_avx_simd(ctx);
4994
0
    if v5 == true {
4995
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
4996
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddw, arg0, v7);
4997
0
        // Rule at src/isa/x64/inst.isle line 2701.
4998
0
        return v8;
4999
0
    }
5000
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5001
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddw, arg0, v3);
5002
0
    // Rule at src/isa/x64/inst.isle line 2699.
5003
0
    return v4;
5004
0
}
5005
5006
// Generated as internal constructor for term x64_paddd.
5007
0
pub fn constructor_x64_paddd<C: Context>(
5008
0
    ctx: &mut C,
5009
0
    arg0: Xmm,
5010
0
    arg1: &XmmMem,
5011
0
) -> Xmm {
5012
0
    let v5 = C::use_avx_simd(ctx);
5013
0
    if v5 == true {
5014
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5015
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddd, arg0, v7);
5016
0
        // Rule at src/isa/x64/inst.isle line 2709.
5017
0
        return v8;
5018
0
    }
5019
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5020
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddd, arg0, v3);
5021
0
    // Rule at src/isa/x64/inst.isle line 2707.
5022
0
    return v4;
5023
0
}
5024
5025
// Generated as internal constructor for term x64_paddq.
5026
0
pub fn constructor_x64_paddq<C: Context>(
5027
0
    ctx: &mut C,
5028
0
    arg0: Xmm,
5029
0
    arg1: &XmmMem,
5030
0
) -> Xmm {
5031
0
    let v5 = C::use_avx_simd(ctx);
5032
0
    if v5 == true {
5033
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5034
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddq, arg0, v7);
5035
0
        // Rule at src/isa/x64/inst.isle line 2717.
5036
0
        return v8;
5037
0
    }
5038
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5039
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddq, arg0, v3);
5040
0
    // Rule at src/isa/x64/inst.isle line 2715.
5041
0
    return v4;
5042
0
}
5043
5044
// Generated as internal constructor for term x64_paddsb.
5045
0
pub fn constructor_x64_paddsb<C: Context>(
5046
0
    ctx: &mut C,
5047
0
    arg0: Xmm,
5048
0
    arg1: &XmmMem,
5049
0
) -> Xmm {
5050
0
    let v5 = C::use_avx_simd(ctx);
5051
0
    if v5 == true {
5052
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5053
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsb, arg0, v7);
5054
0
        // Rule at src/isa/x64/inst.isle line 2725.
5055
0
        return v8;
5056
0
    }
5057
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5058
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsb, arg0, v3);
5059
0
    // Rule at src/isa/x64/inst.isle line 2723.
5060
0
    return v4;
5061
0
}
5062
5063
// Generated as internal constructor for term x64_paddsw.
5064
0
pub fn constructor_x64_paddsw<C: Context>(
5065
0
    ctx: &mut C,
5066
0
    arg0: Xmm,
5067
0
    arg1: &XmmMem,
5068
0
) -> Xmm {
5069
0
    let v5 = C::use_avx_simd(ctx);
5070
0
    if v5 == true {
5071
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5072
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsw, arg0, v7);
5073
0
        // Rule at src/isa/x64/inst.isle line 2733.
5074
0
        return v8;
5075
0
    }
5076
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5077
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsw, arg0, v3);
5078
0
    // Rule at src/isa/x64/inst.isle line 2731.
5079
0
    return v4;
5080
0
}
5081
5082
// Generated as internal constructor for term x64_phaddw.
5083
0
pub fn constructor_x64_phaddw<C: Context>(
5084
0
    ctx: &mut C,
5085
0
    arg0: Xmm,
5086
0
    arg1: &XmmMem,
5087
0
) -> Xmm {
5088
0
    let v5 = C::use_avx_simd(ctx);
5089
0
    if v5 == true {
5090
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5091
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddw, arg0, v7);
5092
0
        // Rule at src/isa/x64/inst.isle line 2741.
5093
0
        return v8;
5094
0
    }
5095
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5096
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddw, arg0, v3);
5097
0
    // Rule at src/isa/x64/inst.isle line 2739.
5098
0
    return v4;
5099
0
}
5100
5101
// Generated as internal constructor for term x64_phaddd.
5102
0
pub fn constructor_x64_phaddd<C: Context>(
5103
0
    ctx: &mut C,
5104
0
    arg0: Xmm,
5105
0
    arg1: &XmmMem,
5106
0
) -> Xmm {
5107
0
    let v5 = C::use_avx_simd(ctx);
5108
0
    if v5 == true {
5109
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5110
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddd, arg0, v7);
5111
0
        // Rule at src/isa/x64/inst.isle line 2749.
5112
0
        return v8;
5113
0
    }
5114
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5115
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddd, arg0, v3);
5116
0
    // Rule at src/isa/x64/inst.isle line 2747.
5117
0
    return v4;
5118
0
}
5119
5120
// Generated as internal constructor for term x64_paddusb.
5121
0
pub fn constructor_x64_paddusb<C: Context>(
5122
0
    ctx: &mut C,
5123
0
    arg0: Xmm,
5124
0
    arg1: &XmmMem,
5125
0
) -> Xmm {
5126
0
    let v5 = C::use_avx_simd(ctx);
5127
0
    if v5 == true {
5128
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5129
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusb, arg0, v7);
5130
0
        // Rule at src/isa/x64/inst.isle line 2757.
5131
0
        return v8;
5132
0
    }
5133
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5134
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusb, arg0, v3);
5135
0
    // Rule at src/isa/x64/inst.isle line 2755.
5136
0
    return v4;
5137
0
}
5138
5139
// Generated as internal constructor for term x64_paddusw.
5140
0
pub fn constructor_x64_paddusw<C: Context>(
5141
0
    ctx: &mut C,
5142
0
    arg0: Xmm,
5143
0
    arg1: &XmmMem,
5144
0
) -> Xmm {
5145
0
    let v5 = C::use_avx_simd(ctx);
5146
0
    if v5 == true {
5147
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5148
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusw, arg0, v7);
5149
0
        // Rule at src/isa/x64/inst.isle line 2765.
5150
0
        return v8;
5151
0
    }
5152
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5153
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusw, arg0, v3);
5154
0
    // Rule at src/isa/x64/inst.isle line 2763.
5155
0
    return v4;
5156
0
}
5157
5158
// Generated as internal constructor for term x64_psubb.
5159
0
pub fn constructor_x64_psubb<C: Context>(
5160
0
    ctx: &mut C,
5161
0
    arg0: Xmm,
5162
0
    arg1: &XmmMem,
5163
0
) -> Xmm {
5164
0
    let v5 = C::use_avx_simd(ctx);
5165
0
    if v5 == true {
5166
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5167
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubb, arg0, v7);
5168
0
        // Rule at src/isa/x64/inst.isle line 2773.
5169
0
        return v8;
5170
0
    }
5171
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5172
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubb, arg0, v3);
5173
0
    // Rule at src/isa/x64/inst.isle line 2771.
5174
0
    return v4;
5175
0
}
5176
5177
// Generated as internal constructor for term x64_psubw.
5178
0
pub fn constructor_x64_psubw<C: Context>(
5179
0
    ctx: &mut C,
5180
0
    arg0: Xmm,
5181
0
    arg1: &XmmMem,
5182
0
) -> Xmm {
5183
0
    let v5 = C::use_avx_simd(ctx);
5184
0
    if v5 == true {
5185
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5186
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubw, arg0, v7);
5187
0
        // Rule at src/isa/x64/inst.isle line 2781.
5188
0
        return v8;
5189
0
    }
5190
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5191
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubw, arg0, v3);
5192
0
    // Rule at src/isa/x64/inst.isle line 2779.
5193
0
    return v4;
5194
0
}
5195
5196
// Generated as internal constructor for term x64_psubd.
5197
0
pub fn constructor_x64_psubd<C: Context>(
5198
0
    ctx: &mut C,
5199
0
    arg0: Xmm,
5200
0
    arg1: &XmmMem,
5201
0
) -> Xmm {
5202
0
    let v5 = C::use_avx_simd(ctx);
5203
0
    if v5 == true {
5204
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5205
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubd, arg0, v7);
5206
0
        // Rule at src/isa/x64/inst.isle line 2789.
5207
0
        return v8;
5208
0
    }
5209
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5210
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubd, arg0, v3);
5211
0
    // Rule at src/isa/x64/inst.isle line 2787.
5212
0
    return v4;
5213
0
}
5214
5215
// Generated as internal constructor for term x64_psubq.
5216
0
pub fn constructor_x64_psubq<C: Context>(
5217
0
    ctx: &mut C,
5218
0
    arg0: Xmm,
5219
0
    arg1: &XmmMem,
5220
0
) -> Xmm {
5221
0
    let v5 = C::use_avx_simd(ctx);
5222
0
    if v5 == true {
5223
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5224
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubq, arg0, v7);
5225
0
        // Rule at src/isa/x64/inst.isle line 2797.
5226
0
        return v8;
5227
0
    }
5228
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5229
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubq, arg0, v3);
5230
0
    // Rule at src/isa/x64/inst.isle line 2795.
5231
0
    return v4;
5232
0
}
5233
5234
// Generated as internal constructor for term x64_psubsb.
5235
0
pub fn constructor_x64_psubsb<C: Context>(
5236
0
    ctx: &mut C,
5237
0
    arg0: Xmm,
5238
0
    arg1: &XmmMem,
5239
0
) -> Xmm {
5240
0
    let v5 = C::use_avx_simd(ctx);
5241
0
    if v5 == true {
5242
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5243
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsb, arg0, v7);
5244
0
        // Rule at src/isa/x64/inst.isle line 2805.
5245
0
        return v8;
5246
0
    }
5247
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5248
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsb, arg0, v3);
5249
0
    // Rule at src/isa/x64/inst.isle line 2803.
5250
0
    return v4;
5251
0
}
5252
5253
// Generated as internal constructor for term x64_psubsw.
5254
0
pub fn constructor_x64_psubsw<C: Context>(
5255
0
    ctx: &mut C,
5256
0
    arg0: Xmm,
5257
0
    arg1: &XmmMem,
5258
0
) -> Xmm {
5259
0
    let v5 = C::use_avx_simd(ctx);
5260
0
    if v5 == true {
5261
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5262
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsw, arg0, v7);
5263
0
        // Rule at src/isa/x64/inst.isle line 2813.
5264
0
        return v8;
5265
0
    }
5266
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5267
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsw, arg0, v3);
5268
0
    // Rule at src/isa/x64/inst.isle line 2811.
5269
0
    return v4;
5270
0
}
5271
5272
// Generated as internal constructor for term x64_psubusb.
5273
0
pub fn constructor_x64_psubusb<C: Context>(
5274
0
    ctx: &mut C,
5275
0
    arg0: Xmm,
5276
0
    arg1: &XmmMem,
5277
0
) -> Xmm {
5278
0
    let v5 = C::use_avx_simd(ctx);
5279
0
    if v5 == true {
5280
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5281
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusb, arg0, v7);
5282
0
        // Rule at src/isa/x64/inst.isle line 2821.
5283
0
        return v8;
5284
0
    }
5285
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5286
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusb, arg0, v3);
5287
0
    // Rule at src/isa/x64/inst.isle line 2819.
5288
0
    return v4;
5289
0
}
5290
5291
// Generated as internal constructor for term x64_psubusw.
5292
0
pub fn constructor_x64_psubusw<C: Context>(
5293
0
    ctx: &mut C,
5294
0
    arg0: Xmm,
5295
0
    arg1: &XmmMem,
5296
0
) -> Xmm {
5297
0
    let v5 = C::use_avx_simd(ctx);
5298
0
    if v5 == true {
5299
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5300
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusw, arg0, v7);
5301
0
        // Rule at src/isa/x64/inst.isle line 2829.
5302
0
        return v8;
5303
0
    }
5304
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5305
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusw, arg0, v3);
5306
0
    // Rule at src/isa/x64/inst.isle line 2827.
5307
0
    return v4;
5308
0
}
5309
5310
// Generated as internal constructor for term x64_pavgb.
5311
0
pub fn constructor_x64_pavgb<C: Context>(
5312
0
    ctx: &mut C,
5313
0
    arg0: Xmm,
5314
0
    arg1: &XmmMem,
5315
0
) -> Xmm {
5316
0
    let v5 = C::use_avx_simd(ctx);
5317
0
    if v5 == true {
5318
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5319
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgb, arg0, v7);
5320
0
        // Rule at src/isa/x64/inst.isle line 2837.
5321
0
        return v8;
5322
0
    }
5323
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5324
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgb, arg0, v3);
5325
0
    // Rule at src/isa/x64/inst.isle line 2835.
5326
0
    return v4;
5327
0
}
5328
5329
// Generated as internal constructor for term x64_pavgw.
5330
0
pub fn constructor_x64_pavgw<C: Context>(
5331
0
    ctx: &mut C,
5332
0
    arg0: Xmm,
5333
0
    arg1: &XmmMem,
5334
0
) -> Xmm {
5335
0
    let v5 = C::use_avx_simd(ctx);
5336
0
    if v5 == true {
5337
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5338
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgw, arg0, v7);
5339
0
        // Rule at src/isa/x64/inst.isle line 2845.
5340
0
        return v8;
5341
0
    }
5342
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5343
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgw, arg0, v3);
5344
0
    // Rule at src/isa/x64/inst.isle line 2843.
5345
0
    return v4;
5346
0
}
5347
5348
// Generated as internal constructor for term x64_pand.
5349
0
pub fn constructor_x64_pand<C: Context>(
5350
0
    ctx: &mut C,
5351
0
    arg0: Xmm,
5352
0
    arg1: &XmmMem,
5353
0
) -> Xmm {
5354
0
    let v5 = C::use_avx_simd(ctx);
5355
0
    if v5 == true {
5356
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5357
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpand, arg0, v7);
5358
0
        // Rule at src/isa/x64/inst.isle line 2853.
5359
0
        return v8;
5360
0
    }
5361
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5362
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pand, arg0, v3);
5363
0
    // Rule at src/isa/x64/inst.isle line 2851.
5364
0
    return v4;
5365
0
}
5366
5367
// Generated as internal constructor for term x64_andps.
5368
0
pub fn constructor_x64_andps<C: Context>(
5369
0
    ctx: &mut C,
5370
0
    arg0: Xmm,
5371
0
    arg1: &XmmMem,
5372
0
) -> Xmm {
5373
0
    let v5 = C::use_avx_simd(ctx);
5374
0
    if v5 == true {
5375
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5376
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandps, arg0, v7);
5377
0
        // Rule at src/isa/x64/inst.isle line 2861.
5378
0
        return v8;
5379
0
    }
5380
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5381
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andps, arg0, v3);
5382
0
    // Rule at src/isa/x64/inst.isle line 2859.
5383
0
    return v4;
5384
0
}
5385
5386
// Generated as internal constructor for term x64_andpd.
5387
0
pub fn constructor_x64_andpd<C: Context>(
5388
0
    ctx: &mut C,
5389
0
    arg0: Xmm,
5390
0
    arg1: &XmmMem,
5391
0
) -> Xmm {
5392
0
    let v5 = C::use_avx_simd(ctx);
5393
0
    if v5 == true {
5394
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5395
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandpd, arg0, v7);
5396
0
        // Rule at src/isa/x64/inst.isle line 2869.
5397
0
        return v8;
5398
0
    }
5399
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5400
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andpd, arg0, v3);
5401
0
    // Rule at src/isa/x64/inst.isle line 2867.
5402
0
    return v4;
5403
0
}
5404
5405
// Generated as internal constructor for term x64_por.
5406
0
pub fn constructor_x64_por<C: Context>(
5407
0
    ctx: &mut C,
5408
0
    arg0: Xmm,
5409
0
    arg1: &XmmMem,
5410
0
) -> Xmm {
5411
0
    let v5 = C::use_avx_simd(ctx);
5412
0
    if v5 == true {
5413
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5414
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpor, arg0, v7);
5415
0
        // Rule at src/isa/x64/inst.isle line 2877.
5416
0
        return v8;
5417
0
    }
5418
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5419
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Por, arg0, v3);
5420
0
    // Rule at src/isa/x64/inst.isle line 2875.
5421
0
    return v4;
5422
0
}
5423
5424
// Generated as internal constructor for term x64_orps.
5425
0
pub fn constructor_x64_orps<C: Context>(
5426
0
    ctx: &mut C,
5427
0
    arg0: Xmm,
5428
0
    arg1: &XmmMem,
5429
0
) -> Xmm {
5430
0
    let v5 = C::use_avx_simd(ctx);
5431
0
    if v5 == true {
5432
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5433
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorps, arg0, v7);
5434
0
        // Rule at src/isa/x64/inst.isle line 2885.
5435
0
        return v8;
5436
0
    }
5437
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5438
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orps, arg0, v3);
5439
0
    // Rule at src/isa/x64/inst.isle line 2883.
5440
0
    return v4;
5441
0
}
5442
5443
// Generated as internal constructor for term x64_orpd.
5444
0
pub fn constructor_x64_orpd<C: Context>(
5445
0
    ctx: &mut C,
5446
0
    arg0: Xmm,
5447
0
    arg1: &XmmMem,
5448
0
) -> Xmm {
5449
0
    let v5 = C::use_avx_simd(ctx);
5450
0
    if v5 == true {
5451
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5452
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorpd, arg0, v7);
5453
0
        // Rule at src/isa/x64/inst.isle line 2893.
5454
0
        return v8;
5455
0
    }
5456
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5457
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orpd, arg0, v3);
5458
0
    // Rule at src/isa/x64/inst.isle line 2891.
5459
0
    return v4;
5460
0
}
5461
5462
// Generated as internal constructor for term x64_pxor.
5463
0
pub fn constructor_x64_pxor<C: Context>(
5464
0
    ctx: &mut C,
5465
0
    arg0: Xmm,
5466
0
    arg1: &XmmMem,
5467
0
) -> Xmm {
5468
0
    let v5 = C::use_avx_simd(ctx);
5469
0
    if v5 == true {
5470
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5471
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpxor, arg0, v7);
5472
0
        // Rule at src/isa/x64/inst.isle line 2901.
5473
0
        return v8;
5474
0
    }
5475
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5476
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pxor, arg0, v3);
5477
0
    // Rule at src/isa/x64/inst.isle line 2899.
5478
0
    return v4;
5479
0
}
5480
5481
// Generated as internal constructor for term x64_xorps.
5482
0
pub fn constructor_x64_xorps<C: Context>(
5483
0
    ctx: &mut C,
5484
0
    arg0: Xmm,
5485
0
    arg1: &XmmMem,
5486
0
) -> Xmm {
5487
0
    let v5 = C::use_avx_simd(ctx);
5488
0
    if v5 == true {
5489
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5490
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorps, arg0, v7);
5491
0
        // Rule at src/isa/x64/inst.isle line 2909.
5492
0
        return v8;
5493
0
    }
5494
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5495
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorps, arg0, v3);
5496
0
    // Rule at src/isa/x64/inst.isle line 2907.
5497
0
    return v4;
5498
0
}
5499
5500
// Generated as internal constructor for term x64_xorpd.
5501
0
pub fn constructor_x64_xorpd<C: Context>(
5502
0
    ctx: &mut C,
5503
0
    arg0: Xmm,
5504
0
    arg1: &XmmMem,
5505
0
) -> Xmm {
5506
0
    let v5 = C::use_avx_simd(ctx);
5507
0
    if v5 == true {
5508
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5509
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorpd, arg0, v7);
5510
0
        // Rule at src/isa/x64/inst.isle line 2917.
5511
0
        return v8;
5512
0
    }
5513
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5514
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorpd, arg0, v3);
5515
0
    // Rule at src/isa/x64/inst.isle line 2915.
5516
0
    return v4;
5517
0
}
5518
5519
// Generated as internal constructor for term x64_pmullw.
5520
0
pub fn constructor_x64_pmullw<C: Context>(
5521
0
    ctx: &mut C,
5522
0
    arg0: Xmm,
5523
0
    arg1: &XmmMem,
5524
0
) -> Xmm {
5525
0
    let v5 = C::use_avx_simd(ctx);
5526
0
    if v5 == true {
5527
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5528
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmullw, arg0, v7);
5529
0
        // Rule at src/isa/x64/inst.isle line 2925.
5530
0
        return v8;
5531
0
    }
5532
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5533
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmullw, arg0, v3);
5534
0
    // Rule at src/isa/x64/inst.isle line 2923.
5535
0
    return v4;
5536
0
}
5537
5538
// Generated as internal constructor for term x64_pmulld.
5539
0
pub fn constructor_x64_pmulld<C: Context>(
5540
0
    ctx: &mut C,
5541
0
    arg0: Xmm,
5542
0
    arg1: &XmmMem,
5543
0
) -> Xmm {
5544
0
    let v5 = C::use_avx_simd(ctx);
5545
0
    if v5 == true {
5546
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5547
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulld, arg0, v7);
5548
0
        // Rule at src/isa/x64/inst.isle line 2933.
5549
0
        return v8;
5550
0
    }
5551
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5552
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulld, arg0, v3);
5553
0
    // Rule at src/isa/x64/inst.isle line 2931.
5554
0
    return v4;
5555
0
}
5556
5557
// Generated as internal constructor for term x64_pmulhw.
5558
0
pub fn constructor_x64_pmulhw<C: Context>(
5559
0
    ctx: &mut C,
5560
0
    arg0: Xmm,
5561
0
    arg1: &XmmMem,
5562
0
) -> Xmm {
5563
0
    let v5 = C::use_avx_simd(ctx);
5564
0
    if v5 == true {
5565
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5566
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhw, arg0, v7);
5567
0
        // Rule at src/isa/x64/inst.isle line 2941.
5568
0
        return v8;
5569
0
    }
5570
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5571
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhw, arg0, v3);
5572
0
    // Rule at src/isa/x64/inst.isle line 2939.
5573
0
    return v4;
5574
0
}
5575
5576
// Generated as internal constructor for term x64_pmulhrsw.
5577
0
pub fn constructor_x64_pmulhrsw<C: Context>(
5578
0
    ctx: &mut C,
5579
0
    arg0: Xmm,
5580
0
    arg1: &XmmMem,
5581
0
) -> Xmm {
5582
0
    let v5 = C::use_avx_simd(ctx);
5583
0
    if v5 == true {
5584
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5585
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhrsw, arg0, v7);
5586
0
        // Rule at src/isa/x64/inst.isle line 2949.
5587
0
        return v8;
5588
0
    }
5589
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5590
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhrsw, arg0, v3);
5591
0
    // Rule at src/isa/x64/inst.isle line 2947.
5592
0
    return v4;
5593
0
}
5594
5595
// Generated as internal constructor for term x64_pmulhuw.
5596
0
pub fn constructor_x64_pmulhuw<C: Context>(
5597
0
    ctx: &mut C,
5598
0
    arg0: Xmm,
5599
0
    arg1: &XmmMem,
5600
0
) -> Xmm {
5601
0
    let v5 = C::use_avx_simd(ctx);
5602
0
    if v5 == true {
5603
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5604
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhuw, arg0, v7);
5605
0
        // Rule at src/isa/x64/inst.isle line 2957.
5606
0
        return v8;
5607
0
    }
5608
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5609
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhuw, arg0, v3);
5610
0
    // Rule at src/isa/x64/inst.isle line 2955.
5611
0
    return v4;
5612
0
}
5613
5614
// Generated as internal constructor for term x64_pmuldq.
5615
0
pub fn constructor_x64_pmuldq<C: Context>(
5616
0
    ctx: &mut C,
5617
0
    arg0: Xmm,
5618
0
    arg1: &XmmMem,
5619
0
) -> Xmm {
5620
0
    let v5 = C::use_avx_simd(ctx);
5621
0
    if v5 == true {
5622
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5623
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuldq, arg0, v7);
5624
0
        // Rule at src/isa/x64/inst.isle line 2965.
5625
0
        return v8;
5626
0
    }
5627
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5628
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuldq, arg0, v3);
5629
0
    // Rule at src/isa/x64/inst.isle line 2963.
5630
0
    return v4;
5631
0
}
5632
5633
// Generated as internal constructor for term x64_pmuludq.
5634
0
pub fn constructor_x64_pmuludq<C: Context>(
5635
0
    ctx: &mut C,
5636
0
    arg0: Xmm,
5637
0
    arg1: &XmmMem,
5638
0
) -> Xmm {
5639
0
    let v5 = C::use_avx_simd(ctx);
5640
0
    if v5 == true {
5641
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5642
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuludq, arg0, v7);
5643
0
        // Rule at src/isa/x64/inst.isle line 2973.
5644
0
        return v8;
5645
0
    }
5646
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5647
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuludq, arg0, v3);
5648
0
    // Rule at src/isa/x64/inst.isle line 2971.
5649
0
    return v4;
5650
0
}
5651
5652
// Generated as internal constructor for term x64_punpckhwd.
5653
0
pub fn constructor_x64_punpckhwd<C: Context>(
5654
0
    ctx: &mut C,
5655
0
    arg0: Xmm,
5656
0
    arg1: &XmmMem,
5657
0
) -> Xmm {
5658
0
    let v5 = C::use_avx_simd(ctx);
5659
0
    if v5 == true {
5660
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5661
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhwd, arg0, v7);
5662
0
        // Rule at src/isa/x64/inst.isle line 2981.
5663
0
        return v8;
5664
0
    }
5665
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5666
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhwd, arg0, v3);
5667
0
    // Rule at src/isa/x64/inst.isle line 2979.
5668
0
    return v4;
5669
0
}
5670
5671
// Generated as internal constructor for term x64_punpcklwd.
5672
0
pub fn constructor_x64_punpcklwd<C: Context>(
5673
0
    ctx: &mut C,
5674
0
    arg0: Xmm,
5675
0
    arg1: &XmmMem,
5676
0
) -> Xmm {
5677
0
    let v5 = C::use_avx_simd(ctx);
5678
0
    if v5 == true {
5679
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5680
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklwd, arg0, v7);
5681
0
        // Rule at src/isa/x64/inst.isle line 2989.
5682
0
        return v8;
5683
0
    }
5684
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5685
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklwd, arg0, v3);
5686
0
    // Rule at src/isa/x64/inst.isle line 2987.
5687
0
    return v4;
5688
0
}
5689
5690
// Generated as internal constructor for term x64_punpckldq.
5691
0
pub fn constructor_x64_punpckldq<C: Context>(
5692
0
    ctx: &mut C,
5693
0
    arg0: Xmm,
5694
0
    arg1: &XmmMem,
5695
0
) -> Xmm {
5696
0
    let v5 = C::use_avx_simd(ctx);
5697
0
    if v5 == true {
5698
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5699
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckldq, arg0, v7);
5700
0
        // Rule at src/isa/x64/inst.isle line 2997.
5701
0
        return v8;
5702
0
    }
5703
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5704
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckldq, arg0, v3);
5705
0
    // Rule at src/isa/x64/inst.isle line 2995.
5706
0
    return v4;
5707
0
}
5708
5709
// Generated as internal constructor for term x64_punpckhdq.
5710
0
pub fn constructor_x64_punpckhdq<C: Context>(
5711
0
    ctx: &mut C,
5712
0
    arg0: Xmm,
5713
0
    arg1: &XmmMem,
5714
0
) -> Xmm {
5715
0
    let v5 = C::use_avx_simd(ctx);
5716
0
    if v5 == true {
5717
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5718
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhdq, arg0, v7);
5719
0
        // Rule at src/isa/x64/inst.isle line 3005.
5720
0
        return v8;
5721
0
    }
5722
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5723
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhdq, arg0, v3);
5724
0
    // Rule at src/isa/x64/inst.isle line 3003.
5725
0
    return v4;
5726
0
}
5727
5728
// Generated as internal constructor for term x64_punpcklqdq.
5729
0
pub fn constructor_x64_punpcklqdq<C: Context>(
5730
0
    ctx: &mut C,
5731
0
    arg0: Xmm,
5732
0
    arg1: &XmmMem,
5733
0
) -> Xmm {
5734
0
    let v5 = C::use_avx_simd(ctx);
5735
0
    if v5 == true {
5736
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5737
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklqdq, arg0, v7);
5738
0
        // Rule at src/isa/x64/inst.isle line 3013.
5739
0
        return v8;
5740
0
    }
5741
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5742
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklqdq, arg0, v3);
5743
0
    // Rule at src/isa/x64/inst.isle line 3011.
5744
0
    return v4;
5745
0
}
5746
5747
// Generated as internal constructor for term x64_punpckhqdq.
5748
0
pub fn constructor_x64_punpckhqdq<C: Context>(
5749
0
    ctx: &mut C,
5750
0
    arg0: Xmm,
5751
0
    arg1: &XmmMem,
5752
0
) -> Xmm {
5753
0
    let v5 = C::use_avx_simd(ctx);
5754
0
    if v5 == true {
5755
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5756
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhqdq, arg0, v7);
5757
0
        // Rule at src/isa/x64/inst.isle line 3021.
5758
0
        return v8;
5759
0
    }
5760
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5761
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhqdq, arg0, v3);
5762
0
    // Rule at src/isa/x64/inst.isle line 3019.
5763
0
    return v4;
5764
0
}
5765
5766
// Generated as internal constructor for term x64_unpcklps.
5767
0
pub fn constructor_x64_unpcklps<C: Context>(
5768
0
    ctx: &mut C,
5769
0
    arg0: Xmm,
5770
0
    arg1: &XmmMem,
5771
0
) -> Xmm {
5772
0
    let v5 = C::use_avx_simd(ctx);
5773
0
    if v5 == true {
5774
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5775
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpcklps, arg0, v7);
5776
0
        // Rule at src/isa/x64/inst.isle line 3029.
5777
0
        return v8;
5778
0
    }
5779
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5780
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpcklps, arg0, v3);
5781
0
    // Rule at src/isa/x64/inst.isle line 3027.
5782
0
    return v4;
5783
0
}
5784
5785
// Generated as internal constructor for term x64_unpckhps.
5786
0
pub fn constructor_x64_unpckhps<C: Context>(
5787
0
    ctx: &mut C,
5788
0
    arg0: Xmm,
5789
0
    arg1: &XmmMem,
5790
0
) -> Xmm {
5791
0
    let v5 = C::use_avx_simd(ctx);
5792
0
    if v5 == true {
5793
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5794
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpckhps, arg0, v7);
5795
0
        // Rule at src/isa/x64/inst.isle line 3037.
5796
0
        return v8;
5797
0
    }
5798
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5799
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpckhps, arg0, v3);
5800
0
    // Rule at src/isa/x64/inst.isle line 3035.
5801
0
    return v4;
5802
0
}
5803
5804
// Generated as internal constructor for term x64_andnps.
5805
0
pub fn constructor_x64_andnps<C: Context>(
5806
0
    ctx: &mut C,
5807
0
    arg0: Xmm,
5808
0
    arg1: &XmmMem,
5809
0
) -> Xmm {
5810
0
    let v5 = C::use_avx_simd(ctx);
5811
0
    if v5 == true {
5812
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5813
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnps, arg0, v7);
5814
0
        // Rule at src/isa/x64/inst.isle line 3045.
5815
0
        return v8;
5816
0
    }
5817
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5818
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnps, arg0, v3);
5819
0
    // Rule at src/isa/x64/inst.isle line 3043.
5820
0
    return v4;
5821
0
}
5822
5823
// Generated as internal constructor for term x64_andnpd.
5824
0
pub fn constructor_x64_andnpd<C: Context>(
5825
0
    ctx: &mut C,
5826
0
    arg0: Xmm,
5827
0
    arg1: &XmmMem,
5828
0
) -> Xmm {
5829
0
    let v5 = C::use_avx_simd(ctx);
5830
0
    if v5 == true {
5831
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5832
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnpd, arg0, v7);
5833
0
        // Rule at src/isa/x64/inst.isle line 3053.
5834
0
        return v8;
5835
0
    }
5836
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5837
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnpd, arg0, v3);
5838
0
    // Rule at src/isa/x64/inst.isle line 3051.
5839
0
    return v4;
5840
0
}
5841
5842
// Generated as internal constructor for term x64_pandn.
5843
0
pub fn constructor_x64_pandn<C: Context>(
5844
0
    ctx: &mut C,
5845
0
    arg0: Xmm,
5846
0
    arg1: &XmmMem,
5847
0
) -> Xmm {
5848
0
    let v5 = C::use_avx_simd(ctx);
5849
0
    if v5 == true {
5850
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5851
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpandn, arg0, v7);
5852
0
        // Rule at src/isa/x64/inst.isle line 3061.
5853
0
        return v8;
5854
0
    }
5855
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5856
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pandn, arg0, v3);
5857
0
    // Rule at src/isa/x64/inst.isle line 3059.
5858
0
    return v4;
5859
0
}
5860
5861
// Generated as internal constructor for term x64_addss.
5862
0
pub fn constructor_x64_addss<C: Context>(
5863
0
    ctx: &mut C,
5864
0
    arg0: Xmm,
5865
0
    arg1: &XmmMem,
5866
0
) -> Xmm {
5867
0
    let v4 = C::use_avx_simd(ctx);
5868
0
    if v4 == true {
5869
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5870
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddss, arg0, v6);
5871
0
        // Rule at src/isa/x64/inst.isle line 3069.
5872
0
        return v7;
5873
0
    }
5874
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addss, arg0, arg1);
5875
0
    // Rule at src/isa/x64/inst.isle line 3067.
5876
0
    return v3;
5877
0
}
5878
5879
// Generated as internal constructor for term x64_addsd.
5880
0
pub fn constructor_x64_addsd<C: Context>(
5881
0
    ctx: &mut C,
5882
0
    arg0: Xmm,
5883
0
    arg1: &XmmMem,
5884
0
) -> Xmm {
5885
0
    let v4 = C::use_avx_simd(ctx);
5886
0
    if v4 == true {
5887
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5888
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddsd, arg0, v6);
5889
0
        // Rule at src/isa/x64/inst.isle line 3077.
5890
0
        return v7;
5891
0
    }
5892
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addsd, arg0, arg1);
5893
0
    // Rule at src/isa/x64/inst.isle line 3075.
5894
0
    return v3;
5895
0
}
5896
5897
// Generated as internal constructor for term x64_addps.
5898
0
pub fn constructor_x64_addps<C: Context>(
5899
0
    ctx: &mut C,
5900
0
    arg0: Xmm,
5901
0
    arg1: &XmmMem,
5902
0
) -> Xmm {
5903
0
    let v5 = C::use_avx_simd(ctx);
5904
0
    if v5 == true {
5905
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5906
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddps, arg0, v7);
5907
0
        // Rule at src/isa/x64/inst.isle line 3085.
5908
0
        return v8;
5909
0
    }
5910
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5911
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addps, arg0, v3);
5912
0
    // Rule at src/isa/x64/inst.isle line 3083.
5913
0
    return v4;
5914
0
}
5915
5916
// Generated as internal constructor for term x64_addpd.
5917
0
pub fn constructor_x64_addpd<C: Context>(
5918
0
    ctx: &mut C,
5919
0
    arg0: Xmm,
5920
0
    arg1: &XmmMem,
5921
0
) -> Xmm {
5922
0
    let v5 = C::use_avx_simd(ctx);
5923
0
    if v5 == true {
5924
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5925
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddpd, arg0, v7);
5926
0
        // Rule at src/isa/x64/inst.isle line 3093.
5927
0
        return v8;
5928
0
    }
5929
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5930
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addpd, arg0, v3);
5931
0
    // Rule at src/isa/x64/inst.isle line 3091.
5932
0
    return v4;
5933
0
}
5934
5935
// Generated as internal constructor for term x64_subss.
5936
0
pub fn constructor_x64_subss<C: Context>(
5937
0
    ctx: &mut C,
5938
0
    arg0: Xmm,
5939
0
    arg1: &XmmMem,
5940
0
) -> Xmm {
5941
0
    let v4 = C::use_avx_simd(ctx);
5942
0
    if v4 == true {
5943
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5944
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubss, arg0, v6);
5945
0
        // Rule at src/isa/x64/inst.isle line 3101.
5946
0
        return v7;
5947
0
    }
5948
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subss, arg0, arg1);
5949
0
    // Rule at src/isa/x64/inst.isle line 3099.
5950
0
    return v3;
5951
0
}
5952
5953
// Generated as internal constructor for term x64_subsd.
5954
0
pub fn constructor_x64_subsd<C: Context>(
5955
0
    ctx: &mut C,
5956
0
    arg0: Xmm,
5957
0
    arg1: &XmmMem,
5958
0
) -> Xmm {
5959
0
    let v4 = C::use_avx_simd(ctx);
5960
0
    if v4 == true {
5961
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5962
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubsd, arg0, v6);
5963
0
        // Rule at src/isa/x64/inst.isle line 3109.
5964
0
        return v7;
5965
0
    }
5966
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subsd, arg0, arg1);
5967
0
    // Rule at src/isa/x64/inst.isle line 3107.
5968
0
    return v3;
5969
0
}
5970
5971
// Generated as internal constructor for term x64_subps.
5972
0
pub fn constructor_x64_subps<C: Context>(
5973
0
    ctx: &mut C,
5974
0
    arg0: Xmm,
5975
0
    arg1: &XmmMem,
5976
0
) -> Xmm {
5977
0
    let v5 = C::use_avx_simd(ctx);
5978
0
    if v5 == true {
5979
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5980
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubps, arg0, v7);
5981
0
        // Rule at src/isa/x64/inst.isle line 3117.
5982
0
        return v8;
5983
0
    }
5984
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5985
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subps, arg0, v3);
5986
0
    // Rule at src/isa/x64/inst.isle line 3115.
5987
0
    return v4;
5988
0
}
5989
5990
// Generated as internal constructor for term x64_subpd.
5991
0
pub fn constructor_x64_subpd<C: Context>(
5992
0
    ctx: &mut C,
5993
0
    arg0: Xmm,
5994
0
    arg1: &XmmMem,
5995
0
) -> Xmm {
5996
0
    let v5 = C::use_avx_simd(ctx);
5997
0
    if v5 == true {
5998
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5999
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubpd, arg0, v7);
6000
0
        // Rule at src/isa/x64/inst.isle line 3125.
6001
0
        return v8;
6002
0
    }
6003
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6004
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subpd, arg0, v3);
6005
0
    // Rule at src/isa/x64/inst.isle line 3123.
6006
0
    return v4;
6007
0
}
6008
6009
// Generated as internal constructor for term x64_mulss.
6010
0
pub fn constructor_x64_mulss<C: Context>(
6011
0
    ctx: &mut C,
6012
0
    arg0: Xmm,
6013
0
    arg1: &XmmMem,
6014
0
) -> Xmm {
6015
0
    let v4 = C::use_avx_simd(ctx);
6016
0
    if v4 == true {
6017
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6018
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulss, arg0, v6);
6019
0
        // Rule at src/isa/x64/inst.isle line 3133.
6020
0
        return v7;
6021
0
    }
6022
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulss, arg0, arg1);
6023
0
    // Rule at src/isa/x64/inst.isle line 3131.
6024
0
    return v3;
6025
0
}
6026
6027
// Generated as internal constructor for term x64_mulsd.
6028
0
pub fn constructor_x64_mulsd<C: Context>(
6029
0
    ctx: &mut C,
6030
0
    arg0: Xmm,
6031
0
    arg1: &XmmMem,
6032
0
) -> Xmm {
6033
0
    let v4 = C::use_avx_simd(ctx);
6034
0
    if v4 == true {
6035
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6036
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulsd, arg0, v6);
6037
0
        // Rule at src/isa/x64/inst.isle line 3141.
6038
0
        return v7;
6039
0
    }
6040
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulsd, arg0, arg1);
6041
0
    // Rule at src/isa/x64/inst.isle line 3139.
6042
0
    return v3;
6043
0
}
6044
6045
// Generated as internal constructor for term x64_mulps.
6046
0
pub fn constructor_x64_mulps<C: Context>(
6047
0
    ctx: &mut C,
6048
0
    arg0: Xmm,
6049
0
    arg1: &XmmMem,
6050
0
) -> Xmm {
6051
0
    let v5 = C::use_avx_simd(ctx);
6052
0
    if v5 == true {
6053
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6054
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulps, arg0, v7);
6055
0
        // Rule at src/isa/x64/inst.isle line 3149.
6056
0
        return v8;
6057
0
    }
6058
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6059
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulps, arg0, v3);
6060
0
    // Rule at src/isa/x64/inst.isle line 3147.
6061
0
    return v4;
6062
0
}
6063
6064
// Generated as internal constructor for term x64_mulpd.
6065
0
pub fn constructor_x64_mulpd<C: Context>(
6066
0
    ctx: &mut C,
6067
0
    arg0: Xmm,
6068
0
    arg1: &XmmMem,
6069
0
) -> Xmm {
6070
0
    let v5 = C::use_avx_simd(ctx);
6071
0
    if v5 == true {
6072
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6073
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulpd, arg0, v7);
6074
0
        // Rule at src/isa/x64/inst.isle line 3157.
6075
0
        return v8;
6076
0
    }
6077
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6078
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulpd, arg0, v3);
6079
0
    // Rule at src/isa/x64/inst.isle line 3155.
6080
0
    return v4;
6081
0
}
6082
6083
// Generated as internal constructor for term x64_divss.
6084
0
pub fn constructor_x64_divss<C: Context>(
6085
0
    ctx: &mut C,
6086
0
    arg0: Xmm,
6087
0
    arg1: &XmmMem,
6088
0
) -> Xmm {
6089
0
    let v4 = C::use_avx_simd(ctx);
6090
0
    if v4 == true {
6091
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6092
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivss, arg0, v6);
6093
0
        // Rule at src/isa/x64/inst.isle line 3165.
6094
0
        return v7;
6095
0
    }
6096
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divss, arg0, arg1);
6097
0
    // Rule at src/isa/x64/inst.isle line 3163.
6098
0
    return v3;
6099
0
}
6100
6101
// Generated as internal constructor for term x64_divsd.
6102
0
pub fn constructor_x64_divsd<C: Context>(
6103
0
    ctx: &mut C,
6104
0
    arg0: Xmm,
6105
0
    arg1: &XmmMem,
6106
0
) -> Xmm {
6107
0
    let v4 = C::use_avx_simd(ctx);
6108
0
    if v4 == true {
6109
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6110
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivsd, arg0, v6);
6111
0
        // Rule at src/isa/x64/inst.isle line 3173.
6112
0
        return v7;
6113
0
    }
6114
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divsd, arg0, arg1);
6115
0
    // Rule at src/isa/x64/inst.isle line 3171.
6116
0
    return v3;
6117
0
}
6118
6119
// Generated as internal constructor for term x64_divps.
6120
0
pub fn constructor_x64_divps<C: Context>(
6121
0
    ctx: &mut C,
6122
0
    arg0: Xmm,
6123
0
    arg1: &XmmMem,
6124
0
) -> Xmm {
6125
0
    let v5 = C::use_avx_simd(ctx);
6126
0
    if v5 == true {
6127
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6128
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivps, arg0, v7);
6129
0
        // Rule at src/isa/x64/inst.isle line 3181.
6130
0
        return v8;
6131
0
    }
6132
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6133
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divps, arg0, v3);
6134
0
    // Rule at src/isa/x64/inst.isle line 3179.
6135
0
    return v4;
6136
0
}
6137
6138
// Generated as internal constructor for term x64_divpd.
6139
0
pub fn constructor_x64_divpd<C: Context>(
6140
0
    ctx: &mut C,
6141
0
    arg0: Xmm,
6142
0
    arg1: &XmmMem,
6143
0
) -> Xmm {
6144
0
    let v5 = C::use_avx_simd(ctx);
6145
0
    if v5 == true {
6146
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6147
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivpd, arg0, v7);
6148
0
        // Rule at src/isa/x64/inst.isle line 3189.
6149
0
        return v8;
6150
0
    }
6151
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6152
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divpd, arg0, v3);
6153
0
    // Rule at src/isa/x64/inst.isle line 3187.
6154
0
    return v4;
6155
0
}
6156
6157
// Generated as internal constructor for term xmm_rm_r_blend.
6158
0
pub fn constructor_xmm_rm_r_blend<C: Context>(
6159
0
    ctx: &mut C,
6160
0
    arg0: &SseOpcode,
6161
0
    arg1: Xmm,
6162
0
    arg2: &XmmMemAligned,
6163
0
    arg3: Xmm,
6164
0
) -> Xmm {
6165
0
    let v4 = C::temp_writable_xmm(ctx);
6166
0
    let v5 = MInst::XmmRmRBlend {
6167
0
        op: arg0.clone(),
6168
0
        src1: arg1,
6169
0
        src2: arg2.clone(),
6170
0
        mask: arg3,
6171
0
        dst: v4,
6172
0
    };
6173
0
    let v6 = C::emit(ctx, &v5);
6174
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
6175
0
    // Rule at src/isa/x64/inst.isle line 3195.
6176
0
    return v7;
6177
0
}
6178
6179
// Generated as internal constructor for term xmm_rmr_blend_vex.
6180
0
pub fn constructor_xmm_rmr_blend_vex<C: Context>(
6181
0
    ctx: &mut C,
6182
0
    arg0: &AvxOpcode,
6183
0
    arg1: Xmm,
6184
0
    arg2: &XmmMem,
6185
0
    arg3: Xmm,
6186
0
) -> Xmm {
6187
0
    let v4 = C::temp_writable_xmm(ctx);
6188
0
    let v5 = MInst::XmmRmRBlendVex {
6189
0
        op: arg0.clone(),
6190
0
        src1: arg1,
6191
0
        src2: arg2.clone(),
6192
0
        mask: arg3,
6193
0
        dst: v4,
6194
0
    };
6195
0
    let v6 = C::emit(ctx, &v5);
6196
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
6197
0
    // Rule at src/isa/x64/inst.isle line 3202.
6198
0
    return v7;
6199
0
}
6200
6201
// Generated as internal constructor for term xmm_unary_rm_r_vex.
6202
0
pub fn constructor_xmm_unary_rm_r_vex<C: Context>(
6203
0
    ctx: &mut C,
6204
0
    arg0: &AvxOpcode,
6205
0
    arg1: &XmmMem,
6206
0
) -> Xmm {
6207
0
    let v2 = C::temp_writable_xmm(ctx);
6208
0
    let v3 = MInst::XmmUnaryRmRVex {
6209
0
        op: arg0.clone(),
6210
0
        src: arg1.clone(),
6211
0
        dst: v2,
6212
0
    };
6213
0
    let v4 = C::emit(ctx, &v3);
6214
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
6215
0
    // Rule at src/isa/x64/inst.isle line 3209.
6216
0
    return v5;
6217
0
}
6218
6219
// Generated as internal constructor for term xmm_unary_rm_r_imm_vex.
6220
0
pub fn constructor_xmm_unary_rm_r_imm_vex<C: Context>(
6221
0
    ctx: &mut C,
6222
0
    arg0: &AvxOpcode,
6223
0
    arg1: &XmmMem,
6224
0
    arg2: u8,
6225
0
) -> Xmm {
6226
0
    let v3 = C::temp_writable_xmm(ctx);
6227
0
    let v4 = MInst::XmmUnaryRmRImmVex {
6228
0
        op: arg0.clone(),
6229
0
        src: arg1.clone(),
6230
0
        dst: v3,
6231
0
        imm: arg2,
6232
0
    };
6233
0
    let v5 = C::emit(ctx, &v4);
6234
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
6235
0
    // Rule at src/isa/x64/inst.isle line 3216.
6236
0
    return v6;
6237
0
}
6238
6239
// Generated as internal constructor for term x64_blend.
6240
0
pub fn constructor_x64_blend<C: Context>(
6241
0
    ctx: &mut C,
6242
0
    arg0: Type,
6243
0
    arg1: Xmm,
6244
0
    arg2: &XmmMem,
6245
0
    arg3: Xmm,
6246
0
) -> Xmm {
6247
0
    match arg0 {
6248
        F32X4 => {
6249
0
            let v4 = constructor_x64_blendvps(ctx, arg3, arg2, arg1);
6250
0
            // Rule at src/isa/x64/inst.isle line 3223.
6251
0
            return v4;
6252
        }
6253
        F64X2 => {
6254
0
            let v5 = constructor_x64_blendvpd(ctx, arg3, arg2, arg1);
6255
0
            // Rule at src/isa/x64/inst.isle line 3224.
6256
0
            return v5;
6257
        }
6258
0
        _ => {}
6259
0
    }
6260
0
    let v6 = C::multi_lane(ctx, arg0);
6261
0
    if let Some(v7) = v6 {
6262
0
        let v10 = constructor_x64_pblendvb(ctx, arg3, arg2, arg1);
6263
0
        // Rule at src/isa/x64/inst.isle line 3225.
6264
0
        return v10;
6265
0
    }
6266
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_blend", "src/isa/x64/inst.isle line 3222")
6267
0
}
6268
6269
// Generated as internal constructor for term x64_blendvpd.
6270
0
pub fn constructor_x64_blendvpd<C: Context>(
6271
0
    ctx: &mut C,
6272
0
    arg0: Xmm,
6273
0
    arg1: &XmmMem,
6274
0
    arg2: Xmm,
6275
0
) -> Xmm {
6276
0
    let v6 = C::use_avx_simd(ctx);
6277
0
    if v6 == true {
6278
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvpd, arg0, arg1, arg2);
6279
0
        // Rule at src/isa/x64/inst.isle line 3231.
6280
0
        return v8;
6281
0
    }
6282
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6283
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvpd, arg0, v4, arg2);
6284
0
    // Rule at src/isa/x64/inst.isle line 3229.
6285
0
    return v5;
6286
0
}
6287
6288
// Generated as internal constructor for term x64_blendvps.
6289
0
pub fn constructor_x64_blendvps<C: Context>(
6290
0
    ctx: &mut C,
6291
0
    arg0: Xmm,
6292
0
    arg1: &XmmMem,
6293
0
    arg2: Xmm,
6294
0
) -> Xmm {
6295
0
    let v6 = C::use_avx_simd(ctx);
6296
0
    if v6 == true {
6297
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvps, arg0, arg1, arg2);
6298
0
        // Rule at src/isa/x64/inst.isle line 3239.
6299
0
        return v8;
6300
0
    }
6301
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6302
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvps, arg0, v4, arg2);
6303
0
    // Rule at src/isa/x64/inst.isle line 3237.
6304
0
    return v5;
6305
0
}
6306
6307
// Generated as internal constructor for term x64_pblendvb.
6308
0
pub fn constructor_x64_pblendvb<C: Context>(
6309
0
    ctx: &mut C,
6310
0
    arg0: Xmm,
6311
0
    arg1: &XmmMem,
6312
0
    arg2: Xmm,
6313
0
) -> Xmm {
6314
0
    let v6 = C::use_avx_simd(ctx);
6315
0
    if v6 == true {
6316
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vpblendvb, arg0, arg1, arg2);
6317
0
        // Rule at src/isa/x64/inst.isle line 3247.
6318
0
        return v8;
6319
0
    }
6320
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6321
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Pblendvb, arg0, v4, arg2);
6322
0
    // Rule at src/isa/x64/inst.isle line 3245.
6323
0
    return v5;
6324
0
}
6325
6326
// Generated as internal constructor for term x64_pblendw.
6327
0
pub fn constructor_x64_pblendw<C: Context>(
6328
0
    ctx: &mut C,
6329
0
    arg0: Xmm,
6330
0
    arg1: &XmmMem,
6331
0
    arg2: u8,
6332
0
) -> Xmm {
6333
0
    let v8 = C::use_avx_simd(ctx);
6334
0
    if v8 == true {
6335
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpblendw, arg0, arg1, arg2);
6336
0
        // Rule at src/isa/x64/inst.isle line 3255.
6337
0
        return v10;
6338
0
    }
6339
0
    let v4 = C::xmm_to_reg(ctx, arg0);
6340
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
6341
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pblendw, v4, v5, arg2, &OperandSize::Size32);
6342
0
    // Rule at src/isa/x64/inst.isle line 3253.
6343
0
    return v7;
6344
0
}
6345
6346
// Generated as internal constructor for term x64_movsd_regmove.
6347
0
pub fn constructor_x64_movsd_regmove<C: Context>(
6348
0
    ctx: &mut C,
6349
0
    arg0: Xmm,
6350
0
    arg1: Xmm,
6351
0
) -> Xmm {
6352
0
    let v5 = C::use_avx_simd(ctx);
6353
0
    if v5 == true {
6354
0
        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
6355
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovsd, arg0, v7);
6356
0
        // Rule at src/isa/x64/inst.isle line 3270.
6357
0
        return v8;
6358
0
    }
6359
0
    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
6360
0
    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movsd, arg0, v3);
6361
0
    // Rule at src/isa/x64/inst.isle line 3268.
6362
0
    return v4;
6363
0
}
6364
6365
// Generated as internal constructor for term x64_movss_regmove.
6366
0
pub fn constructor_x64_movss_regmove<C: Context>(
6367
0
    ctx: &mut C,
6368
0
    arg0: Xmm,
6369
0
    arg1: Xmm,
6370
0
) -> Xmm {
6371
0
    let v5 = C::use_avx_simd(ctx);
6372
0
    if v5 == true {
6373
0
        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
6374
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovss, arg0, v7);
6375
0
        // Rule at src/isa/x64/inst.isle line 3277.
6376
0
        return v8;
6377
0
    }
6378
0
    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
6379
0
    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movss, arg0, v3);
6380
0
    // Rule at src/isa/x64/inst.isle line 3275.
6381
0
    return v4;
6382
0
}
6383
6384
// Generated as internal constructor for term x64_movlhps.
6385
0
pub fn constructor_x64_movlhps<C: Context>(
6386
0
    ctx: &mut C,
6387
0
    arg0: Xmm,
6388
0
    arg1: &XmmMem,
6389
0
) -> Xmm {
6390
0
    let v5 = C::use_avx_simd(ctx);
6391
0
    if v5 == true {
6392
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6393
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovlhps, arg0, v7);
6394
0
        // Rule at src/isa/x64/inst.isle line 3285.
6395
0
        return v8;
6396
0
    }
6397
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6398
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Movlhps, arg0, v3);
6399
0
    // Rule at src/isa/x64/inst.isle line 3283.
6400
0
    return v4;
6401
0
}
6402
6403
// Generated as internal constructor for term x64_pmaxs.
6404
0
pub fn constructor_x64_pmaxs<C: Context>(
6405
0
    ctx: &mut C,
6406
0
    arg0: Type,
6407
0
    arg1: Xmm,
6408
0
    arg2: &XmmMem,
6409
0
) -> Xmm {
6410
0
    match arg0 {
6411
        I8X16 => {
6412
0
            let v3 = constructor_x64_pmaxsb(ctx, arg1, arg2);
6413
0
            // Rule at src/isa/x64/inst.isle line 3291.
6414
0
            return v3;
6415
        }
6416
        I16X8 => {
6417
0
            let v4 = constructor_x64_pmaxsw(ctx, arg1, arg2);
6418
0
            // Rule at src/isa/x64/inst.isle line 3292.
6419
0
            return v4;
6420
        }
6421
        I32X4 => {
6422
0
            let v5 = constructor_x64_pmaxsd(ctx, arg1, arg2);
6423
0
            // Rule at src/isa/x64/inst.isle line 3293.
6424
0
            return v5;
6425
        }
6426
0
        _ => {}
6427
0
    }
6428
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmaxs", "src/isa/x64/inst.isle line 3290")
6429
0
}
6430
6431
// Generated as internal constructor for term x64_pmaxsb.
6432
0
pub fn constructor_x64_pmaxsb<C: Context>(
6433
0
    ctx: &mut C,
6434
0
    arg0: Xmm,
6435
0
    arg1: &XmmMem,
6436
0
) -> Xmm {
6437
0
    let v5 = C::use_avx_simd(ctx);
6438
0
    if v5 == true {
6439
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6440
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsb, arg0, v7);
6441
0
        // Rule at src/isa/x64/inst.isle line 3297.
6442
0
        return v8;
6443
0
    }
6444
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6445
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsb, arg0, v3);
6446
0
    // Rule at src/isa/x64/inst.isle line 3296.
6447
0
    return v4;
6448
0
}
6449
6450
// Generated as internal constructor for term x64_pmaxsw.
6451
0
pub fn constructor_x64_pmaxsw<C: Context>(
6452
0
    ctx: &mut C,
6453
0
    arg0: Xmm,
6454
0
    arg1: &XmmMem,
6455
0
) -> Xmm {
6456
0
    let v5 = C::use_avx_simd(ctx);
6457
0
    if v5 == true {
6458
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6459
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsw, arg0, v7);
6460
0
        // Rule at src/isa/x64/inst.isle line 3302.
6461
0
        return v8;
6462
0
    }
6463
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6464
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsw, arg0, v3);
6465
0
    // Rule at src/isa/x64/inst.isle line 3301.
6466
0
    return v4;
6467
0
}
6468
6469
// Generated as internal constructor for term x64_pmaxsd.
6470
0
pub fn constructor_x64_pmaxsd<C: Context>(
6471
0
    ctx: &mut C,
6472
0
    arg0: Xmm,
6473
0
    arg1: &XmmMem,
6474
0
) -> Xmm {
6475
0
    let v5 = C::use_avx_simd(ctx);
6476
0
    if v5 == true {
6477
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6478
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsd, arg0, v7);
6479
0
        // Rule at src/isa/x64/inst.isle line 3307.
6480
0
        return v8;
6481
0
    }
6482
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6483
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsd, arg0, v3);
6484
0
    // Rule at src/isa/x64/inst.isle line 3306.
6485
0
    return v4;
6486
0
}
6487
6488
// Generated as internal constructor for term x64_pmins.
6489
0
pub fn constructor_x64_pmins<C: Context>(
6490
0
    ctx: &mut C,
6491
0
    arg0: Type,
6492
0
    arg1: Xmm,
6493
0
    arg2: &XmmMem,
6494
0
) -> Xmm {
6495
0
    match arg0 {
6496
        I8X16 => {
6497
0
            let v3 = constructor_x64_pminsb(ctx, arg1, arg2);
6498
0
            // Rule at src/isa/x64/inst.isle line 3313.
6499
0
            return v3;
6500
        }
6501
        I16X8 => {
6502
0
            let v4 = constructor_x64_pminsw(ctx, arg1, arg2);
6503
0
            // Rule at src/isa/x64/inst.isle line 3314.
6504
0
            return v4;
6505
        }
6506
        I32X4 => {
6507
0
            let v5 = constructor_x64_pminsd(ctx, arg1, arg2);
6508
0
            // Rule at src/isa/x64/inst.isle line 3315.
6509
0
            return v5;
6510
        }
6511
0
        _ => {}
6512
0
    }
6513
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmins", "src/isa/x64/inst.isle line 3312")
6514
0
}
6515
6516
// Generated as internal constructor for term x64_pminsb.
6517
0
pub fn constructor_x64_pminsb<C: Context>(
6518
0
    ctx: &mut C,
6519
0
    arg0: Xmm,
6520
0
    arg1: &XmmMem,
6521
0
) -> Xmm {
6522
0
    let v5 = C::use_avx_simd(ctx);
6523
0
    if v5 == true {
6524
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6525
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsb, arg0, v7);
6526
0
        // Rule at src/isa/x64/inst.isle line 3319.
6527
0
        return v8;
6528
0
    }
6529
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6530
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsb, arg0, v3);
6531
0
    // Rule at src/isa/x64/inst.isle line 3318.
6532
0
    return v4;
6533
0
}
6534
6535
// Generated as internal constructor for term x64_pminsw.
6536
0
pub fn constructor_x64_pminsw<C: Context>(
6537
0
    ctx: &mut C,
6538
0
    arg0: Xmm,
6539
0
    arg1: &XmmMem,
6540
0
) -> Xmm {
6541
0
    let v5 = C::use_avx_simd(ctx);
6542
0
    if v5 == true {
6543
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6544
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsw, arg0, v7);
6545
0
        // Rule at src/isa/x64/inst.isle line 3324.
6546
0
        return v8;
6547
0
    }
6548
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6549
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsw, arg0, v3);
6550
0
    // Rule at src/isa/x64/inst.isle line 3323.
6551
0
    return v4;
6552
0
}
6553
6554
// Generated as internal constructor for term x64_pminsd.
6555
0
pub fn constructor_x64_pminsd<C: Context>(
6556
0
    ctx: &mut C,
6557
0
    arg0: Xmm,
6558
0
    arg1: &XmmMem,
6559
0
) -> Xmm {
6560
0
    let v5 = C::use_avx_simd(ctx);
6561
0
    if v5 == true {
6562
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6563
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsd, arg0, v7);
6564
0
        // Rule at src/isa/x64/inst.isle line 3329.
6565
0
        return v8;
6566
0
    }
6567
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6568
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsd, arg0, v3);
6569
0
    // Rule at src/isa/x64/inst.isle line 3328.
6570
0
    return v4;
6571
0
}
6572
6573
// Generated as internal constructor for term x64_pmaxu.
6574
0
pub fn constructor_x64_pmaxu<C: Context>(
6575
0
    ctx: &mut C,
6576
0
    arg0: Type,
6577
0
    arg1: Xmm,
6578
0
    arg2: &XmmMem,
6579
0
) -> Xmm {
6580
0
    match arg0 {
6581
        I8X16 => {
6582
0
            let v3 = constructor_x64_pmaxub(ctx, arg1, arg2);
6583
0
            // Rule at src/isa/x64/inst.isle line 3335.
6584
0
            return v3;
6585
        }
6586
        I16X8 => {
6587
0
            let v4 = constructor_x64_pmaxuw(ctx, arg1, arg2);
6588
0
            // Rule at src/isa/x64/inst.isle line 3336.
6589
0
            return v4;
6590
        }
6591
        I32X4 => {
6592
0
            let v5 = constructor_x64_pmaxud(ctx, arg1, arg2);
6593
0
            // Rule at src/isa/x64/inst.isle line 3337.
6594
0
            return v5;
6595
        }
6596
0
        _ => {}
6597
0
    }
6598
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmaxu", "src/isa/x64/inst.isle line 3334")
6599
0
}
6600
6601
// Generated as internal constructor for term x64_pmaxub.
6602
0
pub fn constructor_x64_pmaxub<C: Context>(
6603
0
    ctx: &mut C,
6604
0
    arg0: Xmm,
6605
0
    arg1: &XmmMem,
6606
0
) -> Xmm {
6607
0
    let v5 = C::use_avx_simd(ctx);
6608
0
    if v5 == true {
6609
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6610
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxub, arg0, v7);
6611
0
        // Rule at src/isa/x64/inst.isle line 3341.
6612
0
        return v8;
6613
0
    }
6614
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6615
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxub, arg0, v3);
6616
0
    // Rule at src/isa/x64/inst.isle line 3340.
6617
0
    return v4;
6618
0
}
6619
6620
// Generated as internal constructor for term x64_pmaxuw.
6621
0
pub fn constructor_x64_pmaxuw<C: Context>(
6622
0
    ctx: &mut C,
6623
0
    arg0: Xmm,
6624
0
    arg1: &XmmMem,
6625
0
) -> Xmm {
6626
0
    let v5 = C::use_avx_simd(ctx);
6627
0
    if v5 == true {
6628
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6629
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxuw, arg0, v7);
6630
0
        // Rule at src/isa/x64/inst.isle line 3346.
6631
0
        return v8;
6632
0
    }
6633
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6634
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxuw, arg0, v3);
6635
0
    // Rule at src/isa/x64/inst.isle line 3345.
6636
0
    return v4;
6637
0
}
6638
6639
// Generated as internal constructor for term x64_pmaxud.
6640
0
pub fn constructor_x64_pmaxud<C: Context>(
6641
0
    ctx: &mut C,
6642
0
    arg0: Xmm,
6643
0
    arg1: &XmmMem,
6644
0
) -> Xmm {
6645
0
    let v5 = C::use_avx_simd(ctx);
6646
0
    if v5 == true {
6647
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6648
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxud, arg0, v7);
6649
0
        // Rule at src/isa/x64/inst.isle line 3351.
6650
0
        return v8;
6651
0
    }
6652
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6653
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxud, arg0, v3);
6654
0
    // Rule at src/isa/x64/inst.isle line 3350.
6655
0
    return v4;
6656
0
}
6657
6658
// Generated as internal constructor for term x64_pminu.
6659
0
pub fn constructor_x64_pminu<C: Context>(
6660
0
    ctx: &mut C,
6661
0
    arg0: Type,
6662
0
    arg1: Xmm,
6663
0
    arg2: &XmmMem,
6664
0
) -> Xmm {
6665
0
    match arg0 {
6666
        I8X16 => {
6667
0
            let v3 = constructor_x64_pminub(ctx, arg1, arg2);
6668
0
            // Rule at src/isa/x64/inst.isle line 3357.
6669
0
            return v3;
6670
        }
6671
        I16X8 => {
6672
0
            let v4 = constructor_x64_pminuw(ctx, arg1, arg2);
6673
0
            // Rule at src/isa/x64/inst.isle line 3358.
6674
0
            return v4;
6675
        }
6676
        I32X4 => {
6677
0
            let v5 = constructor_x64_pminud(ctx, arg1, arg2);
6678
0
            // Rule at src/isa/x64/inst.isle line 3359.
6679
0
            return v5;
6680
        }
6681
0
        _ => {}
6682
0
    }
6683
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pminu", "src/isa/x64/inst.isle line 3356")
6684
0
}
6685
6686
// Generated as internal constructor for term x64_pminub.
6687
0
pub fn constructor_x64_pminub<C: Context>(
6688
0
    ctx: &mut C,
6689
0
    arg0: Xmm,
6690
0
    arg1: &XmmMem,
6691
0
) -> Xmm {
6692
0
    let v5 = C::use_avx_simd(ctx);
6693
0
    if v5 == true {
6694
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6695
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminub, arg0, v7);
6696
0
        // Rule at src/isa/x64/inst.isle line 3363.
6697
0
        return v8;
6698
0
    }
6699
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6700
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminub, arg0, v3);
6701
0
    // Rule at src/isa/x64/inst.isle line 3362.
6702
0
    return v4;
6703
0
}
6704
6705
// Generated as internal constructor for term x64_pminuw.
6706
0
pub fn constructor_x64_pminuw<C: Context>(
6707
0
    ctx: &mut C,
6708
0
    arg0: Xmm,
6709
0
    arg1: &XmmMem,
6710
0
) -> Xmm {
6711
0
    let v5 = C::use_avx_simd(ctx);
6712
0
    if v5 == true {
6713
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6714
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminuw, arg0, v7);
6715
0
        // Rule at src/isa/x64/inst.isle line 3368.
6716
0
        return v8;
6717
0
    }
6718
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6719
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminuw, arg0, v3);
6720
0
    // Rule at src/isa/x64/inst.isle line 3367.
6721
0
    return v4;
6722
0
}
6723
6724
// Generated as internal constructor for term x64_pminud.
6725
0
pub fn constructor_x64_pminud<C: Context>(
6726
0
    ctx: &mut C,
6727
0
    arg0: Xmm,
6728
0
    arg1: &XmmMem,
6729
0
) -> Xmm {
6730
0
    let v5 = C::use_avx_simd(ctx);
6731
0
    if v5 == true {
6732
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6733
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminud, arg0, v7);
6734
0
        // Rule at src/isa/x64/inst.isle line 3373.
6735
0
        return v8;
6736
0
    }
6737
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6738
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminud, arg0, v3);
6739
0
    // Rule at src/isa/x64/inst.isle line 3372.
6740
0
    return v4;
6741
0
}
6742
6743
// Generated as internal constructor for term x64_punpcklbw.
6744
0
pub fn constructor_x64_punpcklbw<C: Context>(
6745
0
    ctx: &mut C,
6746
0
    arg0: Xmm,
6747
0
    arg1: &XmmMem,
6748
0
) -> Xmm {
6749
0
    let v5 = C::use_avx_simd(ctx);
6750
0
    if v5 == true {
6751
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6752
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklbw, arg0, v7);
6753
0
        // Rule at src/isa/x64/inst.isle line 3381.
6754
0
        return v8;
6755
0
    }
6756
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6757
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklbw, arg0, v3);
6758
0
    // Rule at src/isa/x64/inst.isle line 3379.
6759
0
    return v4;
6760
0
}
6761
6762
// Generated as internal constructor for term x64_punpckhbw.
6763
0
pub fn constructor_x64_punpckhbw<C: Context>(
6764
0
    ctx: &mut C,
6765
0
    arg0: Xmm,
6766
0
    arg1: &XmmMem,
6767
0
) -> Xmm {
6768
0
    let v5 = C::use_avx_simd(ctx);
6769
0
    if v5 == true {
6770
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6771
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhbw, arg0, v7);
6772
0
        // Rule at src/isa/x64/inst.isle line 3389.
6773
0
        return v8;
6774
0
    }
6775
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6776
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhbw, arg0, v3);
6777
0
    // Rule at src/isa/x64/inst.isle line 3387.
6778
0
    return v4;
6779
0
}
6780
6781
// Generated as internal constructor for term x64_packsswb.
6782
0
pub fn constructor_x64_packsswb<C: Context>(
6783
0
    ctx: &mut C,
6784
0
    arg0: Xmm,
6785
0
    arg1: &XmmMem,
6786
0
) -> Xmm {
6787
0
    let v5 = C::use_avx_simd(ctx);
6788
0
    if v5 == true {
6789
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6790
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpacksswb, arg0, v7);
6791
0
        // Rule at src/isa/x64/inst.isle line 3397.
6792
0
        return v8;
6793
0
    }
6794
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6795
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packsswb, arg0, v3);
6796
0
    // Rule at src/isa/x64/inst.isle line 3395.
6797
0
    return v4;
6798
0
}
6799
6800
// Generated as internal constructor for term x64_packssdw.
6801
0
pub fn constructor_x64_packssdw<C: Context>(
6802
0
    ctx: &mut C,
6803
0
    arg0: Xmm,
6804
0
    arg1: &XmmMem,
6805
0
) -> Xmm {
6806
0
    let v5 = C::use_avx_simd(ctx);
6807
0
    if v5 == true {
6808
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6809
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackssdw, arg0, v7);
6810
0
        // Rule at src/isa/x64/inst.isle line 3405.
6811
0
        return v8;
6812
0
    }
6813
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6814
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packssdw, arg0, v3);
6815
0
    // Rule at src/isa/x64/inst.isle line 3403.
6816
0
    return v4;
6817
0
}
6818
6819
// Generated as internal constructor for term x64_packuswb.
6820
0
pub fn constructor_x64_packuswb<C: Context>(
6821
0
    ctx: &mut C,
6822
0
    arg0: Xmm,
6823
0
    arg1: &XmmMem,
6824
0
) -> Xmm {
6825
0
    let v5 = C::use_avx_simd(ctx);
6826
0
    if v5 == true {
6827
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6828
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackuswb, arg0, v7);
6829
0
        // Rule at src/isa/x64/inst.isle line 3413.
6830
0
        return v8;
6831
0
    }
6832
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6833
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packuswb, arg0, v3);
6834
0
    // Rule at src/isa/x64/inst.isle line 3411.
6835
0
    return v4;
6836
0
}
6837
6838
// Generated as internal constructor for term x64_packusdw.
6839
0
pub fn constructor_x64_packusdw<C: Context>(
6840
0
    ctx: &mut C,
6841
0
    arg0: Xmm,
6842
0
    arg1: &XmmMem,
6843
0
) -> Xmm {
6844
0
    let v5 = C::use_avx_simd(ctx);
6845
0
    if v5 == true {
6846
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6847
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackusdw, arg0, v7);
6848
0
        // Rule at src/isa/x64/inst.isle line 3421.
6849
0
        return v8;
6850
0
    }
6851
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6852
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packusdw, arg0, v3);
6853
0
    // Rule at src/isa/x64/inst.isle line 3419.
6854
0
    return v4;
6855
0
}
6856
6857
// Generated as internal constructor for term xmm_rm_r_imm.
6858
0
pub fn constructor_xmm_rm_r_imm<C: Context>(
6859
0
    ctx: &mut C,
6860
0
    arg0: &SseOpcode,
6861
0
    arg1: Reg,
6862
0
    arg2: &RegMem,
6863
0
    arg3: u8,
6864
0
    arg4: &OperandSize,
6865
0
) -> Xmm {
6866
0
    let v5 = C::temp_writable_xmm(ctx);
6867
0
    let v6 = C::writable_xmm_to_reg(ctx, v5);
6868
0
    let v7 = MInst::XmmRmRImm {
6869
0
        op: arg0.clone(),
6870
0
        src1: arg1,
6871
0
        src2: arg2.clone(),
6872
0
        dst: v6,
6873
0
        imm: arg3,
6874
0
        size: arg4.clone(),
6875
0
    };
6876
0
    let v8 = C::emit(ctx, &v7);
6877
0
    let v9 = C::writable_xmm_to_xmm(ctx, v5);
6878
0
    // Rule at src/isa/x64/inst.isle line 3427.
6879
0
    return v9;
6880
0
}
6881
6882
// Generated as internal constructor for term x64_palignr.
6883
0
pub fn constructor_x64_palignr<C: Context>(
6884
0
    ctx: &mut C,
6885
0
    arg0: Xmm,
6886
0
    arg1: &XmmMem,
6887
0
    arg2: u8,
6888
0
) -> Xmm {
6889
0
    let v8 = C::use_avx_simd(ctx);
6890
0
    if v8 == true {
6891
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpalignr, arg0, arg1, arg2);
6892
0
        // Rule at src/isa/x64/inst.isle line 3445.
6893
0
        return v10;
6894
0
    }
6895
0
    let v4 = C::xmm_to_reg(ctx, arg0);
6896
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
6897
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Palignr, v4, v5, arg2, &OperandSize::Size32);
6898
0
    // Rule at src/isa/x64/inst.isle line 3439.
6899
0
    return v7;
6900
0
}
6901
6902
// Generated as internal constructor for term x64_cmpp.
6903
0
pub fn constructor_x64_cmpp<C: Context>(
6904
0
    ctx: &mut C,
6905
0
    arg0: Type,
6906
0
    arg1: Xmm,
6907
0
    arg2: &XmmMem,
6908
0
    arg3: &FcmpImm,
6909
0
) -> Xmm {
6910
0
    match arg0 {
6911
        F32X4 => {
6912
0
            let v4 = constructor_x64_cmpps(ctx, arg1, arg2, arg3);
6913
0
            // Rule at src/isa/x64/inst.isle line 3451.
6914
0
            return v4;
6915
        }
6916
        F64X2 => {
6917
0
            let v5 = constructor_x64_cmppd(ctx, arg1, arg2, arg3);
6918
0
            // Rule at src/isa/x64/inst.isle line 3452.
6919
0
            return v5;
6920
        }
6921
0
        _ => {}
6922
0
    }
6923
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_cmpp", "src/isa/x64/inst.isle line 3450")
6924
0
}
6925
6926
// Generated as internal constructor for term x64_cmpps.
6927
0
pub fn constructor_x64_cmpps<C: Context>(
6928
0
    ctx: &mut C,
6929
0
    arg0: Xmm,
6930
0
    arg1: &XmmMem,
6931
0
    arg2: &FcmpImm,
6932
0
) -> Xmm {
6933
0
    let v9 = C::use_avx_simd(ctx);
6934
0
    if v9 == true {
6935
0
        let v11 = C::encode_fcmp_imm(ctx, arg2);
6936
0
        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmpps, arg0, arg1, v11);
6937
0
        // Rule at src/isa/x64/inst.isle line 3461.
6938
0
        return v12;
6939
0
    }
6940
0
    let v4 = C::xmm_to_reg(ctx, arg0);
6941
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
6942
0
    let v6 = C::encode_fcmp_imm(ctx, arg2);
6943
0
    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmpps, v4, v5, v6, &OperandSize::Size32);
6944
0
    // Rule at src/isa/x64/inst.isle line 3455.
6945
0
    return v8;
6946
0
}
6947
6948
// Generated as internal constructor for term x64_cmppd.
6949
0
pub fn constructor_x64_cmppd<C: Context>(
6950
0
    ctx: &mut C,
6951
0
    arg0: Xmm,
6952
0
    arg1: &XmmMem,
6953
0
    arg2: &FcmpImm,
6954
0
) -> Xmm {
6955
0
    let v9 = C::use_avx_simd(ctx);
6956
0
    if v9 == true {
6957
0
        let v11 = C::encode_fcmp_imm(ctx, arg2);
6958
0
        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmppd, arg0, arg1, v11);
6959
0
        // Rule at src/isa/x64/inst.isle line 3478.
6960
0
        return v12;
6961
0
    }
6962
0
    let v4 = C::xmm_to_reg(ctx, arg0);
6963
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
6964
0
    let v6 = C::encode_fcmp_imm(ctx, arg2);
6965
0
    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmppd, v4, v5, v6, &OperandSize::Size32);
6966
0
    // Rule at src/isa/x64/inst.isle line 3472.
6967
0
    return v8;
6968
0
}
6969
6970
// Generated as internal constructor for term x64_pinsrb.
6971
0
pub fn constructor_x64_pinsrb<C: Context>(
6972
0
    ctx: &mut C,
6973
0
    arg0: Xmm,
6974
0
    arg1: &GprMem,
6975
0
    arg2: u8,
6976
0
) -> Xmm {
6977
0
    let v8 = C::use_avx_simd(ctx);
6978
0
    if v8 == true {
6979
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrb, arg0, arg1, arg2);
6980
0
        // Rule at src/isa/x64/inst.isle line 3493.
6981
0
        return v10;
6982
0
    }
6983
0
    let v4 = C::xmm_to_reg(ctx, arg0);
6984
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
6985
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrb, v4, v5, arg2, &OperandSize::Size32);
6986
0
    // Rule at src/isa/x64/inst.isle line 3487.
6987
0
    return v7;
6988
0
}
6989
6990
// Generated as internal constructor for term x64_pinsrw.
6991
0
pub fn constructor_x64_pinsrw<C: Context>(
6992
0
    ctx: &mut C,
6993
0
    arg0: Xmm,
6994
0
    arg1: &GprMem,
6995
0
    arg2: u8,
6996
0
) -> Xmm {
6997
0
    let v8 = C::use_avx_simd(ctx);
6998
0
    if v8 == true {
6999
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrw, arg0, arg1, arg2);
7000
0
        // Rule at src/isa/x64/inst.isle line 3505.
7001
0
        return v10;
7002
0
    }
7003
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7004
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7005
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrw, v4, v5, arg2, &OperandSize::Size32);
7006
0
    // Rule at src/isa/x64/inst.isle line 3499.
7007
0
    return v7;
7008
0
}
7009
7010
// Generated as internal constructor for term x64_pinsrd.
7011
0
pub fn constructor_x64_pinsrd<C: Context>(
7012
0
    ctx: &mut C,
7013
0
    arg0: Xmm,
7014
0
    arg1: &GprMem,
7015
0
    arg2: u8,
7016
0
) -> Xmm {
7017
0
    let v8 = C::use_avx_simd(ctx);
7018
0
    if v8 == true {
7019
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrd, arg0, arg1, arg2);
7020
0
        // Rule at src/isa/x64/inst.isle line 3517.
7021
0
        return v10;
7022
0
    }
7023
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7024
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7025
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size32);
7026
0
    // Rule at src/isa/x64/inst.isle line 3511.
7027
0
    return v7;
7028
0
}
7029
7030
// Generated as internal constructor for term x64_pinsrq.
7031
0
pub fn constructor_x64_pinsrq<C: Context>(
7032
0
    ctx: &mut C,
7033
0
    arg0: Xmm,
7034
0
    arg1: &GprMem,
7035
0
    arg2: u8,
7036
0
) -> Xmm {
7037
0
    let v8 = C::use_avx_simd(ctx);
7038
0
    if v8 == true {
7039
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrq, arg0, arg1, arg2);
7040
0
        // Rule at src/isa/x64/inst.isle line 3529.
7041
0
        return v10;
7042
0
    }
7043
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7044
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7045
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size64);
7046
0
    // Rule at src/isa/x64/inst.isle line 3523.
7047
0
    return v7;
7048
0
}
7049
7050
// Generated as internal constructor for term xmm_vex_pinsr.
7051
0
pub fn constructor_xmm_vex_pinsr<C: Context>(
7052
0
    ctx: &mut C,
7053
0
    arg0: &AvxOpcode,
7054
0
    arg1: Xmm,
7055
0
    arg2: &GprMem,
7056
0
    arg3: u8,
7057
0
) -> Xmm {
7058
0
    let v4 = C::temp_writable_xmm(ctx);
7059
0
    let v5 = MInst::XmmVexPinsr {
7060
0
        op: arg0.clone(),
7061
0
        src1: arg1,
7062
0
        src2: arg2.clone(),
7063
0
        dst: v4,
7064
0
        imm: arg3,
7065
0
    };
7066
0
    let v6 = C::emit(ctx, &v5);
7067
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
7068
0
    // Rule at src/isa/x64/inst.isle line 3535.
7069
0
    return v7;
7070
0
}
7071
7072
// Generated as internal constructor for term xmm_unary_rm_r_imm.
7073
0
pub fn constructor_xmm_unary_rm_r_imm<C: Context>(
7074
0
    ctx: &mut C,
7075
0
    arg0: &SseOpcode,
7076
0
    arg1: &XmmMemAligned,
7077
0
    arg2: u8,
7078
0
) -> Xmm {
7079
0
    let v3 = C::temp_writable_xmm(ctx);
7080
0
    let v4 = MInst::XmmUnaryRmRImm {
7081
0
        op: arg0.clone(),
7082
0
        src: arg1.clone(),
7083
0
        imm: arg2,
7084
0
        dst: v3,
7085
0
    };
7086
0
    let v5 = C::emit(ctx, &v4);
7087
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
7088
0
    // Rule at src/isa/x64/inst.isle line 3542.
7089
0
    return v6;
7090
0
}
7091
7092
// Generated as internal constructor for term x64_roundss.
7093
0
pub fn constructor_x64_roundss<C: Context>(
7094
0
    ctx: &mut C,
7095
0
    arg0: &XmmMem,
7096
0
    arg1: &RoundImm,
7097
0
) -> Xmm {
7098
0
    let v6 = C::use_avx_simd(ctx);
7099
0
    if v6 == true {
7100
0
        let v8 = C::encode_round_imm(ctx, arg1);
7101
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundss, arg0, v8);
7102
0
        // Rule at src/isa/x64/inst.isle line 3551.
7103
0
        return v9;
7104
0
    }
7105
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7106
0
    let v4 = C::encode_round_imm(ctx, arg1);
7107
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundss, v3, v4);
7108
0
    // Rule at src/isa/x64/inst.isle line 3549.
7109
0
    return v5;
7110
0
}
7111
7112
// Generated as internal constructor for term x64_roundsd.
7113
0
pub fn constructor_x64_roundsd<C: Context>(
7114
0
    ctx: &mut C,
7115
0
    arg0: &XmmMem,
7116
0
    arg1: &RoundImm,
7117
0
) -> Xmm {
7118
0
    let v6 = C::use_avx_simd(ctx);
7119
0
    if v6 == true {
7120
0
        let v8 = C::encode_round_imm(ctx, arg1);
7121
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundsd, arg0, v8);
7122
0
        // Rule at src/isa/x64/inst.isle line 3559.
7123
0
        return v9;
7124
0
    }
7125
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7126
0
    let v4 = C::encode_round_imm(ctx, arg1);
7127
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundsd, v3, v4);
7128
0
    // Rule at src/isa/x64/inst.isle line 3557.
7129
0
    return v5;
7130
0
}
7131
7132
// Generated as internal constructor for term x64_roundps.
7133
0
pub fn constructor_x64_roundps<C: Context>(
7134
0
    ctx: &mut C,
7135
0
    arg0: &XmmMem,
7136
0
    arg1: &RoundImm,
7137
0
) -> Xmm {
7138
0
    let v6 = C::use_avx_simd(ctx);
7139
0
    if v6 == true {
7140
0
        let v8 = C::encode_round_imm(ctx, arg1);
7141
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundps, arg0, v8);
7142
0
        // Rule at src/isa/x64/inst.isle line 3567.
7143
0
        return v9;
7144
0
    }
7145
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7146
0
    let v4 = C::encode_round_imm(ctx, arg1);
7147
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundps, v3, v4);
7148
0
    // Rule at src/isa/x64/inst.isle line 3565.
7149
0
    return v5;
7150
0
}
7151
7152
// Generated as internal constructor for term x64_roundpd.
7153
0
pub fn constructor_x64_roundpd<C: Context>(
7154
0
    ctx: &mut C,
7155
0
    arg0: &XmmMem,
7156
0
    arg1: &RoundImm,
7157
0
) -> Xmm {
7158
0
    let v6 = C::use_avx_simd(ctx);
7159
0
    if v6 == true {
7160
0
        let v8 = C::encode_round_imm(ctx, arg1);
7161
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundpd, arg0, v8);
7162
0
        // Rule at src/isa/x64/inst.isle line 3575.
7163
0
        return v9;
7164
0
    }
7165
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7166
0
    let v4 = C::encode_round_imm(ctx, arg1);
7167
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundpd, v3, v4);
7168
0
    // Rule at src/isa/x64/inst.isle line 3573.
7169
0
    return v5;
7170
0
}
7171
7172
// Generated as internal constructor for term x64_pmaddwd.
7173
0
pub fn constructor_x64_pmaddwd<C: Context>(
7174
0
    ctx: &mut C,
7175
0
    arg0: Xmm,
7176
0
    arg1: &XmmMem,
7177
0
) -> Xmm {
7178
0
    let v5 = C::use_avx_simd(ctx);
7179
0
    if v5 == true {
7180
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7181
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddwd, arg0, v7);
7182
0
        // Rule at src/isa/x64/inst.isle line 3583.
7183
0
        return v8;
7184
0
    }
7185
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7186
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddwd, arg0, v3);
7187
0
    // Rule at src/isa/x64/inst.isle line 3581.
7188
0
    return v4;
7189
0
}
7190
7191
// Generated as internal constructor for term x64_pmaddubsw.
7192
0
pub fn constructor_x64_pmaddubsw<C: Context>(
7193
0
    ctx: &mut C,
7194
0
    arg0: Xmm,
7195
0
    arg1: &XmmMem,
7196
0
) -> Xmm {
7197
0
    let v5 = C::use_avx_simd(ctx);
7198
0
    if v5 == true {
7199
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7200
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddubsw, arg0, v7);
7201
0
        // Rule at src/isa/x64/inst.isle line 3590.
7202
0
        return v8;
7203
0
    }
7204
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7205
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddubsw, arg0, v3);
7206
0
    // Rule at src/isa/x64/inst.isle line 3588.
7207
0
    return v4;
7208
0
}
7209
7210
// Generated as internal constructor for term x64_insertps.
7211
0
pub fn constructor_x64_insertps<C: Context>(
7212
0
    ctx: &mut C,
7213
0
    arg0: Xmm,
7214
0
    arg1: &XmmMem,
7215
0
    arg2: u8,
7216
0
) -> Xmm {
7217
0
    let v8 = C::use_avx_simd(ctx);
7218
0
    if v8 == true {
7219
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vinsertps, arg0, arg1, arg2);
7220
0
        // Rule at src/isa/x64/inst.isle line 3602.
7221
0
        return v10;
7222
0
    }
7223
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7224
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7225
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Insertps, v4, v5, arg2, &OperandSize::Size32);
7226
0
    // Rule at src/isa/x64/inst.isle line 3596.
7227
0
    return v7;
7228
0
}
7229
7230
// Generated as internal constructor for term x64_pshufd.
7231
0
pub fn constructor_x64_pshufd<C: Context>(
7232
0
    ctx: &mut C,
7233
0
    arg0: &XmmMem,
7234
0
    arg1: u8,
7235
0
) -> Xmm {
7236
0
    let v5 = C::use_avx_simd(ctx);
7237
0
    if v5 == true {
7238
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufd, arg0, arg1);
7239
0
        // Rule at src/isa/x64/inst.isle line 3610.
7240
0
        return v7;
7241
0
    }
7242
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7243
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufd, v3, arg1);
7244
0
    // Rule at src/isa/x64/inst.isle line 3608.
7245
0
    return v4;
7246
0
}
7247
7248
// Generated as internal constructor for term x64_pshufb.
7249
0
pub fn constructor_x64_pshufb<C: Context>(
7250
0
    ctx: &mut C,
7251
0
    arg0: Xmm,
7252
0
    arg1: &XmmMem,
7253
0
) -> Xmm {
7254
0
    let v5 = C::use_avx_simd(ctx);
7255
0
    if v5 == true {
7256
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7257
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpshufb, arg0, v7);
7258
0
        // Rule at src/isa/x64/inst.isle line 3618.
7259
0
        return v8;
7260
0
    }
7261
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7262
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pshufb, arg0, v3);
7263
0
    // Rule at src/isa/x64/inst.isle line 3616.
7264
0
    return v4;
7265
0
}
7266
7267
// Generated as internal constructor for term x64_pshuflw.
7268
0
pub fn constructor_x64_pshuflw<C: Context>(
7269
0
    ctx: &mut C,
7270
0
    arg0: &XmmMem,
7271
0
    arg1: u8,
7272
0
) -> Xmm {
7273
0
    let v5 = C::use_avx_simd(ctx);
7274
0
    if v5 == true {
7275
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshuflw, arg0, arg1);
7276
0
        // Rule at src/isa/x64/inst.isle line 3626.
7277
0
        return v7;
7278
0
    }
7279
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7280
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshuflw, v3, arg1);
7281
0
    // Rule at src/isa/x64/inst.isle line 3624.
7282
0
    return v4;
7283
0
}
7284
7285
// Generated as internal constructor for term x64_pshufhw.
7286
0
pub fn constructor_x64_pshufhw<C: Context>(
7287
0
    ctx: &mut C,
7288
0
    arg0: &XmmMem,
7289
0
    arg1: u8,
7290
0
) -> Xmm {
7291
0
    let v5 = C::use_avx_simd(ctx);
7292
0
    if v5 == true {
7293
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufhw, arg0, arg1);
7294
0
        // Rule at src/isa/x64/inst.isle line 3634.
7295
0
        return v7;
7296
0
    }
7297
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7298
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufhw, v3, arg1);
7299
0
    // Rule at src/isa/x64/inst.isle line 3632.
7300
0
    return v4;
7301
0
}
7302
7303
// Generated as internal constructor for term x64_shufps.
7304
0
pub fn constructor_x64_shufps<C: Context>(
7305
0
    ctx: &mut C,
7306
0
    arg0: Xmm,
7307
0
    arg1: &XmmMem,
7308
0
    arg2: u8,
7309
0
) -> Xmm {
7310
0
    let v8 = C::use_avx_simd(ctx);
7311
0
    if v8 == true {
7312
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vshufps, arg0, arg1, arg2);
7313
0
        // Rule at src/isa/x64/inst.isle line 3646.
7314
0
        return v10;
7315
0
    }
7316
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7317
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7318
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Shufps, v4, v5, arg2, &OperandSize::Size32);
7319
0
    // Rule at src/isa/x64/inst.isle line 3640.
7320
0
    return v7;
7321
0
}
7322
7323
// Generated as internal constructor for term xmm_unary_rm_r.
7324
0
pub fn constructor_xmm_unary_rm_r<C: Context>(
7325
0
    ctx: &mut C,
7326
0
    arg0: &SseOpcode,
7327
0
    arg1: &XmmMemAligned,
7328
0
) -> Xmm {
7329
0
    let v2 = C::temp_writable_xmm(ctx);
7330
0
    let v3 = MInst::XmmUnaryRmR {
7331
0
        op: arg0.clone(),
7332
0
        src: arg1.clone(),
7333
0
        dst: v2,
7334
0
    };
7335
0
    let v4 = C::emit(ctx, &v3);
7336
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
7337
0
    // Rule at src/isa/x64/inst.isle line 3652.
7338
0
    return v5;
7339
0
}
7340
7341
// Generated as internal constructor for term xmm_unary_rm_r_unaligned.
7342
0
pub fn constructor_xmm_unary_rm_r_unaligned<C: Context>(
7343
0
    ctx: &mut C,
7344
0
    arg0: &SseOpcode,
7345
0
    arg1: &XmmMem,
7346
0
) -> Xmm {
7347
0
    let v2 = C::temp_writable_xmm(ctx);
7348
0
    let v3 = MInst::XmmUnaryRmRUnaligned {
7349
0
        op: arg0.clone(),
7350
0
        src: arg1.clone(),
7351
0
        dst: v2,
7352
0
    };
7353
0
    let v4 = C::emit(ctx, &v3);
7354
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
7355
0
    // Rule at src/isa/x64/inst.isle line 3659.
7356
0
    return v5;
7357
0
}
7358
7359
// Generated as internal constructor for term x64_pabsb.
7360
0
pub fn constructor_x64_pabsb<C: Context>(
7361
0
    ctx: &mut C,
7362
0
    arg0: &XmmMem,
7363
0
) -> Xmm {
7364
0
    let v4 = C::use_avx_simd(ctx);
7365
0
    if v4 == true {
7366
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsb, arg0);
7367
0
        // Rule at src/isa/x64/inst.isle line 3668.
7368
0
        return v6;
7369
0
    }
7370
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7371
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsb, v2);
7372
0
    // Rule at src/isa/x64/inst.isle line 3666.
7373
0
    return v3;
7374
0
}
7375
7376
// Generated as internal constructor for term x64_pabsw.
7377
0
pub fn constructor_x64_pabsw<C: Context>(
7378
0
    ctx: &mut C,
7379
0
    arg0: &XmmMem,
7380
0
) -> Xmm {
7381
0
    let v4 = C::use_avx_simd(ctx);
7382
0
    if v4 == true {
7383
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsw, arg0);
7384
0
        // Rule at src/isa/x64/inst.isle line 3676.
7385
0
        return v6;
7386
0
    }
7387
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7388
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsw, v2);
7389
0
    // Rule at src/isa/x64/inst.isle line 3674.
7390
0
    return v3;
7391
0
}
7392
7393
// Generated as internal constructor for term x64_pabsd.
7394
0
pub fn constructor_x64_pabsd<C: Context>(
7395
0
    ctx: &mut C,
7396
0
    arg0: &XmmMem,
7397
0
) -> Xmm {
7398
0
    let v4 = C::use_avx_simd(ctx);
7399
0
    if v4 == true {
7400
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsd, arg0);
7401
0
        // Rule at src/isa/x64/inst.isle line 3684.
7402
0
        return v6;
7403
0
    }
7404
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7405
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsd, v2);
7406
0
    // Rule at src/isa/x64/inst.isle line 3682.
7407
0
    return v3;
7408
0
}
7409
7410
// Generated as internal constructor for term xmm_unary_rm_r_evex.
7411
0
pub fn constructor_xmm_unary_rm_r_evex<C: Context>(
7412
0
    ctx: &mut C,
7413
0
    arg0: &Avx512Opcode,
7414
0
    arg1: &XmmMem,
7415
0
) -> Xmm {
7416
0
    let v2 = C::temp_writable_xmm(ctx);
7417
0
    let v3 = MInst::XmmUnaryRmREvex {
7418
0
        op: arg0.clone(),
7419
0
        src: arg1.clone(),
7420
0
        dst: v2,
7421
0
    };
7422
0
    let v4 = C::emit(ctx, &v3);
7423
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
7424
0
    // Rule at src/isa/x64/inst.isle line 3690.
7425
0
    return v5;
7426
0
}
7427
7428
// Generated as internal constructor for term x64_vcvtudq2ps.
7429
0
pub fn constructor_x64_vcvtudq2ps<C: Context>(
7430
0
    ctx: &mut C,
7431
0
    arg0: &XmmMem,
7432
0
) -> Xmm {
7433
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vcvtudq2ps, arg0);
7434
0
    // Rule at src/isa/x64/inst.isle line 3697.
7435
0
    return v2;
7436
0
}
7437
7438
// Generated as internal constructor for term x64_vpabsq.
7439
0
pub fn constructor_x64_vpabsq<C: Context>(
7440
0
    ctx: &mut C,
7441
0
    arg0: &XmmMem,
7442
0
) -> Xmm {
7443
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpabsq, arg0);
7444
0
    // Rule at src/isa/x64/inst.isle line 3702.
7445
0
    return v2;
7446
0
}
7447
7448
// Generated as internal constructor for term x64_vpopcntb.
7449
0
pub fn constructor_x64_vpopcntb<C: Context>(
7450
0
    ctx: &mut C,
7451
0
    arg0: &XmmMem,
7452
0
) -> Xmm {
7453
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpopcntb, arg0);
7454
0
    // Rule at src/isa/x64/inst.isle line 3707.
7455
0
    return v2;
7456
0
}
7457
7458
// Generated as internal constructor for term xmm_rm_r_evex.
7459
0
pub fn constructor_xmm_rm_r_evex<C: Context>(
7460
0
    ctx: &mut C,
7461
0
    arg0: &Avx512Opcode,
7462
0
    arg1: &XmmMem,
7463
0
    arg2: Xmm,
7464
0
) -> Xmm {
7465
0
    let v3 = C::temp_writable_xmm(ctx);
7466
0
    let v4 = MInst::XmmRmREvex {
7467
0
        op: arg0.clone(),
7468
0
        src1: arg1.clone(),
7469
0
        src2: arg2,
7470
0
        dst: v3,
7471
0
    };
7472
0
    let v5 = C::emit(ctx, &v4);
7473
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
7474
0
    // Rule at src/isa/x64/inst.isle line 3712.
7475
0
    return v6;
7476
0
}
7477
7478
// Generated as internal constructor for term x64_vpmullq.
7479
0
pub fn constructor_x64_vpmullq<C: Context>(
7480
0
    ctx: &mut C,
7481
0
    arg0: &XmmMem,
7482
0
    arg1: Xmm,
7483
0
) -> Xmm {
7484
0
    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpmullq, arg0, arg1);
7485
0
    // Rule at src/isa/x64/inst.isle line 3724.
7486
0
    return v3;
7487
0
}
7488
7489
// Generated as internal constructor for term x64_vpermi2b.
7490
0
pub fn constructor_x64_vpermi2b<C: Context>(
7491
0
    ctx: &mut C,
7492
0
    arg0: Xmm,
7493
0
    arg1: Xmm,
7494
0
    arg2: Xmm,
7495
0
) -> Xmm {
7496
0
    let v3 = C::temp_writable_xmm(ctx);
7497
0
    let v5 = &C::xmm_to_xmm_mem(ctx, arg0);
7498
0
    let v6 = MInst::XmmRmREvex3 {
7499
0
        op: Avx512Opcode::Vpermi2b,
7500
0
        src1: v5.clone(),
7501
0
        src2: arg1,
7502
0
        src3: arg2,
7503
0
        dst: v3,
7504
0
    };
7505
0
    let v7 = C::emit(ctx, &v6);
7506
0
    let v8 = C::writable_xmm_to_xmm(ctx, v3);
7507
0
    // Rule at src/isa/x64/inst.isle line 3733.
7508
0
    return v8;
7509
0
}
7510
7511
// Generated as internal constructor for term mul_hi.
7512
0
pub fn constructor_mul_hi<C: Context>(
7513
0
    ctx: &mut C,
7514
0
    arg0: Type,
7515
0
    arg1: bool,
7516
0
    arg2: Gpr,
7517
0
    arg3: &GprMem,
7518
0
) -> ValueRegs {
7519
0
    let v4 = C::temp_writable_gpr(ctx);
7520
0
    let v5 = C::temp_writable_gpr(ctx);
7521
0
    let v6 = &C::raw_operand_size_of_type(ctx, arg0);
7522
0
    let v7 = MInst::MulHi {
7523
0
        size: v6.clone(),
7524
0
        signed: arg1,
7525
0
        src1: arg2,
7526
0
        src2: arg3.clone(),
7527
0
        dst_lo: v4,
7528
0
        dst_hi: v5,
7529
0
    };
7530
0
    let v8 = C::emit(ctx, &v7);
7531
0
    let v9 = C::writable_gpr_to_gpr(ctx, v4);
7532
0
    let v10 = C::writable_gpr_to_gpr(ctx, v5);
7533
0
    let v11 = constructor_value_gprs(ctx, v9, v10);
7534
0
    // Rule at src/isa/x64/inst.isle line 3746.
7535
0
    return v11;
7536
0
}
7537
7538
// Generated as internal constructor for term mulhi_u.
7539
0
pub fn constructor_mulhi_u<C: Context>(
7540
0
    ctx: &mut C,
7541
0
    arg0: Type,
7542
0
    arg1: Gpr,
7543
0
    arg2: &GprMem,
7544
0
) -> ValueRegs {
7545
0
    let v4 = constructor_mul_hi(ctx, arg0, false, arg1, arg2);
7546
0
    // Rule at src/isa/x64/inst.isle line 3761.
7547
0
    return v4;
7548
0
}
7549
7550
// Generated as internal constructor for term xmm_rmi_xmm.
7551
0
pub fn constructor_xmm_rmi_xmm<C: Context>(
7552
0
    ctx: &mut C,
7553
0
    arg0: &SseOpcode,
7554
0
    arg1: Xmm,
7555
0
    arg2: &XmmMemAlignedImm,
7556
0
) -> Xmm {
7557
0
    let v3 = C::temp_writable_xmm(ctx);
7558
0
    let v4 = MInst::XmmRmiReg {
7559
0
        opcode: arg0.clone(),
7560
0
        src1: arg1,
7561
0
        src2: arg2.clone(),
7562
0
        dst: v3,
7563
0
    };
7564
0
    let v5 = C::emit(ctx, &v4);
7565
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
7566
0
    // Rule at src/isa/x64/inst.isle line 3766.
7567
0
    return v6;
7568
0
}
7569
7570
// Generated as internal constructor for term x64_psllw.
7571
0
pub fn constructor_x64_psllw<C: Context>(
7572
0
    ctx: &mut C,
7573
0
    arg0: Xmm,
7574
0
    arg1: &XmmMemImm,
7575
0
) -> Xmm {
7576
0
    let v5 = C::use_avx_simd(ctx);
7577
0
    if v5 == true {
7578
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllw, arg0, arg1);
7579
0
        // Rule at src/isa/x64/inst.isle line 3778.
7580
0
        return v7;
7581
0
    }
7582
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7583
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllw, arg0, v3);
7584
0
    // Rule at src/isa/x64/inst.isle line 3776.
7585
0
    return v4;
7586
0
}
7587
7588
// Generated as internal constructor for term x64_pslld.
7589
0
pub fn constructor_x64_pslld<C: Context>(
7590
0
    ctx: &mut C,
7591
0
    arg0: Xmm,
7592
0
    arg1: &XmmMemImm,
7593
0
) -> Xmm {
7594
0
    let v5 = C::use_avx_simd(ctx);
7595
0
    if v5 == true {
7596
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpslld, arg0, arg1);
7597
0
        // Rule at src/isa/x64/inst.isle line 3786.
7598
0
        return v7;
7599
0
    }
7600
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7601
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Pslld, arg0, v3);
7602
0
    // Rule at src/isa/x64/inst.isle line 3784.
7603
0
    return v4;
7604
0
}
7605
7606
// Generated as internal constructor for term x64_psllq.
7607
0
pub fn constructor_x64_psllq<C: Context>(
7608
0
    ctx: &mut C,
7609
0
    arg0: Xmm,
7610
0
    arg1: &XmmMemImm,
7611
0
) -> Xmm {
7612
0
    let v5 = C::use_avx_simd(ctx);
7613
0
    if v5 == true {
7614
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllq, arg0, arg1);
7615
0
        // Rule at src/isa/x64/inst.isle line 3794.
7616
0
        return v7;
7617
0
    }
7618
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7619
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllq, arg0, v3);
7620
0
    // Rule at src/isa/x64/inst.isle line 3792.
7621
0
    return v4;
7622
0
}
7623
7624
// Generated as internal constructor for term x64_psrlw.
7625
0
pub fn constructor_x64_psrlw<C: Context>(
7626
0
    ctx: &mut C,
7627
0
    arg0: Xmm,
7628
0
    arg1: &XmmMemImm,
7629
0
) -> Xmm {
7630
0
    let v5 = C::use_avx_simd(ctx);
7631
0
    if v5 == true {
7632
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlw, arg0, arg1);
7633
0
        // Rule at src/isa/x64/inst.isle line 3802.
7634
0
        return v7;
7635
0
    }
7636
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7637
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlw, arg0, v3);
7638
0
    // Rule at src/isa/x64/inst.isle line 3800.
7639
0
    return v4;
7640
0
}
7641
7642
// Generated as internal constructor for term x64_psrld.
7643
0
pub fn constructor_x64_psrld<C: Context>(
7644
0
    ctx: &mut C,
7645
0
    arg0: Xmm,
7646
0
    arg1: &XmmMemImm,
7647
0
) -> Xmm {
7648
0
    let v5 = C::use_avx_simd(ctx);
7649
0
    if v5 == true {
7650
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrld, arg0, arg1);
7651
0
        // Rule at src/isa/x64/inst.isle line 3810.
7652
0
        return v7;
7653
0
    }
7654
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7655
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrld, arg0, v3);
7656
0
    // Rule at src/isa/x64/inst.isle line 3808.
7657
0
    return v4;
7658
0
}
7659
7660
// Generated as internal constructor for term x64_psrlq.
7661
0
pub fn constructor_x64_psrlq<C: Context>(
7662
0
    ctx: &mut C,
7663
0
    arg0: Xmm,
7664
0
    arg1: &XmmMemImm,
7665
0
) -> Xmm {
7666
0
    let v5 = C::use_avx_simd(ctx);
7667
0
    if v5 == true {
7668
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlq, arg0, arg1);
7669
0
        // Rule at src/isa/x64/inst.isle line 3818.
7670
0
        return v7;
7671
0
    }
7672
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7673
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlq, arg0, v3);
7674
0
    // Rule at src/isa/x64/inst.isle line 3816.
7675
0
    return v4;
7676
0
}
7677
7678
// Generated as internal constructor for term x64_psraw.
7679
0
pub fn constructor_x64_psraw<C: Context>(
7680
0
    ctx: &mut C,
7681
0
    arg0: Xmm,
7682
0
    arg1: &XmmMemImm,
7683
0
) -> Xmm {
7684
0
    let v5 = C::use_avx_simd(ctx);
7685
0
    if v5 == true {
7686
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsraw, arg0, arg1);
7687
0
        // Rule at src/isa/x64/inst.isle line 3826.
7688
0
        return v7;
7689
0
    }
7690
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7691
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psraw, arg0, v3);
7692
0
    // Rule at src/isa/x64/inst.isle line 3824.
7693
0
    return v4;
7694
0
}
7695
7696
// Generated as internal constructor for term x64_psrad.
7697
0
pub fn constructor_x64_psrad<C: Context>(
7698
0
    ctx: &mut C,
7699
0
    arg0: Xmm,
7700
0
    arg1: &XmmMemImm,
7701
0
) -> Xmm {
7702
0
    let v5 = C::use_avx_simd(ctx);
7703
0
    if v5 == true {
7704
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrad, arg0, arg1);
7705
0
        // Rule at src/isa/x64/inst.isle line 3834.
7706
0
        return v7;
7707
0
    }
7708
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
7709
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrad, arg0, v3);
7710
0
    // Rule at src/isa/x64/inst.isle line 3832.
7711
0
    return v4;
7712
0
}
7713
7714
// Generated as internal constructor for term x64_pextrb.
7715
0
pub fn constructor_x64_pextrb<C: Context>(
7716
0
    ctx: &mut C,
7717
0
    arg0: Xmm,
7718
0
    arg1: u8,
7719
0
) -> Gpr {
7720
0
    let v4 = C::use_avx_simd(ctx);
7721
0
    if v4 == true {
7722
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1);
7723
0
        // Rule at src/isa/x64/inst.isle line 3842.
7724
0
        return v6;
7725
0
    }
7726
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrb, arg0, arg1);
7727
0
    // Rule at src/isa/x64/inst.isle line 3840.
7728
0
    return v3;
7729
0
}
7730
7731
// Generated as internal constructor for term x64_pextrb_store.
7732
0
pub fn constructor_x64_pextrb_store<C: Context>(
7733
0
    ctx: &mut C,
7734
0
    arg0: &SyntheticAmode,
7735
0
    arg1: Xmm,
7736
0
    arg2: u8,
7737
0
) -> SideEffectNoResult {
7738
0
    let v5 = C::use_avx_simd(ctx);
7739
0
    if v5 == true {
7740
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1, arg2);
7741
0
        // Rule at src/isa/x64/inst.isle line 3849.
7742
0
        return v7.clone();
7743
0
    }
7744
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrb, arg0, arg1, arg2);
7745
0
    // Rule at src/isa/x64/inst.isle line 3847.
7746
0
    return v4.clone();
7747
0
}
7748
7749
// Generated as internal constructor for term x64_pextrw.
7750
0
pub fn constructor_x64_pextrw<C: Context>(
7751
0
    ctx: &mut C,
7752
0
    arg0: Xmm,
7753
0
    arg1: u8,
7754
0
) -> Gpr {
7755
0
    let v4 = C::use_avx_simd(ctx);
7756
0
    if v4 == true {
7757
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1);
7758
0
        // Rule at src/isa/x64/inst.isle line 3857.
7759
0
        return v6;
7760
0
    }
7761
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrw, arg0, arg1);
7762
0
    // Rule at src/isa/x64/inst.isle line 3855.
7763
0
    return v3;
7764
0
}
7765
7766
// Generated as internal constructor for term x64_pextrw_store.
7767
0
pub fn constructor_x64_pextrw_store<C: Context>(
7768
0
    ctx: &mut C,
7769
0
    arg0: &SyntheticAmode,
7770
0
    arg1: Xmm,
7771
0
    arg2: u8,
7772
0
) -> SideEffectNoResult {
7773
0
    let v5 = C::use_avx_simd(ctx);
7774
0
    if v5 == true {
7775
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1, arg2);
7776
0
        // Rule at src/isa/x64/inst.isle line 3864.
7777
0
        return v7.clone();
7778
0
    }
7779
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrw, arg0, arg1, arg2);
7780
0
    // Rule at src/isa/x64/inst.isle line 3862.
7781
0
    return v4.clone();
7782
0
}
7783
7784
// Generated as internal constructor for term x64_pextrd.
7785
0
pub fn constructor_x64_pextrd<C: Context>(
7786
0
    ctx: &mut C,
7787
0
    arg0: Xmm,
7788
0
    arg1: u8,
7789
0
) -> Gpr {
7790
0
    let v4 = C::use_avx_simd(ctx);
7791
0
    if v4 == true {
7792
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1);
7793
0
        // Rule at src/isa/x64/inst.isle line 3872.
7794
0
        return v6;
7795
0
    }
7796
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrd, arg0, arg1);
7797
0
    // Rule at src/isa/x64/inst.isle line 3870.
7798
0
    return v3;
7799
0
}
7800
7801
// Generated as internal constructor for term x64_pextrd_store.
7802
0
pub fn constructor_x64_pextrd_store<C: Context>(
7803
0
    ctx: &mut C,
7804
0
    arg0: &SyntheticAmode,
7805
0
    arg1: Xmm,
7806
0
    arg2: u8,
7807
0
) -> SideEffectNoResult {
7808
0
    let v5 = C::use_avx_simd(ctx);
7809
0
    if v5 == true {
7810
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1, arg2);
7811
0
        // Rule at src/isa/x64/inst.isle line 3879.
7812
0
        return v7.clone();
7813
0
    }
7814
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrd, arg0, arg1, arg2);
7815
0
    // Rule at src/isa/x64/inst.isle line 3877.
7816
0
    return v4.clone();
7817
0
}
7818
7819
// Generated as internal constructor for term x64_pextrq.
7820
0
pub fn constructor_x64_pextrq<C: Context>(
7821
0
    ctx: &mut C,
7822
0
    arg0: Xmm,
7823
0
    arg1: u8,
7824
0
) -> Gpr {
7825
0
    let v4 = C::use_avx_simd(ctx);
7826
0
    if v4 == true {
7827
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1);
7828
0
        // Rule at src/isa/x64/inst.isle line 3887.
7829
0
        return v6;
7830
0
    }
7831
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrq, arg0, arg1);
7832
0
    // Rule at src/isa/x64/inst.isle line 3885.
7833
0
    return v3;
7834
0
}
7835
7836
// Generated as internal constructor for term x64_pextrq_store.
7837
0
pub fn constructor_x64_pextrq_store<C: Context>(
7838
0
    ctx: &mut C,
7839
0
    arg0: &SyntheticAmode,
7840
0
    arg1: Xmm,
7841
0
    arg2: u8,
7842
0
) -> SideEffectNoResult {
7843
0
    let v5 = C::use_avx_simd(ctx);
7844
0
    if v5 == true {
7845
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1, arg2);
7846
0
        // Rule at src/isa/x64/inst.isle line 3894.
7847
0
        return v7.clone();
7848
0
    }
7849
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrq, arg0, arg1, arg2);
7850
0
    // Rule at src/isa/x64/inst.isle line 3892.
7851
0
    return v4.clone();
7852
0
}
7853
7854
// Generated as internal constructor for term xmm_to_gpr.
7855
0
pub fn constructor_xmm_to_gpr<C: Context>(
7856
0
    ctx: &mut C,
7857
0
    arg0: &SseOpcode,
7858
0
    arg1: Xmm,
7859
0
    arg2: &OperandSize,
7860
0
) -> Gpr {
7861
0
    let v3 = C::temp_writable_gpr(ctx);
7862
0
    let v4 = MInst::XmmToGpr {
7863
0
        op: arg0.clone(),
7864
0
        src: arg1,
7865
0
        dst: v3,
7866
0
        dst_size: arg2.clone(),
7867
0
    };
7868
0
    let v5 = C::emit(ctx, &v4);
7869
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
7870
0
    // Rule at src/isa/x64/inst.isle line 3900.
7871
0
    return v6;
7872
0
}
7873
7874
// Generated as internal constructor for term xmm_to_gpr_imm.
7875
0
pub fn constructor_xmm_to_gpr_imm<C: Context>(
7876
0
    ctx: &mut C,
7877
0
    arg0: &SseOpcode,
7878
0
    arg1: Xmm,
7879
0
    arg2: u8,
7880
0
) -> Gpr {
7881
0
    let v3 = C::temp_writable_gpr(ctx);
7882
0
    let v4 = MInst::XmmToGprImm {
7883
0
        op: arg0.clone(),
7884
0
        src: arg1,
7885
0
        dst: v3,
7886
0
        imm: arg2,
7887
0
    };
7888
0
    let v5 = C::emit(ctx, &v4);
7889
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
7890
0
    // Rule at src/isa/x64/inst.isle line 3907.
7891
0
    return v6;
7892
0
}
7893
7894
// Generated as internal constructor for term xmm_to_gpr_imm_vex.
7895
0
pub fn constructor_xmm_to_gpr_imm_vex<C: Context>(
7896
0
    ctx: &mut C,
7897
0
    arg0: &AvxOpcode,
7898
0
    arg1: Xmm,
7899
0
    arg2: u8,
7900
0
) -> Gpr {
7901
0
    let v3 = C::temp_writable_gpr(ctx);
7902
0
    let v4 = MInst::XmmToGprImmVex {
7903
0
        op: arg0.clone(),
7904
0
        src: arg1,
7905
0
        dst: v3,
7906
0
        imm: arg2,
7907
0
    };
7908
0
    let v5 = C::emit(ctx, &v4);
7909
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
7910
0
    // Rule at src/isa/x64/inst.isle line 3914.
7911
0
    return v6;
7912
0
}
7913
7914
// Generated as internal constructor for term xmm_to_gpr_vex.
7915
0
pub fn constructor_xmm_to_gpr_vex<C: Context>(
7916
0
    ctx: &mut C,
7917
0
    arg0: &AvxOpcode,
7918
0
    arg1: Xmm,
7919
0
    arg2: &OperandSize,
7920
0
) -> Gpr {
7921
0
    let v3 = C::temp_writable_gpr(ctx);
7922
0
    let v4 = MInst::XmmToGprVex {
7923
0
        op: arg0.clone(),
7924
0
        src: arg1,
7925
0
        dst: v3,
7926
0
        dst_size: arg2.clone(),
7927
0
    };
7928
0
    let v5 = C::emit(ctx, &v4);
7929
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
7930
0
    // Rule at src/isa/x64/inst.isle line 3921.
7931
0
    return v6;
7932
0
}
7933
7934
// Generated as internal constructor for term gpr_to_xmm_vex.
7935
0
pub fn constructor_gpr_to_xmm_vex<C: Context>(
7936
0
    ctx: &mut C,
7937
0
    arg0: &AvxOpcode,
7938
0
    arg1: &GprMem,
7939
0
    arg2: &OperandSize,
7940
0
) -> Xmm {
7941
0
    let v3 = C::temp_writable_xmm(ctx);
7942
0
    let v4 = MInst::GprToXmmVex {
7943
0
        op: arg0.clone(),
7944
0
        src: arg1.clone(),
7945
0
        dst: v3,
7946
0
        src_size: arg2.clone(),
7947
0
    };
7948
0
    let v5 = C::emit(ctx, &v4);
7949
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
7950
0
    // Rule at src/isa/x64/inst.isle line 3928.
7951
0
    return v6;
7952
0
}
7953
7954
// Generated as internal constructor for term x64_pmovmskb.
7955
0
pub fn constructor_x64_pmovmskb<C: Context>(
7956
0
    ctx: &mut C,
7957
0
    arg0: &OperandSize,
7958
0
    arg1: Xmm,
7959
0
) -> Gpr {
7960
0
    let v4 = C::use_avx_simd(ctx);
7961
0
    if v4 == true {
7962
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vpmovmskb, arg1, arg0);
7963
0
        // Rule at src/isa/x64/inst.isle line 3938.
7964
0
        return v6;
7965
0
    }
7966
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Pmovmskb, arg1, arg0);
7967
0
    // Rule at src/isa/x64/inst.isle line 3936.
7968
0
    return v3;
7969
0
}
7970
7971
// Generated as internal constructor for term x64_movmskps.
7972
0
pub fn constructor_x64_movmskps<C: Context>(
7973
0
    ctx: &mut C,
7974
0
    arg0: &OperandSize,
7975
0
    arg1: Xmm,
7976
0
) -> Gpr {
7977
0
    let v4 = C::use_avx_simd(ctx);
7978
0
    if v4 == true {
7979
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskps, arg1, arg0);
7980
0
        // Rule at src/isa/x64/inst.isle line 3946.
7981
0
        return v6;
7982
0
    }
7983
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskps, arg1, arg0);
7984
0
    // Rule at src/isa/x64/inst.isle line 3944.
7985
0
    return v3;
7986
0
}
7987
7988
// Generated as internal constructor for term x64_movmskpd.
7989
0
pub fn constructor_x64_movmskpd<C: Context>(
7990
0
    ctx: &mut C,
7991
0
    arg0: &OperandSize,
7992
0
    arg1: Xmm,
7993
0
) -> Gpr {
7994
0
    let v4 = C::use_avx_simd(ctx);
7995
0
    if v4 == true {
7996
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskpd, arg1, arg0);
7997
0
        // Rule at src/isa/x64/inst.isle line 3954.
7998
0
        return v6;
7999
0
    }
8000
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskpd, arg1, arg0);
8001
0
    // Rule at src/isa/x64/inst.isle line 3952.
8002
0
    return v3;
8003
0
}
8004
8005
// Generated as internal constructor for term gpr_to_xmm.
8006
0
pub fn constructor_gpr_to_xmm<C: Context>(
8007
0
    ctx: &mut C,
8008
0
    arg0: &SseOpcode,
8009
0
    arg1: &GprMem,
8010
0
    arg2: &OperandSize,
8011
0
) -> Xmm {
8012
0
    let v3 = C::temp_writable_xmm(ctx);
8013
0
    let v4 = MInst::GprToXmm {
8014
0
        op: arg0.clone(),
8015
0
        src: arg1.clone(),
8016
0
        dst: v3,
8017
0
        src_size: arg2.clone(),
8018
0
    };
8019
0
    let v5 = C::emit(ctx, &v4);
8020
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
8021
0
    // Rule at src/isa/x64/inst.isle line 3960.
8022
0
    return v6;
8023
0
}
8024
8025
// Generated as internal constructor for term x64_not.
8026
705
pub fn constructor_x64_not<C: Context>(
8027
705
    ctx: &mut C,
8028
705
    arg0: Type,
8029
705
    arg1: Gpr,
8030
705
) -> Gpr {
8031
705
    let v2 = C::temp_writable_gpr(ctx);
8032
705
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8033
705
    let v4 = MInst::Not {
8034
705
        size: v3.clone(),
8035
705
        src: arg1,
8036
705
        dst: v2,
8037
705
    };
8038
705
    let v5 = C::emit(ctx, &v4);
8039
705
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8040
705
    // Rule at src/isa/x64/inst.isle line 3967.
8041
705
    return v6;
8042
705
}
8043
8044
// Generated as internal constructor for term x64_neg.
8045
1.25k
pub fn constructor_x64_neg<C: Context>(
8046
1.25k
    ctx: &mut C,
8047
1.25k
    arg0: Type,
8048
1.25k
    arg1: Gpr,
8049
1.25k
) -> Gpr {
8050
1.25k
    let v2 = C::temp_writable_gpr(ctx);
8051
1.25k
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8052
1.25k
    let v4 = MInst::Neg {
8053
1.25k
        size: v3.clone(),
8054
1.25k
        src: arg1,
8055
1.25k
        dst: v2,
8056
1.25k
    };
8057
1.25k
    let v5 = C::emit(ctx, &v4);
8058
1.25k
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8059
1.25k
    // Rule at src/isa/x64/inst.isle line 3975.
8060
1.25k
    return v6;
8061
1.25k
}
8062
8063
// Generated as internal constructor for term x64_neg_paired.
8064
0
pub fn constructor_x64_neg_paired<C: Context>(
8065
0
    ctx: &mut C,
8066
0
    arg0: Type,
8067
0
    arg1: Gpr,
8068
0
) -> ProducesFlags {
8069
0
    let v2 = C::temp_writable_gpr(ctx);
8070
0
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8071
0
    let v5 = constructor_writable_gpr_to_r_reg(ctx, v2);
8072
0
    let v4 = MInst::Neg {
8073
0
        size: v3.clone(),
8074
0
        src: arg1,
8075
0
        dst: v2,
8076
0
    };
8077
0
    let v6 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
8078
0
        inst: v4,
8079
0
        result: v5,
8080
0
    };
8081
0
    // Rule at src/isa/x64/inst.isle line 3983.
8082
0
    return v6;
8083
0
}
8084
8085
// Generated as internal constructor for term x64_lea.
8086
0
pub fn constructor_x64_lea<C: Context>(
8087
0
    ctx: &mut C,
8088
0
    arg0: &SyntheticAmode,
8089
0
) -> Gpr {
8090
0
    let v1 = C::temp_writable_gpr(ctx);
8091
0
    let v2 = MInst::LoadEffectiveAddress {
8092
0
        addr: arg0.clone(),
8093
0
        dst: v1,
8094
0
    };
8095
0
    let v3 = C::emit(ctx, &v2);
8096
0
    let v4 = C::writable_gpr_to_gpr(ctx, v1);
8097
0
    // Rule at src/isa/x64/inst.isle line 3990.
8098
0
    return v4;
8099
0
}
8100
8101
// Generated as internal constructor for term x64_ud2.
8102
109k
pub fn constructor_x64_ud2<C: Context>(
8103
109k
    ctx: &mut C,
8104
109k
    arg0: &TrapCode,
8105
109k
) -> SideEffectNoResult {
8106
109k
    let v1 = MInst::Ud2 {
8107
109k
        trap_code: arg0.clone(),
8108
109k
    };
8109
109k
    let v2 = SideEffectNoResult::Inst {
8110
109k
        inst: v1,
8111
109k
    };
8112
109k
    // Rule at src/isa/x64/inst.isle line 3997.
8113
109k
    return v2;
8114
109k
}
8115
8116
// Generated as internal constructor for term x64_hlt.
8117
0
pub fn constructor_x64_hlt<C: Context>(
8118
0
    ctx: &mut C,
8119
0
) -> SideEffectNoResult {
8120
0
    let v1 = SideEffectNoResult::Inst {
8121
0
        inst: MInst::Hlt,
8122
0
    };
8123
0
    // Rule at src/isa/x64/inst.isle line 4002.
8124
0
    return v1;
8125
0
}
8126
8127
// Generated as internal constructor for term x64_lzcnt.
8128
139
pub fn constructor_x64_lzcnt<C: Context>(
8129
139
    ctx: &mut C,
8130
139
    arg0: Type,
8131
139
    arg1: Gpr,
8132
139
) -> Gpr {
8133
139
    let v2 = C::temp_writable_gpr(ctx);
8134
139
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8135
139
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8136
139
    let v6 = MInst::UnaryRmR {
8137
139
        size: v3.clone(),
8138
139
        op: UnaryRmROpcode::Lzcnt,
8139
139
        src: v5.clone(),
8140
139
        dst: v2,
8141
139
    };
8142
139
    let v7 = C::emit(ctx, &v6);
8143
139
    let v8 = C::writable_gpr_to_gpr(ctx, v2);
8144
139
    // Rule at src/isa/x64/inst.isle line 4007.
8145
139
    return v8;
8146
139
}
8147
8148
// Generated as internal constructor for term x64_tzcnt.
8149
123
pub fn constructor_x64_tzcnt<C: Context>(
8150
123
    ctx: &mut C,
8151
123
    arg0: Type,
8152
123
    arg1: Gpr,
8153
123
) -> Gpr {
8154
123
    let v2 = C::temp_writable_gpr(ctx);
8155
123
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8156
123
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8157
123
    let v6 = MInst::UnaryRmR {
8158
123
        size: v3.clone(),
8159
123
        op: UnaryRmROpcode::Tzcnt,
8160
123
        src: v5.clone(),
8161
123
        dst: v2,
8162
123
    };
8163
123
    let v7 = C::emit(ctx, &v6);
8164
123
    let v8 = C::writable_gpr_to_gpr(ctx, v2);
8165
123
    // Rule at src/isa/x64/inst.isle line 4015.
8166
123
    return v8;
8167
123
}
8168
8169
// Generated as internal constructor for term x64_bsr.
8170
0
pub fn constructor_x64_bsr<C: Context>(
8171
0
    ctx: &mut C,
8172
0
    arg0: Type,
8173
0
    arg1: Gpr,
8174
0
) -> ProducesFlags {
8175
0
    let v2 = C::temp_writable_gpr(ctx);
8176
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8177
0
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8178
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
8179
0
    let v6 = MInst::UnaryRmR {
8180
0
        size: v3.clone(),
8181
0
        op: UnaryRmROpcode::Bsr,
8182
0
        src: v5.clone(),
8183
0
        dst: v2,
8184
0
    };
8185
0
    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
8186
0
        inst: v6,
8187
0
        result: v7,
8188
0
    };
8189
0
    // Rule at src/isa/x64/inst.isle line 4023.
8190
0
    return v8;
8191
0
}
8192
8193
// Generated as internal constructor for term bsr_or_else.
8194
0
pub fn constructor_bsr_or_else<C: Context>(
8195
0
    ctx: &mut C,
8196
0
    arg0: Type,
8197
0
    arg1: Gpr,
8198
0
    arg2: Gpr,
8199
0
) -> Gpr {
8200
0
    let v3 = &constructor_x64_bsr(ctx, arg0, arg1);
8201
0
    let v4 = constructor_produces_flags_get_reg(ctx, v3);
8202
0
    let v5 = C::gpr_new(ctx, v4);
8203
0
    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
8204
0
    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
8205
0
    let v9 = &constructor_produces_flags_ignore(ctx, v3);
8206
0
    let v10 = constructor_with_flags_reg(ctx, v9, v8);
8207
0
    let v11 = C::gpr_new(ctx, v10);
8208
0
    // Rule at src/isa/x64/inst.isle line 4032.
8209
0
    return v11;
8210
0
}
8211
8212
// Generated as internal constructor for term x64_bsf.
8213
0
pub fn constructor_x64_bsf<C: Context>(
8214
0
    ctx: &mut C,
8215
0
    arg0: Type,
8216
0
    arg1: Gpr,
8217
0
) -> ProducesFlags {
8218
0
    let v2 = C::temp_writable_gpr(ctx);
8219
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8220
0
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8221
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
8222
0
    let v6 = MInst::UnaryRmR {
8223
0
        size: v3.clone(),
8224
0
        op: UnaryRmROpcode::Bsf,
8225
0
        src: v5.clone(),
8226
0
        dst: v2,
8227
0
    };
8228
0
    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
8229
0
        inst: v6,
8230
0
        result: v7,
8231
0
    };
8232
0
    // Rule at src/isa/x64/inst.isle line 4043.
8233
0
    return v8;
8234
0
}
8235
8236
// Generated as internal constructor for term bsf_or_else.
8237
0
pub fn constructor_bsf_or_else<C: Context>(
8238
0
    ctx: &mut C,
8239
0
    arg0: Type,
8240
0
    arg1: Gpr,
8241
0
    arg2: Gpr,
8242
0
) -> Gpr {
8243
0
    let v3 = &constructor_x64_bsf(ctx, arg0, arg1);
8244
0
    let v4 = constructor_produces_flags_get_reg(ctx, v3);
8245
0
    let v5 = C::gpr_new(ctx, v4);
8246
0
    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
8247
0
    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
8248
0
    let v9 = &constructor_produces_flags_ignore(ctx, v3);
8249
0
    let v10 = constructor_with_flags_reg(ctx, v9, v8);
8250
0
    let v11 = C::gpr_new(ctx, v10);
8251
0
    // Rule at src/isa/x64/inst.isle line 4052.
8252
0
    return v11;
8253
0
}
8254
8255
// Generated as internal constructor for term x64_popcnt.
8256
89
pub fn constructor_x64_popcnt<C: Context>(
8257
89
    ctx: &mut C,
8258
89
    arg0: Type,
8259
89
    arg1: Gpr,
8260
89
) -> Gpr {
8261
89
    let v2 = C::temp_writable_gpr(ctx);
8262
89
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8263
89
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8264
89
    let v6 = MInst::UnaryRmR {
8265
89
        size: v3.clone(),
8266
89
        op: UnaryRmROpcode::Popcnt,
8267
89
        src: v5.clone(),
8268
89
        dst: v2,
8269
89
    };
8270
89
    let v7 = C::emit(ctx, &v6);
8271
89
    let v8 = C::writable_gpr_to_gpr(ctx, v2);
8272
89
    // Rule at src/isa/x64/inst.isle line 4063.
8273
89
    return v8;
8274
89
}
8275
8276
// Generated as internal constructor for term xmm_min_max_seq.
8277
0
pub fn constructor_xmm_min_max_seq<C: Context>(
8278
0
    ctx: &mut C,
8279
0
    arg0: Type,
8280
0
    arg1: bool,
8281
0
    arg2: Xmm,
8282
0
    arg3: Xmm,
8283
0
) -> Xmm {
8284
0
    let v4 = C::temp_writable_xmm(ctx);
8285
0
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
8286
0
    let v6 = MInst::XmmMinMaxSeq {
8287
0
        size: v5.clone(),
8288
0
        is_min: arg1,
8289
0
        lhs: arg2,
8290
0
        rhs: arg3,
8291
0
        dst: v4,
8292
0
    };
8293
0
    let v7 = C::emit(ctx, &v6);
8294
0
    let v8 = C::writable_xmm_to_xmm(ctx, v4);
8295
0
    // Rule at src/isa/x64/inst.isle line 4071.
8296
0
    return v8;
8297
0
}
8298
8299
// Generated as internal constructor for term x64_minss.
8300
0
pub fn constructor_x64_minss<C: Context>(
8301
0
    ctx: &mut C,
8302
0
    arg0: Xmm,
8303
0
    arg1: &XmmMem,
8304
0
) -> Xmm {
8305
0
    let v4 = C::use_avx_simd(ctx);
8306
0
    if v4 == true {
8307
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8308
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminss, arg0, v6);
8309
0
        // Rule at src/isa/x64/inst.isle line 4081.
8310
0
        return v7;
8311
0
    }
8312
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minss, arg0, arg1);
8313
0
    // Rule at src/isa/x64/inst.isle line 4079.
8314
0
    return v3;
8315
0
}
8316
8317
// Generated as internal constructor for term x64_minsd.
8318
0
pub fn constructor_x64_minsd<C: Context>(
8319
0
    ctx: &mut C,
8320
0
    arg0: Xmm,
8321
0
    arg1: &XmmMem,
8322
0
) -> Xmm {
8323
0
    let v4 = C::use_avx_simd(ctx);
8324
0
    if v4 == true {
8325
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8326
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminsd, arg0, v6);
8327
0
        // Rule at src/isa/x64/inst.isle line 4089.
8328
0
        return v7;
8329
0
    }
8330
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minsd, arg0, arg1);
8331
0
    // Rule at src/isa/x64/inst.isle line 4087.
8332
0
    return v3;
8333
0
}
8334
8335
// Generated as internal constructor for term x64_minps.
8336
0
pub fn constructor_x64_minps<C: Context>(
8337
0
    ctx: &mut C,
8338
0
    arg0: Xmm,
8339
0
    arg1: &XmmMem,
8340
0
) -> Xmm {
8341
0
    let v5 = C::use_avx_simd(ctx);
8342
0
    if v5 == true {
8343
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8344
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminps, arg0, v7);
8345
0
        // Rule at src/isa/x64/inst.isle line 4097.
8346
0
        return v8;
8347
0
    }
8348
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8349
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minps, arg0, v3);
8350
0
    // Rule at src/isa/x64/inst.isle line 4095.
8351
0
    return v4;
8352
0
}
8353
8354
// Generated as internal constructor for term x64_minpd.
8355
0
pub fn constructor_x64_minpd<C: Context>(
8356
0
    ctx: &mut C,
8357
0
    arg0: Xmm,
8358
0
    arg1: &XmmMem,
8359
0
) -> Xmm {
8360
0
    let v5 = C::use_avx_simd(ctx);
8361
0
    if v5 == true {
8362
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8363
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminpd, arg0, v7);
8364
0
        // Rule at src/isa/x64/inst.isle line 4105.
8365
0
        return v8;
8366
0
    }
8367
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8368
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minpd, arg0, v3);
8369
0
    // Rule at src/isa/x64/inst.isle line 4103.
8370
0
    return v4;
8371
0
}
8372
8373
// Generated as internal constructor for term x64_maxss.
8374
0
pub fn constructor_x64_maxss<C: Context>(
8375
0
    ctx: &mut C,
8376
0
    arg0: Xmm,
8377
0
    arg1: &XmmMem,
8378
0
) -> Xmm {
8379
0
    let v4 = C::use_avx_simd(ctx);
8380
0
    if v4 == true {
8381
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8382
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxss, arg0, v6);
8383
0
        // Rule at src/isa/x64/inst.isle line 4113.
8384
0
        return v7;
8385
0
    }
8386
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxss, arg0, arg1);
8387
0
    // Rule at src/isa/x64/inst.isle line 4111.
8388
0
    return v3;
8389
0
}
8390
8391
// Generated as internal constructor for term x64_maxsd.
8392
0
pub fn constructor_x64_maxsd<C: Context>(
8393
0
    ctx: &mut C,
8394
0
    arg0: Xmm,
8395
0
    arg1: &XmmMem,
8396
0
) -> Xmm {
8397
0
    let v4 = C::use_avx_simd(ctx);
8398
0
    if v4 == true {
8399
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8400
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxsd, arg0, v6);
8401
0
        // Rule at src/isa/x64/inst.isle line 4121.
8402
0
        return v7;
8403
0
    }
8404
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxsd, arg0, arg1);
8405
0
    // Rule at src/isa/x64/inst.isle line 4119.
8406
0
    return v3;
8407
0
}
8408
8409
// Generated as internal constructor for term x64_maxps.
8410
0
pub fn constructor_x64_maxps<C: Context>(
8411
0
    ctx: &mut C,
8412
0
    arg0: Xmm,
8413
0
    arg1: &XmmMem,
8414
0
) -> Xmm {
8415
0
    let v5 = C::use_avx_simd(ctx);
8416
0
    if v5 == true {
8417
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8418
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxps, arg0, v7);
8419
0
        // Rule at src/isa/x64/inst.isle line 4129.
8420
0
        return v8;
8421
0
    }
8422
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8423
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxps, arg0, v3);
8424
0
    // Rule at src/isa/x64/inst.isle line 4127.
8425
0
    return v4;
8426
0
}
8427
8428
// Generated as internal constructor for term x64_maxpd.
8429
0
pub fn constructor_x64_maxpd<C: Context>(
8430
0
    ctx: &mut C,
8431
0
    arg0: Xmm,
8432
0
    arg1: &XmmMem,
8433
0
) -> Xmm {
8434
0
    let v5 = C::use_avx_simd(ctx);
8435
0
    if v5 == true {
8436
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8437
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxpd, arg0, v7);
8438
0
        // Rule at src/isa/x64/inst.isle line 4137.
8439
0
        return v8;
8440
0
    }
8441
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8442
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxpd, arg0, v3);
8443
0
    // Rule at src/isa/x64/inst.isle line 4135.
8444
0
    return v4;
8445
0
}
8446
8447
// Generated as internal constructor for term xmm_rmir_vex.
8448
0
pub fn constructor_xmm_rmir_vex<C: Context>(
8449
0
    ctx: &mut C,
8450
0
    arg0: &AvxOpcode,
8451
0
    arg1: Xmm,
8452
0
    arg2: &XmmMemImm,
8453
0
) -> Xmm {
8454
0
    let v3 = C::temp_writable_xmm(ctx);
8455
0
    let v4 = MInst::XmmRmiRVex {
8456
0
        op: arg0.clone(),
8457
0
        src1: arg1,
8458
0
        src2: arg2.clone(),
8459
0
        dst: v3,
8460
0
    };
8461
0
    let v5 = C::emit(ctx, &v4);
8462
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
8463
0
    // Rule at src/isa/x64/inst.isle line 4144.
8464
0
    return v6;
8465
0
}
8466
8467
// Generated as internal constructor for term xmm_rmr_imm_vex.
8468
0
pub fn constructor_xmm_rmr_imm_vex<C: Context>(
8469
0
    ctx: &mut C,
8470
0
    arg0: &AvxOpcode,
8471
0
    arg1: Xmm,
8472
0
    arg2: &XmmMem,
8473
0
    arg3: u8,
8474
0
) -> Xmm {
8475
0
    let v4 = C::temp_writable_xmm(ctx);
8476
0
    let v5 = MInst::XmmRmRImmVex {
8477
0
        op: arg0.clone(),
8478
0
        src1: arg1,
8479
0
        src2: arg2.clone(),
8480
0
        dst: v4,
8481
0
        imm: arg3,
8482
0
    };
8483
0
    let v6 = C::emit(ctx, &v5);
8484
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
8485
0
    // Rule at src/isa/x64/inst.isle line 4151.
8486
0
    return v7;
8487
0
}
8488
8489
// Generated as internal constructor for term xmm_rmr_vex3.
8490
0
pub fn constructor_xmm_rmr_vex3<C: Context>(
8491
0
    ctx: &mut C,
8492
0
    arg0: &AvxOpcode,
8493
0
    arg1: Xmm,
8494
0
    arg2: Xmm,
8495
0
    arg3: &XmmMem,
8496
0
) -> Xmm {
8497
0
    let v4 = C::temp_writable_xmm(ctx);
8498
0
    let v5 = MInst::XmmRmRVex3 {
8499
0
        op: arg0.clone(),
8500
0
        src1: arg1,
8501
0
        src2: arg2,
8502
0
        src3: arg3.clone(),
8503
0
        dst: v4,
8504
0
    };
8505
0
    let v6 = C::emit(ctx, &v5);
8506
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
8507
0
    // Rule at src/isa/x64/inst.isle line 4158.
8508
0
    return v7;
8509
0
}
8510
8511
// Generated as internal constructor for term x64_vfmadd213.
8512
0
pub fn constructor_x64_vfmadd213<C: Context>(
8513
0
    ctx: &mut C,
8514
0
    arg0: Type,
8515
0
    arg1: Xmm,
8516
0
    arg2: Xmm,
8517
0
    arg3: &XmmMem,
8518
0
) -> Xmm {
8519
0
    match arg0 {
8520
        F32 => {
8521
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ss, arg1, arg2, arg3);
8522
0
            // Rule at src/isa/x64/inst.isle line 4165.
8523
0
            return v5;
8524
        }
8525
        F64 => {
8526
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213sd, arg1, arg2, arg3);
8527
0
            // Rule at src/isa/x64/inst.isle line 4166.
8528
0
            return v7;
8529
        }
8530
        F32X4 => {
8531
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ps, arg1, arg2, arg3);
8532
0
            // Rule at src/isa/x64/inst.isle line 4167.
8533
0
            return v9;
8534
        }
8535
        F64X2 => {
8536
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213pd, arg1, arg2, arg3);
8537
0
            // Rule at src/isa/x64/inst.isle line 4168.
8538
0
            return v11;
8539
        }
8540
0
        _ => {}
8541
0
    }
8542
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfmadd213", "src/isa/x64/inst.isle line 4164")
8543
0
}
8544
8545
// Generated as internal constructor for term x64_vfmadd132.
8546
0
pub fn constructor_x64_vfmadd132<C: Context>(
8547
0
    ctx: &mut C,
8548
0
    arg0: Type,
8549
0
    arg1: Xmm,
8550
0
    arg2: Xmm,
8551
0
    arg3: &XmmMem,
8552
0
) -> Xmm {
8553
0
    match arg0 {
8554
        F32 => {
8555
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ss, arg1, arg2, arg3);
8556
0
            // Rule at src/isa/x64/inst.isle line 4172.
8557
0
            return v5;
8558
        }
8559
        F64 => {
8560
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132sd, arg1, arg2, arg3);
8561
0
            // Rule at src/isa/x64/inst.isle line 4173.
8562
0
            return v7;
8563
        }
8564
        F32X4 => {
8565
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ps, arg1, arg2, arg3);
8566
0
            // Rule at src/isa/x64/inst.isle line 4174.
8567
0
            return v9;
8568
        }
8569
        F64X2 => {
8570
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132pd, arg1, arg2, arg3);
8571
0
            // Rule at src/isa/x64/inst.isle line 4175.
8572
0
            return v11;
8573
        }
8574
0
        _ => {}
8575
0
    }
8576
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfmadd132", "src/isa/x64/inst.isle line 4171")
8577
0
}
8578
8579
// Generated as internal constructor for term x64_vfnmadd213.
8580
0
pub fn constructor_x64_vfnmadd213<C: Context>(
8581
0
    ctx: &mut C,
8582
0
    arg0: Type,
8583
0
    arg1: Xmm,
8584
0
    arg2: Xmm,
8585
0
    arg3: &XmmMem,
8586
0
) -> Xmm {
8587
0
    match arg0 {
8588
        F32 => {
8589
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ss, arg1, arg2, arg3);
8590
0
            // Rule at src/isa/x64/inst.isle line 4179.
8591
0
            return v5;
8592
        }
8593
        F64 => {
8594
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213sd, arg1, arg2, arg3);
8595
0
            // Rule at src/isa/x64/inst.isle line 4180.
8596
0
            return v7;
8597
        }
8598
        F32X4 => {
8599
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ps, arg1, arg2, arg3);
8600
0
            // Rule at src/isa/x64/inst.isle line 4181.
8601
0
            return v9;
8602
        }
8603
        F64X2 => {
8604
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213pd, arg1, arg2, arg3);
8605
0
            // Rule at src/isa/x64/inst.isle line 4182.
8606
0
            return v11;
8607
        }
8608
0
        _ => {}
8609
0
    }
8610
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfnmadd213", "src/isa/x64/inst.isle line 4178")
8611
0
}
8612
8613
// Generated as internal constructor for term x64_vfnmadd132.
8614
0
pub fn constructor_x64_vfnmadd132<C: Context>(
8615
0
    ctx: &mut C,
8616
0
    arg0: Type,
8617
0
    arg1: Xmm,
8618
0
    arg2: Xmm,
8619
0
    arg3: &XmmMem,
8620
0
) -> Xmm {
8621
0
    match arg0 {
8622
        F32 => {
8623
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ss, arg1, arg2, arg3);
8624
0
            // Rule at src/isa/x64/inst.isle line 4186.
8625
0
            return v5;
8626
        }
8627
        F64 => {
8628
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132sd, arg1, arg2, arg3);
8629
0
            // Rule at src/isa/x64/inst.isle line 4187.
8630
0
            return v7;
8631
        }
8632
        F32X4 => {
8633
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ps, arg1, arg2, arg3);
8634
0
            // Rule at src/isa/x64/inst.isle line 4188.
8635
0
            return v9;
8636
        }
8637
        F64X2 => {
8638
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132pd, arg1, arg2, arg3);
8639
0
            // Rule at src/isa/x64/inst.isle line 4189.
8640
0
            return v11;
8641
        }
8642
0
        _ => {}
8643
0
    }
8644
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfnmadd132", "src/isa/x64/inst.isle line 4185")
8645
0
}
8646
8647
// Generated as internal constructor for term x64_sqrtss.
8648
0
pub fn constructor_x64_sqrtss<C: Context>(
8649
0
    ctx: &mut C,
8650
0
    arg0: &XmmMem,
8651
0
) -> Xmm {
8652
0
    let v3 = C::use_avx_simd(ctx);
8653
0
    if v3 == true {
8654
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtss, arg0);
8655
0
        // Rule at src/isa/x64/inst.isle line 4194.
8656
0
        return v5;
8657
0
    }
8658
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtss, arg0);
8659
0
    // Rule at src/isa/x64/inst.isle line 4193.
8660
0
    return v2;
8661
0
}
8662
8663
// Generated as internal constructor for term x64_sqrtsd.
8664
0
pub fn constructor_x64_sqrtsd<C: Context>(
8665
0
    ctx: &mut C,
8666
0
    arg0: &XmmMem,
8667
0
) -> Xmm {
8668
0
    let v3 = C::use_avx_simd(ctx);
8669
0
    if v3 == true {
8670
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtsd, arg0);
8671
0
        // Rule at src/isa/x64/inst.isle line 4201.
8672
0
        return v5;
8673
0
    }
8674
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Sqrtsd, arg0);
8675
0
    // Rule at src/isa/x64/inst.isle line 4200.
8676
0
    return v2;
8677
0
}
8678
8679
// Generated as internal constructor for term x64_sqrtps.
8680
0
pub fn constructor_x64_sqrtps<C: Context>(
8681
0
    ctx: &mut C,
8682
0
    arg0: &XmmMem,
8683
0
) -> Xmm {
8684
0
    let v4 = C::use_avx_simd(ctx);
8685
0
    if v4 == true {
8686
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtps, arg0);
8687
0
        // Rule at src/isa/x64/inst.isle line 4208.
8688
0
        return v6;
8689
0
    }
8690
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8691
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtps, v2);
8692
0
    // Rule at src/isa/x64/inst.isle line 4207.
8693
0
    return v3;
8694
0
}
8695
8696
// Generated as internal constructor for term x64_sqrtpd.
8697
0
pub fn constructor_x64_sqrtpd<C: Context>(
8698
0
    ctx: &mut C,
8699
0
    arg0: &XmmMem,
8700
0
) -> Xmm {
8701
0
    let v4 = C::use_avx_simd(ctx);
8702
0
    if v4 == true {
8703
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtpd, arg0);
8704
0
        // Rule at src/isa/x64/inst.isle line 4215.
8705
0
        return v6;
8706
0
    }
8707
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8708
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtpd, v2);
8709
0
    // Rule at src/isa/x64/inst.isle line 4214.
8710
0
    return v3;
8711
0
}
8712
8713
// Generated as internal constructor for term x64_cvtss2sd.
8714
0
pub fn constructor_x64_cvtss2sd<C: Context>(
8715
0
    ctx: &mut C,
8716
0
    arg0: &XmmMem,
8717
0
) -> Xmm {
8718
0
    let v3 = C::use_avx_simd(ctx);
8719
0
    if v3 == true {
8720
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtss2sd, arg0);
8721
0
        // Rule at src/isa/x64/inst.isle line 4222.
8722
0
        return v5;
8723
0
    }
8724
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtss2sd, arg0);
8725
0
    // Rule at src/isa/x64/inst.isle line 4221.
8726
0
    return v2;
8727
0
}
8728
8729
// Generated as internal constructor for term x64_cvtsd2ss.
8730
0
pub fn constructor_x64_cvtsd2ss<C: Context>(
8731
0
    ctx: &mut C,
8732
0
    arg0: &XmmMem,
8733
0
) -> Xmm {
8734
0
    let v3 = C::use_avx_simd(ctx);
8735
0
    if v3 == true {
8736
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtsd2ss, arg0);
8737
0
        // Rule at src/isa/x64/inst.isle line 4229.
8738
0
        return v5;
8739
0
    }
8740
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Cvtsd2ss, arg0);
8741
0
    // Rule at src/isa/x64/inst.isle line 4228.
8742
0
    return v2;
8743
0
}
8744
8745
// Generated as internal constructor for term x64_cvtdq2ps.
8746
0
pub fn constructor_x64_cvtdq2ps<C: Context>(
8747
0
    ctx: &mut C,
8748
0
    arg0: &XmmMem,
8749
0
) -> Xmm {
8750
0
    let v4 = C::use_avx_simd(ctx);
8751
0
    if v4 == true {
8752
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2ps, arg0);
8753
0
        // Rule at src/isa/x64/inst.isle line 4236.
8754
0
        return v6;
8755
0
    }
8756
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8757
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2ps, v2);
8758
0
    // Rule at src/isa/x64/inst.isle line 4235.
8759
0
    return v3;
8760
0
}
8761
8762
// Generated as internal constructor for term x64_cvtps2pd.
8763
0
pub fn constructor_x64_cvtps2pd<C: Context>(
8764
0
    ctx: &mut C,
8765
0
    arg0: &XmmMem,
8766
0
) -> Xmm {
8767
0
    let v4 = C::use_avx_simd(ctx);
8768
0
    if v4 == true {
8769
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtps2pd, arg0);
8770
0
        // Rule at src/isa/x64/inst.isle line 4243.
8771
0
        return v6;
8772
0
    }
8773
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8774
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtps2pd, v2);
8775
0
    // Rule at src/isa/x64/inst.isle line 4242.
8776
0
    return v3;
8777
0
}
8778
8779
// Generated as internal constructor for term x64_cvtpd2ps.
8780
0
pub fn constructor_x64_cvtpd2ps<C: Context>(
8781
0
    ctx: &mut C,
8782
0
    arg0: &XmmMem,
8783
0
) -> Xmm {
8784
0
    let v4 = C::use_avx_simd(ctx);
8785
0
    if v4 == true {
8786
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtpd2ps, arg0);
8787
0
        // Rule at src/isa/x64/inst.isle line 4250.
8788
0
        return v6;
8789
0
    }
8790
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8791
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtpd2ps, v2);
8792
0
    // Rule at src/isa/x64/inst.isle line 4249.
8793
0
    return v3;
8794
0
}
8795
8796
// Generated as internal constructor for term x64_cvtdq2pd.
8797
0
pub fn constructor_x64_cvtdq2pd<C: Context>(
8798
0
    ctx: &mut C,
8799
0
    arg0: &XmmMem,
8800
0
) -> Xmm {
8801
0
    let v4 = C::use_avx_simd(ctx);
8802
0
    if v4 == true {
8803
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2pd, arg0);
8804
0
        // Rule at src/isa/x64/inst.isle line 4257.
8805
0
        return v6;
8806
0
    }
8807
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8808
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2pd, v2);
8809
0
    // Rule at src/isa/x64/inst.isle line 4256.
8810
0
    return v3;
8811
0
}
8812
8813
// Generated as internal constructor for term x64_cvtsi2ss.
8814
0
pub fn constructor_x64_cvtsi2ss<C: Context>(
8815
0
    ctx: &mut C,
8816
0
    arg0: Type,
8817
0
    arg1: &GprMem,
8818
0
) -> Xmm {
8819
0
    let v5 = C::use_avx_simd(ctx);
8820
0
    if v5 == true {
8821
0
        let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8822
0
        let v7 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vcvtsi2ss, arg1, v3);
8823
0
        // Rule at src/isa/x64/inst.isle line 4265.
8824
0
        return v7;
8825
0
    }
8826
0
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8827
0
    let v4 = constructor_gpr_to_xmm(ctx, &SseOpcode::Cvtsi2ss, arg1, v3);
8828
0
    // Rule at src/isa/x64/inst.isle line 4263.
8829
0
    return v4;
8830
0
}
8831
8832
// Generated as internal constructor for term x64_cvtsi2sd.
8833
0
pub fn constructor_x64_cvtsi2sd<C: Context>(
8834
0
    ctx: &mut C,
8835
0
    arg0: Type,
8836
0
    arg1: &GprMem,
8837
0
) -> Xmm {
8838
0
    let v5 = C::use_avx_simd(ctx);
8839
0
    if v5 == true {
8840
0
        let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8841
0
        let v7 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vcvtsi2sd, arg1, v3);
8842
0
        // Rule at src/isa/x64/inst.isle line 4273.
8843
0
        return v7;
8844
0
    }
8845
0
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8846
0
    let v4 = constructor_gpr_to_xmm(ctx, &SseOpcode::Cvtsi2sd, arg1, v3);
8847
0
    // Rule at src/isa/x64/inst.isle line 4271.
8848
0
    return v4;
8849
0
}
8850
8851
// Generated as internal constructor for term x64_cvttps2dq.
8852
0
pub fn constructor_x64_cvttps2dq<C: Context>(
8853
0
    ctx: &mut C,
8854
0
    arg0: &XmmMem,
8855
0
) -> Xmm {
8856
0
    let v4 = C::use_avx_simd(ctx);
8857
0
    if v4 == true {
8858
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttps2dq, arg0);
8859
0
        // Rule at src/isa/x64/inst.isle line 4281.
8860
0
        return v6;
8861
0
    }
8862
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8863
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttps2dq, v2);
8864
0
    // Rule at src/isa/x64/inst.isle line 4279.
8865
0
    return v3;
8866
0
}
8867
8868
// Generated as internal constructor for term x64_cvttpd2dq.
8869
0
pub fn constructor_x64_cvttpd2dq<C: Context>(
8870
0
    ctx: &mut C,
8871
0
    arg0: &XmmMem,
8872
0
) -> Xmm {
8873
0
    let v4 = C::use_avx_simd(ctx);
8874
0
    if v4 == true {
8875
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttpd2dq, arg0);
8876
0
        // Rule at src/isa/x64/inst.isle line 4289.
8877
0
        return v6;
8878
0
    }
8879
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8880
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttpd2dq, v2);
8881
0
    // Rule at src/isa/x64/inst.isle line 4287.
8882
0
    return v3;
8883
0
}
8884
8885
// Generated as internal constructor for term cvt_u64_to_float_seq.
8886
0
pub fn constructor_cvt_u64_to_float_seq<C: Context>(
8887
0
    ctx: &mut C,
8888
0
    arg0: Type,
8889
0
    arg1: Gpr,
8890
0
) -> Xmm {
8891
0
    let v2 = &C::raw_operand_size_of_type(ctx, arg0);
8892
0
    let v3 = C::temp_writable_xmm(ctx);
8893
0
    let v4 = C::temp_writable_gpr(ctx);
8894
0
    let v5 = C::temp_writable_gpr(ctx);
8895
0
    let v6 = MInst::CvtUint64ToFloatSeq {
8896
0
        dst_size: v2.clone(),
8897
0
        src: arg1,
8898
0
        dst: v3,
8899
0
        tmp_gpr1: v4,
8900
0
        tmp_gpr2: v5,
8901
0
    };
8902
0
    let v7 = C::emit(ctx, &v6);
8903
0
    let v8 = C::writable_xmm_to_xmm(ctx, v3);
8904
0
    // Rule at src/isa/x64/inst.isle line 4294.
8905
0
    return v8;
8906
0
}
8907
8908
// Generated as internal constructor for term cvt_float_to_uint_seq.
8909
0
pub fn constructor_cvt_float_to_uint_seq<C: Context>(
8910
0
    ctx: &mut C,
8911
0
    arg0: Type,
8912
0
    arg1: Value,
8913
0
    arg2: bool,
8914
0
) -> Gpr {
8915
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
8916
0
    let v2 = C::value_type(ctx, arg1);
8917
0
    let v5 = &C::raw_operand_size_of_type(ctx, v2);
8918
0
    let v6 = C::temp_writable_gpr(ctx);
8919
0
    let v7 = C::temp_writable_xmm(ctx);
8920
0
    let v8 = C::temp_writable_xmm(ctx);
8921
0
    let v9 = C::temp_writable_gpr(ctx);
8922
0
    let v10 = constructor_put_in_xmm(ctx, arg1);
8923
0
    let v11 = MInst::CvtFloatToUintSeq {
8924
0
        dst_size: v4.clone(),
8925
0
        src_size: v5.clone(),
8926
0
        is_saturating: arg2,
8927
0
        src: v10,
8928
0
        dst: v6,
8929
0
        tmp_gpr: v9,
8930
0
        tmp_xmm: v7,
8931
0
        tmp_xmm2: v8,
8932
0
    };
8933
0
    let v12 = C::emit(ctx, &v11);
8934
0
    let v13 = C::writable_gpr_to_gpr(ctx, v6);
8935
0
    // Rule at src/isa/x64/inst.isle line 4303.
8936
0
    return v13;
8937
0
}
8938
8939
// Generated as internal constructor for term cvt_float_to_sint_seq.
8940
0
pub fn constructor_cvt_float_to_sint_seq<C: Context>(
8941
0
    ctx: &mut C,
8942
0
    arg0: Type,
8943
0
    arg1: Value,
8944
0
    arg2: bool,
8945
0
) -> Gpr {
8946
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
8947
0
    let v2 = C::value_type(ctx, arg1);
8948
0
    let v5 = &C::raw_operand_size_of_type(ctx, v2);
8949
0
    let v6 = C::temp_writable_gpr(ctx);
8950
0
    let v7 = C::temp_writable_xmm(ctx);
8951
0
    let v8 = C::temp_writable_gpr(ctx);
8952
0
    let v9 = constructor_put_in_xmm(ctx, arg1);
8953
0
    let v10 = MInst::CvtFloatToSintSeq {
8954
0
        dst_size: v4.clone(),
8955
0
        src_size: v5.clone(),
8956
0
        is_saturating: arg2,
8957
0
        src: v9,
8958
0
        dst: v6,
8959
0
        tmp_gpr: v8,
8960
0
        tmp_xmm: v7,
8961
0
    };
8962
0
    let v11 = C::emit(ctx, &v10);
8963
0
    let v12 = C::writable_gpr_to_gpr(ctx, v6);
8964
0
    // Rule at src/isa/x64/inst.isle line 4315.
8965
0
    return v12;
8966
0
}
8967
8968
// Generated as internal constructor for term x64_pcmpeq.
8969
0
pub fn constructor_x64_pcmpeq<C: Context>(
8970
0
    ctx: &mut C,
8971
0
    arg0: Type,
8972
0
    arg1: Xmm,
8973
0
    arg2: &XmmMem,
8974
0
) -> Xmm {
8975
0
    match arg0 {
8976
        I8X16 => {
8977
0
            let v3 = constructor_x64_pcmpeqb(ctx, arg1, arg2);
8978
0
            // Rule at src/isa/x64/inst.isle line 4333.
8979
0
            return v3;
8980
        }
8981
        I16X8 => {
8982
0
            let v4 = constructor_x64_pcmpeqw(ctx, arg1, arg2);
8983
0
            // Rule at src/isa/x64/inst.isle line 4334.
8984
0
            return v4;
8985
        }
8986
        I32X4 => {
8987
0
            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
8988
0
            // Rule at src/isa/x64/inst.isle line 4335.
8989
0
            return v5;
8990
        }
8991
        I64X2 => {
8992
0
            let v6 = C::use_sse41(ctx);
8993
0
            if v6 == true {
8994
0
                let v7 = constructor_x64_pcmpeqq(ctx, arg1, arg2);
8995
0
                // Rule at src/isa/x64/inst.isle line 4336.
8996
0
                return v7;
8997
0
            }
8998
0
            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
8999
0
            let v8 = &C::xmm_to_xmm_mem(ctx, v5);
9000
0
            let v10 = constructor_x64_pshufd(ctx, v8, 0xB1);
9001
0
            let v11 = &C::xmm_to_xmm_mem(ctx, v10);
9002
0
            let v12 = constructor_x64_pand(ctx, v5, v11);
9003
0
            // Rule at src/isa/x64/inst.isle line 4345.
9004
0
            return v12;
9005
        }
9006
0
        _ => {}
9007
0
    }
9008
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pcmpeq", "src/isa/x64/inst.isle line 4332")
9009
0
}
9010
9011
// Generated as internal constructor for term x64_pcmpeqb.
9012
0
pub fn constructor_x64_pcmpeqb<C: Context>(
9013
0
    ctx: &mut C,
9014
0
    arg0: Xmm,
9015
0
    arg1: &XmmMem,
9016
0
) -> Xmm {
9017
0
    let v5 = C::use_avx_simd(ctx);
9018
0
    if v5 == true {
9019
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9020
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqb, arg0, v7);
9021
0
        // Rule at src/isa/x64/inst.isle line 4352.
9022
0
        return v8;
9023
0
    }
9024
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9025
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqb, arg0, v3);
9026
0
    // Rule at src/isa/x64/inst.isle line 4351.
9027
0
    return v4;
9028
0
}
9029
9030
// Generated as internal constructor for term x64_pcmpeqw.
9031
0
pub fn constructor_x64_pcmpeqw<C: Context>(
9032
0
    ctx: &mut C,
9033
0
    arg0: Xmm,
9034
0
    arg1: &XmmMem,
9035
0
) -> Xmm {
9036
0
    let v5 = C::use_avx_simd(ctx);
9037
0
    if v5 == true {
9038
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9039
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqw, arg0, v7);
9040
0
        // Rule at src/isa/x64/inst.isle line 4357.
9041
0
        return v8;
9042
0
    }
9043
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9044
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqw, arg0, v3);
9045
0
    // Rule at src/isa/x64/inst.isle line 4356.
9046
0
    return v4;
9047
0
}
9048
9049
// Generated as internal constructor for term x64_pcmpeqd.
9050
0
pub fn constructor_x64_pcmpeqd<C: Context>(
9051
0
    ctx: &mut C,
9052
0
    arg0: Xmm,
9053
0
    arg1: &XmmMem,
9054
0
) -> Xmm {
9055
0
    let v5 = C::use_avx_simd(ctx);
9056
0
    if v5 == true {
9057
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9058
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqd, arg0, v7);
9059
0
        // Rule at src/isa/x64/inst.isle line 4362.
9060
0
        return v8;
9061
0
    }
9062
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9063
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqd, arg0, v3);
9064
0
    // Rule at src/isa/x64/inst.isle line 4361.
9065
0
    return v4;
9066
0
}
9067
9068
// Generated as internal constructor for term x64_pcmpeqq.
9069
0
pub fn constructor_x64_pcmpeqq<C: Context>(
9070
0
    ctx: &mut C,
9071
0
    arg0: Xmm,
9072
0
    arg1: &XmmMem,
9073
0
) -> Xmm {
9074
0
    let v5 = C::use_avx_simd(ctx);
9075
0
    if v5 == true {
9076
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9077
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqq, arg0, v7);
9078
0
        // Rule at src/isa/x64/inst.isle line 4367.
9079
0
        return v8;
9080
0
    }
9081
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9082
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqq, arg0, v3);
9083
0
    // Rule at src/isa/x64/inst.isle line 4366.
9084
0
    return v4;
9085
0
}
9086
9087
// Generated as internal constructor for term x64_pcmpgt.
9088
0
pub fn constructor_x64_pcmpgt<C: Context>(
9089
0
    ctx: &mut C,
9090
0
    arg0: Type,
9091
0
    arg1: Xmm,
9092
0
    arg2: &XmmMem,
9093
0
) -> Xmm {
9094
0
    match arg0 {
9095
        I8X16 => {
9096
0
            let v3 = constructor_x64_pcmpgtb(ctx, arg1, arg2);
9097
0
            // Rule at src/isa/x64/inst.isle line 4373.
9098
0
            return v3;
9099
        }
9100
        I16X8 => {
9101
0
            let v4 = constructor_x64_pcmpgtw(ctx, arg1, arg2);
9102
0
            // Rule at src/isa/x64/inst.isle line 4374.
9103
0
            return v4;
9104
        }
9105
        I32X4 => {
9106
0
            let v5 = constructor_x64_pcmpgtd(ctx, arg1, arg2);
9107
0
            // Rule at src/isa/x64/inst.isle line 4375.
9108
0
            return v5;
9109
        }
9110
        I64X2 => {
9111
0
            let v6 = C::use_sse42(ctx);
9112
0
            if v6 == true {
9113
0
                let v7 = constructor_x64_pcmpgtq(ctx, arg1, arg2);
9114
0
                // Rule at src/isa/x64/inst.isle line 4379.
9115
0
                return v7;
9116
0
            }
9117
0
            let v9 = C::emit_u128_le_const(ctx, 0x800000000000000080000000);
9118
0
            let v10 = &constructor_const_to_xmm_mem(ctx, v9);
9119
0
            let v11 = constructor_x64_movdqu_load(ctx, v10);
9120
0
            let v12 = &C::xmm_to_xmm_mem(ctx, arg1);
9121
0
            let v13 = constructor_x64_pxor(ctx, v11, v12);
9122
0
            let v14 = constructor_x64_pxor(ctx, v11, arg2);
9123
0
            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
9124
0
            let v16 = constructor_x64_pcmpgtd(ctx, v13, v15);
9125
0
            let v17 = &C::xmm_to_xmm_mem(ctx, v16);
9126
0
            let v19 = constructor_x64_pshufd(ctx, v17, 0xA0);
9127
0
            let v20 = &C::xmm_to_xmm_mem(ctx, v16);
9128
0
            let v22 = constructor_x64_pshufd(ctx, v20, 0xF5);
9129
0
            let v23 = &C::xmm_to_xmm_mem(ctx, v14);
9130
0
            let v24 = constructor_x64_pcmpeqd(ctx, v13, v23);
9131
0
            let v25 = &C::xmm_to_xmm_mem(ctx, v24);
9132
0
            let v26 = constructor_x64_pshufd(ctx, v25, 0xF5);
9133
0
            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
9134
0
            let v28 = constructor_x64_pand(ctx, v19, v27);
9135
0
            let v29 = &C::xmm_to_xmm_mem(ctx, v22);
9136
0
            let v30 = constructor_x64_por(ctx, v28, v29);
9137
0
            // Rule at src/isa/x64/inst.isle line 4408.
9138
0
            return v30;
9139
        }
9140
0
        _ => {}
9141
0
    }
9142
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pcmpgt", "src/isa/x64/inst.isle line 4372")
9143
0
}
9144
9145
// Generated as internal constructor for term x64_pcmpgtb.
9146
0
pub fn constructor_x64_pcmpgtb<C: Context>(
9147
0
    ctx: &mut C,
9148
0
    arg0: Xmm,
9149
0
    arg1: &XmmMem,
9150
0
) -> Xmm {
9151
0
    let v5 = C::use_avx_simd(ctx);
9152
0
    if v5 == true {
9153
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9154
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtb, arg0, v7);
9155
0
        // Rule at src/isa/x64/inst.isle line 4424.
9156
0
        return v8;
9157
0
    }
9158
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9159
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtb, arg0, v3);
9160
0
    // Rule at src/isa/x64/inst.isle line 4423.
9161
0
    return v4;
9162
0
}
9163
9164
// Generated as internal constructor for term x64_pcmpgtw.
9165
0
pub fn constructor_x64_pcmpgtw<C: Context>(
9166
0
    ctx: &mut C,
9167
0
    arg0: Xmm,
9168
0
    arg1: &XmmMem,
9169
0
) -> Xmm {
9170
0
    let v5 = C::use_avx_simd(ctx);
9171
0
    if v5 == true {
9172
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9173
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtw, arg0, v7);
9174
0
        // Rule at src/isa/x64/inst.isle line 4429.
9175
0
        return v8;
9176
0
    }
9177
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9178
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtw, arg0, v3);
9179
0
    // Rule at src/isa/x64/inst.isle line 4428.
9180
0
    return v4;
9181
0
}
9182
9183
// Generated as internal constructor for term x64_pcmpgtd.
9184
0
pub fn constructor_x64_pcmpgtd<C: Context>(
9185
0
    ctx: &mut C,
9186
0
    arg0: Xmm,
9187
0
    arg1: &XmmMem,
9188
0
) -> Xmm {
9189
0
    let v5 = C::use_avx_simd(ctx);
9190
0
    if v5 == true {
9191
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9192
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtd, arg0, v7);
9193
0
        // Rule at src/isa/x64/inst.isle line 4434.
9194
0
        return v8;
9195
0
    }
9196
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9197
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtd, arg0, v3);
9198
0
    // Rule at src/isa/x64/inst.isle line 4433.
9199
0
    return v4;
9200
0
}
9201
9202
// Generated as internal constructor for term x64_pcmpgtq.
9203
0
pub fn constructor_x64_pcmpgtq<C: Context>(
9204
0
    ctx: &mut C,
9205
0
    arg0: Xmm,
9206
0
    arg1: &XmmMem,
9207
0
) -> Xmm {
9208
0
    let v5 = C::use_avx_simd(ctx);
9209
0
    if v5 == true {
9210
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9211
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtq, arg0, v7);
9212
0
        // Rule at src/isa/x64/inst.isle line 4439.
9213
0
        return v8;
9214
0
    }
9215
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9216
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtq, arg0, v3);
9217
0
    // Rule at src/isa/x64/inst.isle line 4438.
9218
0
    return v4;
9219
0
}
9220
9221
// Generated as internal constructor for term alu_rm.
9222
1.53k
pub fn constructor_alu_rm<C: Context>(
9223
1.53k
    ctx: &mut C,
9224
1.53k
    arg0: Type,
9225
1.53k
    arg1: &AluRmiROpcode,
9226
1.53k
    arg2: &Amode,
9227
1.53k
    arg3: Gpr,
9228
1.53k
) -> SideEffectNoResult {
9229
1.53k
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
9230
1.53k
    let v5 = &C::amode_to_synthetic_amode(ctx, arg2);
9231
1.53k
    let v6 = MInst::AluRM {
9232
1.53k
        size: v4.clone(),
9233
1.53k
        op: arg1.clone(),
9234
1.53k
        src1_dst: v5.clone(),
9235
1.53k
        src2: arg3,
9236
1.53k
    };
9237
1.53k
    let v7 = SideEffectNoResult::Inst {
9238
1.53k
        inst: v6,
9239
1.53k
    };
9240
1.53k
    // Rule at src/isa/x64/inst.isle line 4445.
9241
1.53k
    return v7;
9242
1.53k
}
9243
9244
// Generated as internal constructor for term x64_add_mem.
9245
1.53k
pub fn constructor_x64_add_mem<C: Context>(
9246
1.53k
    ctx: &mut C,
9247
1.53k
    arg0: Type,
9248
1.53k
    arg1: &Amode,
9249
1.53k
    arg2: Gpr,
9250
1.53k
) -> SideEffectNoResult {
9251
1.53k
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
9252
1.53k
    // Rule at src/isa/x64/inst.isle line 4450.
9253
1.53k
    return v4.clone();
9254
1.53k
}
9255
9256
// Generated as internal constructor for term x64_sub_mem.
9257
7
pub fn constructor_x64_sub_mem<C: Context>(
9258
7
    ctx: &mut C,
9259
7
    arg0: Type,
9260
7
    arg1: &Amode,
9261
7
    arg2: Gpr,
9262
7
) -> SideEffectNoResult {
9263
7
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
9264
7
    // Rule at src/isa/x64/inst.isle line 4454.
9265
7
    return v4.clone();
9266
7
}
9267
9268
// Generated as internal constructor for term x64_and_mem.
9269
0
pub fn constructor_x64_and_mem<C: Context>(
9270
0
    ctx: &mut C,
9271
0
    arg0: Type,
9272
0
    arg1: &Amode,
9273
0
    arg2: Gpr,
9274
0
) -> SideEffectNoResult {
9275
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
9276
0
    // Rule at src/isa/x64/inst.isle line 4458.
9277
0
    return v4.clone();
9278
0
}
9279
9280
// Generated as internal constructor for term x64_or_mem.
9281
0
pub fn constructor_x64_or_mem<C: Context>(
9282
0
    ctx: &mut C,
9283
0
    arg0: Type,
9284
0
    arg1: &Amode,
9285
0
    arg2: Gpr,
9286
0
) -> SideEffectNoResult {
9287
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
9288
0
    // Rule at src/isa/x64/inst.isle line 4462.
9289
0
    return v4.clone();
9290
0
}
9291
9292
// Generated as internal constructor for term x64_xor_mem.
9293
0
pub fn constructor_x64_xor_mem<C: Context>(
9294
0
    ctx: &mut C,
9295
0
    arg0: Type,
9296
0
    arg1: &Amode,
9297
0
    arg2: Gpr,
9298
0
) -> SideEffectNoResult {
9299
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
9300
0
    // Rule at src/isa/x64/inst.isle line 4466.
9301
0
    return v4.clone();
9302
0
}
9303
9304
// Generated as internal constructor for term trap_if.
9305
0
pub fn constructor_trap_if<C: Context>(
9306
0
    ctx: &mut C,
9307
0
    arg0: &CC,
9308
0
    arg1: &TrapCode,
9309
0
) -> ConsumesFlags {
9310
0
    let v2 = MInst::TrapIf {
9311
0
        cc: arg0.clone(),
9312
0
        trap_code: arg1.clone(),
9313
0
    };
9314
0
    let v3 = ConsumesFlags::ConsumesFlagsSideEffect {
9315
0
        inst: v2,
9316
0
    };
9317
0
    // Rule at src/isa/x64/inst.isle line 4471.
9318
0
    return v3;
9319
0
}
9320
9321
// Generated as internal constructor for term trap_if_and.
9322
0
pub fn constructor_trap_if_and<C: Context>(
9323
0
    ctx: &mut C,
9324
0
    arg0: &CC,
9325
0
    arg1: &CC,
9326
0
    arg2: &TrapCode,
9327
0
) -> ConsumesFlags {
9328
0
    let v3 = MInst::TrapIfAnd {
9329
0
        cc1: arg0.clone(),
9330
0
        cc2: arg1.clone(),
9331
0
        trap_code: arg2.clone(),
9332
0
    };
9333
0
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9334
0
        inst: v3,
9335
0
    };
9336
0
    // Rule at src/isa/x64/inst.isle line 4476.
9337
0
    return v4;
9338
0
}
9339
9340
// Generated as internal constructor for term trap_if_or.
9341
0
pub fn constructor_trap_if_or<C: Context>(
9342
0
    ctx: &mut C,
9343
0
    arg0: &CC,
9344
0
    arg1: &CC,
9345
0
    arg2: &TrapCode,
9346
0
) -> ConsumesFlags {
9347
0
    let v3 = MInst::TrapIfOr {
9348
0
        cc1: arg0.clone(),
9349
0
        cc2: arg1.clone(),
9350
0
        trap_code: arg2.clone(),
9351
0
    };
9352
0
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9353
0
        inst: v3,
9354
0
    };
9355
0
    // Rule at src/isa/x64/inst.isle line 4481.
9356
0
    return v4;
9357
0
}
9358
9359
// Generated as internal constructor for term trap_if_icmp.
9360
0
pub fn constructor_trap_if_icmp<C: Context>(
9361
0
    ctx: &mut C,
9362
0
    arg0: &IcmpCondResult,
9363
0
    arg1: &TrapCode,
9364
0
) -> SideEffectNoResult {
9365
0
    if let &IcmpCondResult::Condition {
9366
0
        producer: ref v1,
9367
0
        cc: ref v2,
9368
0
    } = arg0 {
9369
0
        let v4 = &constructor_trap_if(ctx, v2, arg1);
9370
0
        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
9371
0
        // Rule at src/isa/x64/inst.isle line 4485.
9372
0
        return v5.clone();
9373
0
    }
9374
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "trap_if_icmp", "src/isa/x64/inst.isle line 4484")
9375
0
}
9376
9377
// Generated as internal constructor for term trap_if_fcmp.
9378
0
pub fn constructor_trap_if_fcmp<C: Context>(
9379
0
    ctx: &mut C,
9380
0
    arg0: &FcmpCondResult,
9381
0
    arg1: &TrapCode,
9382
0
) -> SideEffectNoResult {
9383
0
    match arg0 {
9384
        &FcmpCondResult::Condition {
9385
0
            producer: ref v1,
9386
0
            cc: ref v2,
9387
0
        } => {
9388
0
            let v4 = &constructor_trap_if(ctx, v2, arg1);
9389
0
            let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
9390
0
            // Rule at src/isa/x64/inst.isle line 4489.
9391
0
            return v5.clone();
9392
        }
9393
        &FcmpCondResult::AndCondition {
9394
0
            producer: ref v6,
9395
0
            cc1: ref v7,
9396
0
            cc2: ref v8,
9397
0
        } => {
9398
0
            let v9 = &constructor_trap_if_and(ctx, v7, v8, arg1);
9399
0
            let v10 = &constructor_with_flags_side_effect(ctx, v6, v9);
9400
0
            // Rule at src/isa/x64/inst.isle line 4491.
9401
0
            return v10.clone();
9402
        }
9403
        &FcmpCondResult::OrCondition {
9404
0
            producer: ref v11,
9405
0
            cc1: ref v12,
9406
0
            cc2: ref v13,
9407
0
        } => {
9408
0
            let v14 = &constructor_trap_if_or(ctx, v12, v13, arg1);
9409
0
            let v15 = &constructor_with_flags_side_effect(ctx, v11, v14);
9410
0
            // Rule at src/isa/x64/inst.isle line 4493.
9411
0
            return v15.clone();
9412
        }
9413
0
        _ => {}
9414
0
    }
9415
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "trap_if_fcmp", "src/isa/x64/inst.isle line 4488")
9416
0
}
9417
9418
// Generated as internal constructor for term x64_movddup.
9419
0
pub fn constructor_x64_movddup<C: Context>(
9420
0
    ctx: &mut C,
9421
0
    arg0: &XmmMem,
9422
0
) -> Xmm {
9423
0
    let v3 = C::use_avx_simd(ctx);
9424
0
    if v3 == true {
9425
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovddup, arg0);
9426
0
        // Rule at src/isa/x64/inst.isle line 4500.
9427
0
        return v5;
9428
0
    }
9429
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movddup, arg0);
9430
0
    // Rule at src/isa/x64/inst.isle line 4498.
9431
0
    return v2;
9432
0
}
9433
9434
// Generated as internal constructor for term x64_vpbroadcastb.
9435
0
pub fn constructor_x64_vpbroadcastb<C: Context>(
9436
0
    ctx: &mut C,
9437
0
    arg0: &XmmMem,
9438
0
) -> Xmm {
9439
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastb, arg0);
9440
0
    // Rule at src/isa/x64/inst.isle line 4506.
9441
0
    return v2;
9442
0
}
9443
9444
// Generated as internal constructor for term x64_vpbroadcastw.
9445
0
pub fn constructor_x64_vpbroadcastw<C: Context>(
9446
0
    ctx: &mut C,
9447
0
    arg0: &XmmMem,
9448
0
) -> Xmm {
9449
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastw, arg0);
9450
0
    // Rule at src/isa/x64/inst.isle line 4511.
9451
0
    return v2;
9452
0
}
9453
9454
// Generated as internal constructor for term x64_vpbroadcastd.
9455
0
pub fn constructor_x64_vpbroadcastd<C: Context>(
9456
0
    ctx: &mut C,
9457
0
    arg0: &XmmMem,
9458
0
) -> Xmm {
9459
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastd, arg0);
9460
0
    // Rule at src/isa/x64/inst.isle line 4516.
9461
0
    return v2;
9462
0
}
9463
9464
// Generated as internal constructor for term x64_vbroadcastss.
9465
0
pub fn constructor_x64_vbroadcastss<C: Context>(
9466
0
    ctx: &mut C,
9467
0
    arg0: &XmmMem,
9468
0
) -> Xmm {
9469
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vbroadcastss, arg0);
9470
0
    // Rule at src/isa/x64/inst.isle line 4521.
9471
0
    return v2;
9472
0
}
9473
9474
// Generated as internal constructor for term jmp_known.
9475
197k
pub fn constructor_jmp_known<C: Context>(
9476
197k
    ctx: &mut C,
9477
197k
    arg0: MachLabel,
9478
197k
) -> SideEffectNoResult {
9479
197k
    let v1 = MInst::JmpKnown {
9480
197k
        dst: arg0,
9481
197k
    };
9482
197k
    let v2 = SideEffectNoResult::Inst {
9483
197k
        inst: v1,
9484
197k
    };
9485
197k
    // Rule at src/isa/x64/inst.isle line 4528.
9486
197k
    return v2;
9487
197k
}
9488
9489
// Generated as internal constructor for term jmp_if.
9490
0
pub fn constructor_jmp_if<C: Context>(
9491
0
    ctx: &mut C,
9492
0
    arg0: &CC,
9493
0
    arg1: MachLabel,
9494
0
) -> ConsumesFlags {
9495
0
    let v2 = MInst::JmpIf {
9496
0
        cc: arg0.clone(),
9497
0
        taken: arg1,
9498
0
    };
9499
0
    let v3 = ConsumesFlags::ConsumesFlagsSideEffect {
9500
0
        inst: v2,
9501
0
    };
9502
0
    // Rule at src/isa/x64/inst.isle line 4532.
9503
0
    return v3;
9504
0
}
9505
9506
// Generated as internal constructor for term jmp_cond.
9507
296k
pub fn constructor_jmp_cond<C: Context>(
9508
296k
    ctx: &mut C,
9509
296k
    arg0: &CC,
9510
296k
    arg1: MachLabel,
9511
296k
    arg2: MachLabel,
9512
296k
) -> ConsumesFlags {
9513
296k
    let v3 = MInst::JmpCond {
9514
296k
        cc: arg0.clone(),
9515
296k
        taken: arg1,
9516
296k
        not_taken: arg2,
9517
296k
    };
9518
296k
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9519
296k
        inst: v3,
9520
296k
    };
9521
296k
    // Rule at src/isa/x64/inst.isle line 4537.
9522
296k
    return v4;
9523
296k
}
9524
9525
// Generated as internal constructor for term jmp_cond_icmp.
9526
212k
pub fn constructor_jmp_cond_icmp<C: Context>(
9527
212k
    ctx: &mut C,
9528
212k
    arg0: &IcmpCondResult,
9529
212k
    arg1: MachLabel,
9530
212k
    arg2: MachLabel,
9531
212k
) -> SideEffectNoResult {
9532
212k
    if let &IcmpCondResult::Condition {
9533
212k
        producer: ref v1,
9534
212k
        cc: ref v2,
9535
212k
    } = arg0 {
9536
212k
        let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
9537
212k
        let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
9538
212k
        // Rule at src/isa/x64/inst.isle line 4542.
9539
212k
        return v6.clone();
9540
212k
    }
9541
212k
unreachable!("no rule matched for term {} at {}; should it be partial?", "jmp_cond_icmp", "src/isa/x64/inst.isle line 4541")
9542
212k
}
9543
9544
// Generated as internal constructor for term jmp_cond_fcmp.
9545
0
pub fn constructor_jmp_cond_fcmp<C: Context>(
9546
0
    ctx: &mut C,
9547
0
    arg0: &FcmpCondResult,
9548
0
    arg1: MachLabel,
9549
0
    arg2: MachLabel,
9550
0
) -> SideEffectNoResult {
9551
0
    match arg0 {
9552
        &FcmpCondResult::Condition {
9553
0
            producer: ref v1,
9554
0
            cc: ref v2,
9555
0
        } => {
9556
0
            let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
9557
0
            let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
9558
0
            // Rule at src/isa/x64/inst.isle line 4547.
9559
0
            return v6.clone();
9560
        }
9561
        &FcmpCondResult::AndCondition {
9562
0
            producer: ref v7,
9563
0
            cc1: ref v8,
9564
0
            cc2: ref v9,
9565
0
        } => {
9566
0
            let v10 = &C::cc_invert(ctx, v8);
9567
0
            let v11 = &constructor_jmp_if(ctx, v10, arg2);
9568
0
            let v12 = &C::cc_invert(ctx, v9);
9569
0
            let v13 = &constructor_jmp_cond(ctx, v12, arg2, arg1);
9570
0
            let v14 = &constructor_consumes_flags_concat(ctx, v11, v13);
9571
0
            let v15 = &constructor_with_flags_side_effect(ctx, v7, v14);
9572
0
            // Rule at src/isa/x64/inst.isle line 4549.
9573
0
            return v15.clone();
9574
        }
9575
        &FcmpCondResult::OrCondition {
9576
0
            producer: ref v16,
9577
0
            cc1: ref v17,
9578
0
            cc2: ref v18,
9579
0
        } => {
9580
0
            let v19 = &constructor_jmp_if(ctx, v17, arg1);
9581
0
            let v20 = &constructor_jmp_cond(ctx, v18, arg1, arg2);
9582
0
            let v21 = &constructor_consumes_flags_concat(ctx, v19, v20);
9583
0
            let v22 = &constructor_with_flags_side_effect(ctx, v16, v21);
9584
0
            // Rule at src/isa/x64/inst.isle line 4554.
9585
0
            return v22.clone();
9586
        }
9587
0
        _ => {}
9588
0
    }
9589
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "jmp_cond_fcmp", "src/isa/x64/inst.isle line 4546")
9590
0
}
9591
9592
// Generated as internal constructor for term jmp_table_seq.
9593
9.01k
pub fn constructor_jmp_table_seq<C: Context>(
9594
9.01k
    ctx: &mut C,
9595
9.01k
    arg0: Type,
9596
9.01k
    arg1: Gpr,
9597
9.01k
    arg2: MachLabel,
9598
9.01k
    arg3: &BoxVecMachLabel,
9599
9.01k
) -> SideEffectNoResult {
9600
9.01k
    let v4 = C::temp_writable_gpr(ctx);
9601
9.01k
    let v5 = C::temp_writable_gpr(ctx);
9602
9.01k
    let v6 = C::gpr_to_reg(ctx, arg1);
9603
9.01k
    let v7 = C::writable_gpr_to_reg(ctx, v4);
9604
9.01k
    let v8 = C::writable_gpr_to_reg(ctx, v5);
9605
9.01k
    let v9 = MInst::JmpTableSeq {
9606
9.01k
        idx: v6,
9607
9.01k
        tmp1: v7,
9608
9.01k
        tmp2: v8,
9609
9.01k
        default_target: arg2,
9610
9.01k
        targets: arg3.clone(),
9611
9.01k
    };
9612
9.01k
    let v10 = SideEffectNoResult::Inst {
9613
9.01k
        inst: v9,
9614
9.01k
    };
9615
9.01k
    // Rule at src/isa/x64/inst.isle line 4574.
9616
9.01k
    return v10;
9617
9.01k
}
9618
9619
// Generated as internal constructor for term icmp_cond_result.
9620
250k
pub fn constructor_icmp_cond_result<C: Context>(
9621
250k
    ctx: &mut C,
9622
250k
    arg0: &ProducesFlags,
9623
250k
    arg1: &CC,
9624
250k
) -> IcmpCondResult {
9625
250k
    let v2 = IcmpCondResult::Condition {
9626
250k
        producer: arg0.clone(),
9627
250k
        cc: arg1.clone(),
9628
250k
    };
9629
250k
    // Rule at src/isa/x64/inst.isle line 4612.
9630
250k
    return v2;
9631
250k
}
9632
9633
// Generated as internal constructor for term invert_icmp_cond_result.
9634
0
pub fn constructor_invert_icmp_cond_result<C: Context>(
9635
0
    ctx: &mut C,
9636
0
    arg0: &IcmpCondResult,
9637
0
) -> IcmpCondResult {
9638
0
    if let &IcmpCondResult::Condition {
9639
0
        producer: ref v1,
9640
0
        cc: ref v2,
9641
0
    } = arg0 {
9642
0
        let v3 = &C::cc_invert(ctx, v2);
9643
0
        let v4 = &constructor_icmp_cond_result(ctx, v1, v3);
9644
0
        // Rule at src/isa/x64/inst.isle line 4615.
9645
0
        return v4.clone();
9646
0
    }
9647
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "invert_icmp_cond_result", "src/isa/x64/inst.isle line 4614")
9648
0
}
9649
9650
// Generated as internal constructor for term lower_icmp_bool.
9651
10.7k
pub fn constructor_lower_icmp_bool<C: Context>(
9652
10.7k
    ctx: &mut C,
9653
10.7k
    arg0: &IcmpCondResult,
9654
10.7k
) -> ValueRegs {
9655
10.7k
    if let &IcmpCondResult::Condition {
9656
10.7k
        producer: ref v1,
9657
10.7k
        cc: ref v2,
9658
10.7k
    } = arg0 {
9659
10.7k
        let v3 = &constructor_x64_setcc(ctx, v2);
9660
10.7k
        let v4 = constructor_with_flags(ctx, v1, v3);
9661
10.7k
        // Rule at src/isa/x64/inst.isle line 4620.
9662
10.7k
        return v4;
9663
10.7k
    }
9664
10.7k
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_icmp_bool", "src/isa/x64/inst.isle line 4619")
9665
10.7k
}
9666
9667
// Generated as internal constructor for term select_icmp.
9668
26.3k
pub fn constructor_select_icmp<C: Context>(
9669
26.3k
    ctx: &mut C,
9670
26.3k
    arg0: &IcmpCondResult,
9671
26.3k
    arg1: Value,
9672
26.3k
    arg2: Value,
9673
26.3k
) -> ValueRegs {
9674
26.3k
    if let &IcmpCondResult::Condition {
9675
26.3k
        producer: ref v1,
9676
26.3k
        cc: ref v2,
9677
26.3k
    } = arg0 {
9678
26.3k
        let v4 = C::value_type(ctx, arg1);
9679
26.3k
        let v5 = &C::type_register_class(ctx, v4);
9680
26.3k
        if let Some(v6) = v5 {
9681
            if let &RegisterClass::Gpr {
9682
26.3k
                single_register: v7,
9683
26.3k
            } = v6 {
9684
26.3k
                if v7 == true {
9685
26.3k
                    let v9 = constructor_put_in_gpr(ctx, arg1);
9686
26.3k
                    let v10 = &C::gpr_to_gpr_mem(ctx, v9);
9687
26.3k
                    let v11 = constructor_put_in_gpr(ctx, arg2);
9688
26.3k
                    let v12 = &constructor_cmove(ctx, v4, v2, v10, v11);
9689
26.3k
                    let v13 = constructor_with_flags(ctx, v1, v12);
9690
26.3k
                    // Rule at src/isa/x64/inst.isle line 4629.
9691
26.3k
                    return v13;
9692
0
                }
9693
0
            }
9694
0
        }
9695
0
        let v14 = &constructor_cmove_from_values(ctx, v4, v2, arg1, arg2);
9696
0
        let v15 = constructor_with_flags(ctx, v1, v14);
9697
0
        // Rule at src/isa/x64/inst.isle line 4633.
9698
0
        return v15;
9699
    }
9700
unreachable!("no rule matched for term {} at {}; should it be partial?", "select_icmp", "src/isa/x64/inst.isle line 4624")
9701
26.3k
}
9702
9703
// Generated as internal constructor for term emit_cmp.
9704
250k
pub fn constructor_emit_cmp<C: Context>(
9705
250k
    ctx: &mut C,
9706
250k
    arg0: &IntCC,
9707
250k
    arg1: Value,
9708
250k
    arg2: Value,
9709
250k
) -> IcmpCondResult {
9710
250k
    let v2 = C::value_type(ctx, arg1);
9711
250k
    if v2 == I128 {
9712
0
        match arg0 {
9713
            &IntCC::Equal => {
9714
0
                let v44 = C::put_in_regs(ctx, arg1);
9715
0
                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
9716
0
                let v47 = C::put_in_regs(ctx, arg1);
9717
0
                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
9718
0
                let v50 = C::put_in_regs(ctx, arg2);
9719
0
                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
9720
0
                let v52 = C::put_in_regs(ctx, arg2);
9721
0
                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
9722
0
                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
9723
0
                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
9724
0
                let v58 = &constructor_x64_setcc(ctx, &CC::Z);
9725
0
                let v59 = constructor_with_flags_reg(ctx, v56, v58);
9726
0
                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
9727
0
                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
9728
0
                let v62 = &constructor_x64_setcc(ctx, &CC::Z);
9729
0
                let v63 = constructor_with_flags_reg(ctx, v61, v62);
9730
0
                let v65 = C::gpr_new(ctx, v59);
9731
0
                let v66 = &constructor_reg_to_gpr_mem_imm(ctx, v63);
9732
0
                let v67 = constructor_x64_and(ctx, I64, v65, v66);
9733
0
                let v68 = C::gpr_to_reg(ctx, v67);
9734
0
                let v70 = RegMemImm::Imm {
9735
0
                    simm32: 0x1,
9736
0
                };
9737
0
                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
9738
0
                let v72 = C::gpr_new(ctx, v68);
9739
0
                let v73 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v72);
9740
0
                let v75 = &constructor_icmp_cond_result(ctx, v73, &CC::NZ);
9741
0
                // Rule at src/isa/x64/inst.isle line 4665.
9742
0
                return v75.clone();
9743
            }
9744
            &IntCC::NotEqual => {
9745
0
                let v44 = C::put_in_regs(ctx, arg1);
9746
0
                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
9747
0
                let v47 = C::put_in_regs(ctx, arg1);
9748
0
                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
9749
0
                let v50 = C::put_in_regs(ctx, arg2);
9750
0
                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
9751
0
                let v52 = C::put_in_regs(ctx, arg2);
9752
0
                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
9753
0
                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
9754
0
                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
9755
0
                let v76 = &constructor_x64_setcc(ctx, &CC::NZ);
9756
0
                let v77 = constructor_with_flags_reg(ctx, v56, v76);
9757
0
                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
9758
0
                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
9759
0
                let v78 = &constructor_x64_setcc(ctx, &CC::NZ);
9760
0
                let v79 = constructor_with_flags_reg(ctx, v61, v78);
9761
0
                let v80 = C::gpr_new(ctx, v77);
9762
0
                let v81 = &constructor_reg_to_gpr_mem_imm(ctx, v79);
9763
0
                let v82 = constructor_x64_or(ctx, I64, v80, v81);
9764
0
                let v83 = C::gpr_to_reg(ctx, v82);
9765
0
                let v70 = RegMemImm::Imm {
9766
0
                    simm32: 0x1,
9767
0
                };
9768
0
                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
9769
0
                let v84 = C::gpr_new(ctx, v83);
9770
0
                let v85 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v84);
9771
0
                let v86 = &constructor_icmp_cond_result(ctx, v85, &CC::NZ);
9772
0
                // Rule at src/isa/x64/inst.isle line 4686.
9773
0
                return v86.clone();
9774
            }
9775
0
            _ => {}
9776
0
        }
9777
0
        let v44 = C::put_in_regs(ctx, arg1);
9778
0
        let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
9779
0
        let v47 = C::put_in_regs(ctx, arg1);
9780
0
        let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
9781
0
        let v50 = C::put_in_regs(ctx, arg2);
9782
0
        let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
9783
0
        let v52 = C::put_in_regs(ctx, arg2);
9784
0
        let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
9785
0
        let v87 = &C::gpr_to_gpr_mem_imm(ctx, v53);
9786
0
        let v88 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v87, v49);
9787
0
        let v89 = &C::intcc_without_eq(ctx, arg0);
9788
0
        let v90 = &C::intcc_to_cc(ctx, v89);
9789
0
        let v91 = &constructor_x64_setcc(ctx, v90);
9790
0
        let v92 = &constructor_x64_setcc(ctx, &CC::Z);
9791
0
        let v93 = &constructor_consumes_flags_concat(ctx, v91, v92);
9792
0
        let v94 = constructor_with_flags(ctx, v88, v93);
9793
0
        let v95 = C::value_regs_get(ctx, v94, 0x0);
9794
0
        let v96 = C::value_regs_get(ctx, v94, 0x1);
9795
0
        let v97 = &C::gpr_to_gpr_mem_imm(ctx, v51);
9796
0
        let v98 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v97, v46);
9797
0
        let v99 = &C::intcc_unsigned(ctx, arg0);
9798
0
        let v100 = &C::intcc_to_cc(ctx, v99);
9799
0
        let v101 = &constructor_x64_setcc(ctx, v100);
9800
0
        let v102 = constructor_with_flags_reg(ctx, v98, v101);
9801
0
        let v103 = C::gpr_new(ctx, v96);
9802
0
        let v104 = &constructor_reg_to_gpr_mem_imm(ctx, v102);
9803
0
        let v105 = constructor_x64_and(ctx, I64, v103, v104);
9804
0
        let v106 = C::gpr_to_reg(ctx, v105);
9805
0
        let v107 = C::gpr_new(ctx, v95);
9806
0
        let v108 = &constructor_reg_to_gpr_mem_imm(ctx, v106);
9807
0
        let v109 = constructor_x64_or(ctx, I64, v107, v108);
9808
0
        let v110 = C::gpr_to_reg(ctx, v109);
9809
0
        let v70 = RegMemImm::Imm {
9810
0
            simm32: 0x1,
9811
0
        };
9812
0
        let v111 = &C::gpr_mem_imm_new(ctx, &v70);
9813
0
        let v112 = C::gpr_new(ctx, v110);
9814
0
        let v113 = &constructor_x64_test(ctx, &OperandSize::Size64, v111, v112);
9815
0
        let v114 = &constructor_icmp_cond_result(ctx, v113, &CC::NZ);
9816
0
        // Rule at src/isa/x64/inst.isle line 4701.
9817
0
        return v114.clone();
9818
250k
    }
9819
250k
    let v29 = C::def_inst(ctx, arg1);
9820
250k
    if let Some(
v30234k
) = v29 {
9821
234k
        let v31 = &C::inst_data(ctx, v30);
9822
        if let &InstructionData::UnaryImm {
9823
18.4E
            opcode: ref v32,
9824
18.4E
            imm: v33,
9825
234k
        } = v31 {
9826
18.4E
            if let &Opcode::Iconst = v32 {
9827
18.4E
                let v34 = C::u64_from_imm64(ctx, v33);
9828
18.4E
                if v34 == 0x0 {
9829
0
                    let v35 = C::value_type(ctx, arg2);
9830
0
                    let v36 = &C::raw_operand_size_of_type(ctx, v35);
9831
0
                    let v37 = C::put_in_reg(ctx, arg2);
9832
0
                    let v38 = C::gpr_new(ctx, v37);
9833
0
                    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
9834
0
                    let v40 = &constructor_x64_test(ctx, v36, v39, v38);
9835
0
                    let v41 = &C::intcc_reverse(ctx, arg0);
9836
0
                    let v42 = &C::intcc_to_cc(ctx, v41);
9837
0
                    let v43 = &constructor_icmp_cond_result(ctx, v40, v42);
9838
0
                    // Rule at src/isa/x64/inst.isle line 4658.
9839
0
                    return v43.clone();
9840
0
                }
9841
0
            }
9842
234k
        }
9843
15.9k
    }
9844
250k
    let v17 = C::def_inst(ctx, arg2);
9845
250k
    if let Some(
v18244k
) = v17 {
9846
244k
        let v19 = &C::inst_data(ctx, v18);
9847
        if let &InstructionData::UnaryImm {
9848
134k
            opcode: ref v20,
9849
134k
            imm: v21,
9850
244k
        } = v19 {
9851
134k
            if let &Opcode::Iconst = v20 {
9852
134k
                let v22 = C::u64_from_imm64(ctx, v21);
9853
134k
                if v22 == 0x0 {
9854
74.5k
                    let v4 = &C::raw_operand_size_of_type(ctx, v2);
9855
74.5k
                    let v23 = C::put_in_reg(ctx, arg1);
9856
74.5k
                    let v24 = C::gpr_new(ctx, v23);
9857
74.5k
                    let v25 = &C::gpr_to_gpr_mem_imm(ctx, v24);
9858
74.5k
                    let v26 = &constructor_x64_test(ctx, v4, v25, v24);
9859
74.5k
                    let v27 = &C::intcc_to_cc(ctx, arg0);
9860
74.5k
                    let v28 = &constructor_icmp_cond_result(ctx, v26, v27);
9861
74.5k
                    // Rule at src/isa/x64/inst.isle line 4653.
9862
74.5k
                    return v28.clone();
9863
59.9k
                }
9864
0
            }
9865
109k
        }
9866
5.86k
    }
9867
175k
    let v10 = &C::simm32_from_value(ctx, arg1);
9868
175k
    if let Some(
v110
) = v10 {
9869
0
        let v4 = &C::raw_operand_size_of_type(ctx, v2);
9870
0
        let v12 = constructor_put_in_gpr(ctx, arg2);
9871
0
        let v13 = &constructor_x64_cmp(ctx, v4, v11, v12);
9872
0
        let v14 = &C::intcc_reverse(ctx, arg0);
9873
0
        let v15 = &C::intcc_to_cc(ctx, v14);
9874
0
        let v16 = &constructor_icmp_cond_result(ctx, v13, v15);
9875
0
        // Rule at src/isa/x64/inst.isle line 4648.
9876
0
        return v16.clone();
9877
175k
    }
9878
175k
    let v4 = &C::raw_operand_size_of_type(ctx, v2);
9879
175k
    let v5 = &constructor_put_in_gpr_mem_imm(ctx, arg2);
9880
175k
    let v6 = constructor_put_in_gpr(ctx, arg1);
9881
175k
    let v7 = &constructor_x64_cmp(ctx, v4, v5, v6);
9882
175k
    let v8 = &C::intcc_to_cc(ctx, arg0);
9883
175k
    let v9 = &constructor_icmp_cond_result(ctx, v7, v8);
9884
175k
    // Rule at src/isa/x64/inst.isle line 4641.
9885
175k
    return v9.clone();
9886
250k
}
9887
9888
// Generated as internal constructor for term lower_fcmp_bool.
9889
0
pub fn constructor_lower_fcmp_bool<C: Context>(
9890
0
    ctx: &mut C,
9891
0
    arg0: &FcmpCondResult,
9892
0
) -> ValueRegs {
9893
0
    match arg0 {
9894
        &FcmpCondResult::Condition {
9895
0
            producer: ref v1,
9896
0
            cc: ref v2,
9897
0
        } => {
9898
0
            let v3 = &constructor_x64_setcc(ctx, v2);
9899
0
            let v4 = constructor_with_flags(ctx, v1, v3);
9900
0
            // Rule at src/isa/x64/inst.isle line 4736.
9901
0
            return v4;
9902
        }
9903
        &FcmpCondResult::AndCondition {
9904
0
            producer: ref v5,
9905
0
            cc1: ref v6,
9906
0
            cc2: ref v7,
9907
0
        } => {
9908
0
            let v8 = &constructor_x64_setcc(ctx, v6);
9909
0
            let v9 = &constructor_x64_setcc(ctx, v7);
9910
0
            let v10 = &constructor_consumes_flags_concat(ctx, v8, v9);
9911
0
            let v11 = constructor_with_flags(ctx, v5, v10);
9912
0
            let v13 = constructor_value_regs_get_gpr(ctx, v11, 0x0);
9913
0
            let v15 = constructor_value_regs_get_gpr(ctx, v11, 0x1);
9914
0
            let v17 = &C::gpr_to_gpr_mem_imm(ctx, v15);
9915
0
            let v18 = constructor_x64_and(ctx, I8, v13, v17);
9916
0
            let v19 = C::gpr_to_reg(ctx, v18);
9917
0
            let v20 = C::value_reg(ctx, v19);
9918
0
            // Rule at src/isa/x64/inst.isle line 4739.
9919
0
            return v20;
9920
        }
9921
        &FcmpCondResult::OrCondition {
9922
0
            producer: ref v21,
9923
0
            cc1: ref v22,
9924
0
            cc2: ref v23,
9925
0
        } => {
9926
0
            let v24 = &constructor_x64_setcc(ctx, v22);
9927
0
            let v25 = &constructor_x64_setcc(ctx, v23);
9928
0
            let v26 = &constructor_consumes_flags_concat(ctx, v24, v25);
9929
0
            let v27 = constructor_with_flags(ctx, v21, v26);
9930
0
            let v28 = constructor_value_regs_get_gpr(ctx, v27, 0x0);
9931
0
            let v29 = constructor_value_regs_get_gpr(ctx, v27, 0x1);
9932
0
            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
9933
0
            let v31 = constructor_x64_or(ctx, I8, v28, v30);
9934
0
            let v32 = C::gpr_to_reg(ctx, v31);
9935
0
            let v33 = C::value_reg(ctx, v32);
9936
0
            // Rule at src/isa/x64/inst.isle line 4748.
9937
0
            return v33;
9938
        }
9939
0
        _ => {}
9940
0
    }
9941
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_fcmp_bool", "src/isa/x64/inst.isle line 4734")
9942
0
}
9943
9944
// Generated as internal constructor for term emit_fcmp.
9945
0
pub fn constructor_emit_fcmp<C: Context>(
9946
0
    ctx: &mut C,
9947
0
    arg0: &FloatCC,
9948
0
    arg1: Value,
9949
0
    arg2: Value,
9950
0
) -> FcmpCondResult {
9951
0
    match arg0 {
9952
        &FloatCC::Equal => {
9953
0
            let v2 = C::value_type(ctx, arg1);
9954
0
            let v3 = C::ty_scalar_float(ctx, v2);
9955
0
            if let Some(v4) = v3 {
9956
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
9957
0
                let v9 = FcmpCondResult::AndCondition {
9958
0
                    producer: v6.clone(),
9959
0
                    cc1: CC::NP,
9960
0
                    cc2: CC::Z,
9961
0
                };
9962
0
                // Rule at src/isa/x64/inst.isle line 4775.
9963
0
                return v9;
9964
0
            }
9965
        }
9966
        &FloatCC::GreaterThan => {
9967
0
            let v2 = C::value_type(ctx, arg1);
9968
0
            let v3 = C::ty_scalar_float(ctx, v2);
9969
0
            if let Some(v4) = v3 {
9970
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
9971
0
                let v18 = FcmpCondResult::Condition {
9972
0
                    producer: v6.clone(),
9973
0
                    cc: CC::NBE,
9974
0
                };
9975
0
                // Rule at src/isa/x64/inst.isle line 4791.
9976
0
                return v18;
9977
0
            }
9978
        }
9979
        &FloatCC::GreaterThanOrEqual => {
9980
0
            let v2 = C::value_type(ctx, arg1);
9981
0
            let v3 = C::ty_scalar_float(ctx, v2);
9982
0
            if let Some(v4) = v3 {
9983
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
9984
0
                let v20 = FcmpCondResult::Condition {
9985
0
                    producer: v6.clone(),
9986
0
                    cc: CC::NB,
9987
0
                };
9988
0
                // Rule at src/isa/x64/inst.isle line 4793.
9989
0
                return v20;
9990
0
            }
9991
        }
9992
        &FloatCC::LessThan => {
9993
0
            let v2 = C::value_type(ctx, arg1);
9994
0
            let v3 = C::ty_scalar_float(ctx, v2);
9995
0
            if let Some(v4) = v3 {
9996
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
9997
0
                let v26 = FcmpCondResult::Condition {
9998
0
                    producer: v25.clone(),
9999
0
                    cc: CC::NBE,
10000
0
                };
10001
0
                // Rule at src/isa/x64/inst.isle line 4803.
10002
0
                return v26;
10003
0
            }
10004
        }
10005
        &FloatCC::LessThanOrEqual => {
10006
0
            let v2 = C::value_type(ctx, arg1);
10007
0
            let v3 = C::ty_scalar_float(ctx, v2);
10008
0
            if let Some(v4) = v3 {
10009
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10010
0
                let v27 = FcmpCondResult::Condition {
10011
0
                    producer: v25.clone(),
10012
0
                    cc: CC::NB,
10013
0
                };
10014
0
                // Rule at src/isa/x64/inst.isle line 4806.
10015
0
                return v27;
10016
0
            }
10017
        }
10018
        &FloatCC::NotEqual => {
10019
0
            let v2 = C::value_type(ctx, arg1);
10020
0
            let v3 = C::ty_scalar_float(ctx, v2);
10021
0
            if let Some(v4) = v3 {
10022
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10023
0
                let v12 = FcmpCondResult::OrCondition {
10024
0
                    producer: v6.clone(),
10025
0
                    cc1: CC::P,
10026
0
                    cc2: CC::NZ,
10027
0
                };
10028
0
                // Rule at src/isa/x64/inst.isle line 4778.
10029
0
                return v12;
10030
0
            }
10031
        }
10032
        &FloatCC::Ordered => {
10033
0
            let v2 = C::value_type(ctx, arg1);
10034
0
            let v3 = C::ty_scalar_float(ctx, v2);
10035
0
            if let Some(v4) = v3 {
10036
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10037
0
                let v13 = FcmpCondResult::Condition {
10038
0
                    producer: v6.clone(),
10039
0
                    cc: CC::NP,
10040
0
                };
10041
0
                // Rule at src/isa/x64/inst.isle line 4783.
10042
0
                return v13;
10043
0
            }
10044
        }
10045
        &FloatCC::OrderedNotEqual => {
10046
0
            let v2 = C::value_type(ctx, arg1);
10047
0
            let v3 = C::ty_scalar_float(ctx, v2);
10048
0
            if let Some(v4) = v3 {
10049
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10050
0
                let v15 = FcmpCondResult::Condition {
10051
0
                    producer: v6.clone(),
10052
0
                    cc: CC::NZ,
10053
0
                };
10054
0
                // Rule at src/isa/x64/inst.isle line 4787.
10055
0
                return v15;
10056
0
            }
10057
        }
10058
        &FloatCC::Unordered => {
10059
0
            let v2 = C::value_type(ctx, arg1);
10060
0
            let v3 = C::ty_scalar_float(ctx, v2);
10061
0
            if let Some(v4) = v3 {
10062
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10063
0
                let v14 = FcmpCondResult::Condition {
10064
0
                    producer: v6.clone(),
10065
0
                    cc: CC::P,
10066
0
                };
10067
0
                // Rule at src/isa/x64/inst.isle line 4785.
10068
0
                return v14;
10069
0
            }
10070
        }
10071
        &FloatCC::UnorderedOrEqual => {
10072
0
            let v2 = C::value_type(ctx, arg1);
10073
0
            let v3 = C::ty_scalar_float(ctx, v2);
10074
0
            if let Some(v4) = v3 {
10075
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10076
0
                let v16 = FcmpCondResult::Condition {
10077
0
                    producer: v6.clone(),
10078
0
                    cc: CC::Z,
10079
0
                };
10080
0
                // Rule at src/isa/x64/inst.isle line 4789.
10081
0
                return v16;
10082
0
            }
10083
        }
10084
        &FloatCC::UnorderedOrGreaterThan => {
10085
0
            let v2 = C::value_type(ctx, arg1);
10086
0
            let v3 = C::ty_scalar_float(ctx, v2);
10087
0
            if let Some(v4) = v3 {
10088
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10089
0
                let v28 = FcmpCondResult::Condition {
10090
0
                    producer: v25.clone(),
10091
0
                    cc: CC::B,
10092
0
                };
10093
0
                // Rule at src/isa/x64/inst.isle line 4809.
10094
0
                return v28;
10095
0
            }
10096
        }
10097
        &FloatCC::UnorderedOrGreaterThanOrEqual => {
10098
0
            let v2 = C::value_type(ctx, arg1);
10099
0
            let v3 = C::ty_scalar_float(ctx, v2);
10100
0
            if let Some(v4) = v3 {
10101
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10102
0
                let v29 = FcmpCondResult::Condition {
10103
0
                    producer: v25.clone(),
10104
0
                    cc: CC::BE,
10105
0
                };
10106
0
                // Rule at src/isa/x64/inst.isle line 4812.
10107
0
                return v29;
10108
0
            }
10109
        }
10110
        &FloatCC::UnorderedOrLessThan => {
10111
0
            let v2 = C::value_type(ctx, arg1);
10112
0
            let v3 = C::ty_scalar_float(ctx, v2);
10113
0
            if let Some(v4) = v3 {
10114
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10115
0
                let v22 = FcmpCondResult::Condition {
10116
0
                    producer: v6.clone(),
10117
0
                    cc: CC::B,
10118
0
                };
10119
0
                // Rule at src/isa/x64/inst.isle line 4795.
10120
0
                return v22;
10121
0
            }
10122
        }
10123
        &FloatCC::UnorderedOrLessThanOrEqual => {
10124
0
            let v2 = C::value_type(ctx, arg1);
10125
0
            let v3 = C::ty_scalar_float(ctx, v2);
10126
0
            if let Some(v4) = v3 {
10127
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10128
0
                let v24 = FcmpCondResult::Condition {
10129
0
                    producer: v6.clone(),
10130
0
                    cc: CC::BE,
10131
0
                };
10132
0
                // Rule at src/isa/x64/inst.isle line 4797.
10133
0
                return v24;
10134
0
            }
10135
        }
10136
0
        _ => {}
10137
    }
10138
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "emit_fcmp", "src/isa/x64/inst.isle line 4773")
10139
0
}
10140
10141
// Generated as internal constructor for term x64_mfence.
10142
0
pub fn constructor_x64_mfence<C: Context>(
10143
0
    ctx: &mut C,
10144
0
) -> SideEffectNoResult {
10145
0
    let v1 = MInst::Fence {
10146
0
        kind: FenceKind::MFence,
10147
0
    };
10148
0
    let v2 = SideEffectNoResult::Inst {
10149
0
        inst: v1,
10150
0
    };
10151
0
    // Rule at src/isa/x64/inst.isle line 4825.
10152
0
    return v2;
10153
0
}
10154
10155
// Generated as internal constructor for term x64_cmpxchg.
10156
0
pub fn constructor_x64_cmpxchg<C: Context>(
10157
0
    ctx: &mut C,
10158
0
    arg0: Type,
10159
0
    arg1: Gpr,
10160
0
    arg2: Gpr,
10161
0
    arg3: &SyntheticAmode,
10162
0
) -> Gpr {
10163
0
    let v4 = C::temp_writable_gpr(ctx);
10164
0
    let v5 = C::gpr_to_reg(ctx, arg2);
10165
0
    let v6 = C::gpr_to_reg(ctx, arg1);
10166
0
    let v7 = C::writable_gpr_to_reg(ctx, v4);
10167
0
    let v8 = MInst::LockCmpxchg {
10168
0
        ty: arg0,
10169
0
        replacement: v5,
10170
0
        expected: v6,
10171
0
        mem: arg3.clone(),
10172
0
        dst_old: v7,
10173
0
    };
10174
0
    let v9 = C::emit(ctx, &v8);
10175
0
    let v10 = C::writable_gpr_to_gpr(ctx, v4);
10176
0
    // Rule at src/isa/x64/inst.isle line 4829.
10177
0
    return v10;
10178
0
}
10179
10180
// Generated as internal constructor for term x64_atomic_rmw_seq.
10181
0
pub fn constructor_x64_atomic_rmw_seq<C: Context>(
10182
0
    ctx: &mut C,
10183
0
    arg0: Type,
10184
0
    arg1: &MachAtomicRmwOp,
10185
0
    arg2: &SyntheticAmode,
10186
0
    arg3: Gpr,
10187
0
) -> Gpr {
10188
0
    let v4 = C::temp_writable_gpr(ctx);
10189
0
    let v5 = C::temp_writable_gpr(ctx);
10190
0
    let v6 = C::gpr_to_reg(ctx, arg3);
10191
0
    let v7 = C::writable_gpr_to_reg(ctx, v5);
10192
0
    let v8 = C::writable_gpr_to_reg(ctx, v4);
10193
0
    let v9 = MInst::AtomicRmwSeq {
10194
0
        ty: arg0,
10195
0
        op: arg1.clone(),
10196
0
        mem: arg2.clone(),
10197
0
        operand: v6,
10198
0
        temp: v7,
10199
0
        dst_old: v8,
10200
0
    };
10201
0
    let v10 = C::emit(ctx, &v9);
10202
0
    let v11 = C::writable_gpr_to_gpr(ctx, v4);
10203
0
    // Rule at src/isa/x64/inst.isle line 4835.
10204
0
    return v11;
10205
0
}
10206
10207
// Generated as internal constructor for term bitcast_xmm_to_gpr.
10208
0
pub fn constructor_bitcast_xmm_to_gpr<C: Context>(
10209
0
    ctx: &mut C,
10210
0
    arg0: Type,
10211
0
    arg1: Xmm,
10212
0
) -> Gpr {
10213
0
    match arg0 {
10214
        F32 => {
10215
0
            let v2 = constructor_x64_movd_to_gpr(ctx, arg1);
10216
0
            // Rule at src/isa/x64/inst.isle line 4850.
10217
0
            return v2;
10218
        }
10219
        F64 => {
10220
0
            let v3 = constructor_x64_movq_to_gpr(ctx, arg1);
10221
0
            // Rule at src/isa/x64/inst.isle line 4852.
10222
0
            return v3;
10223
        }
10224
0
        _ => {}
10225
0
    }
10226
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "bitcast_xmm_to_gpr", "src/isa/x64/inst.isle line 4849")
10227
0
}
10228
10229
// Generated as internal constructor for term bitcast_gpr_to_xmm.
10230
0
pub fn constructor_bitcast_gpr_to_xmm<C: Context>(
10231
0
    ctx: &mut C,
10232
0
    arg0: Type,
10233
0
    arg1: Gpr,
10234
0
) -> Xmm {
10235
0
    match arg0 {
10236
        I32 => {
10237
0
            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
10238
0
            let v3 = constructor_x64_movd_to_xmm(ctx, v2);
10239
0
            // Rule at src/isa/x64/inst.isle line 4856.
10240
0
            return v3;
10241
        }
10242
        I64 => {
10243
0
            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
10244
0
            let v4 = constructor_x64_movq_to_xmm(ctx, v2);
10245
0
            // Rule at src/isa/x64/inst.isle line 4858.
10246
0
            return v4;
10247
        }
10248
0
        _ => {}
10249
0
    }
10250
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "bitcast_gpr_to_xmm", "src/isa/x64/inst.isle line 4855")
10251
0
}
10252
10253
// Generated as internal constructor for term stack_addr_impl.
10254
474
pub fn constructor_stack_addr_impl<C: Context>(
10255
474
    ctx: &mut C,
10256
474
    arg0: StackSlot,
10257
474
    arg1: Offset32,
10258
474
) -> Gpr {
10259
474
    let v2 = C::temp_writable_gpr(ctx);
10260
474
    let v3 = C::writable_gpr_to_reg(ctx, v2);
10261
474
    let v4 = &C::abi_stackslot_addr(ctx, v3, arg0, arg1);
10262
474
    let v5 = C::emit(ctx, v4);
10263
474
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
10264
474
    // Rule at src/isa/x64/inst.isle line 4864.
10265
474
    return v6;
10266
474
}
10267
10268
// Generated as internal constructor for term x64_checked_srem_seq.
10269
0
pub fn constructor_x64_checked_srem_seq<C: Context>(
10270
0
    ctx: &mut C,
10271
0
    arg0: &OperandSize,
10272
0
    arg1: Gpr,
10273
0
    arg2: Gpr,
10274
0
    arg3: Gpr,
10275
0
) -> ValueRegs {
10276
0
    let v4 = C::temp_writable_gpr(ctx);
10277
0
    let v5 = C::temp_writable_gpr(ctx);
10278
0
    let v6 = MInst::CheckedSRemSeq {
10279
0
        size: arg0.clone(),
10280
0
        dividend_lo: arg1,
10281
0
        dividend_hi: arg2,
10282
0
        divisor: arg3,
10283
0
        dst_quotient: v4,
10284
0
        dst_remainder: v5,
10285
0
    };
10286
0
    let v7 = C::emit(ctx, &v6);
10287
0
    let v8 = constructor_writable_gpr_to_r_reg(ctx, v4);
10288
0
    let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
10289
0
    let v10 = C::value_regs(ctx, v8, v9);
10290
0
    // Rule at src/isa/x64/inst.isle line 4873.
10291
0
    return v10;
10292
0
}
10293
10294
// Generated as internal constructor for term x64_checked_srem_seq8.
10295
0
pub fn constructor_x64_checked_srem_seq8<C: Context>(
10296
0
    ctx: &mut C,
10297
0
    arg0: Gpr,
10298
0
    arg1: Gpr,
10299
0
) -> Gpr {
10300
0
    let v2 = C::temp_writable_gpr(ctx);
10301
0
    let v3 = MInst::CheckedSRemSeq8 {
10302
0
        dividend: arg0,
10303
0
        divisor: arg1,
10304
0
        dst: v2,
10305
0
    };
10306
0
    let v4 = C::emit(ctx, &v3);
10307
0
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
10308
0
    // Rule at src/isa/x64/inst.isle line 4880.
10309
0
    return v5;
10310
0
}
10311
10312
// Generated as internal constructor for term x64_div8.
10313
0
pub fn constructor_x64_div8<C: Context>(
10314
0
    ctx: &mut C,
10315
0
    arg0: Gpr,
10316
0
    arg1: &GprMem,
10317
0
    arg2: &DivSignedness,
10318
0
    arg3: &TrapCode,
10319
0
) -> Gpr {
10320
0
    let v4 = C::temp_writable_gpr(ctx);
10321
0
    let v5 = MInst::Div8 {
10322
0
        sign: arg2.clone(),
10323
0
        trap: arg3.clone(),
10324
0
        divisor: arg1.clone(),
10325
0
        dividend: arg0,
10326
0
        dst: v4,
10327
0
    };
10328
0
    let v6 = C::emit(ctx, &v5);
10329
0
    let v7 = C::writable_gpr_to_gpr(ctx, v4);
10330
0
    // Rule at src/isa/x64/inst.isle line 4887.
10331
0
    return v7;
10332
0
}
10333
10334
// Generated as internal constructor for term x64_div.
10335
1.88k
pub fn constructor_x64_div<C: Context>(
10336
1.88k
    ctx: &mut C,
10337
1.88k
    arg0: Gpr,
10338
1.88k
    arg1: Gpr,
10339
1.88k
    arg2: &GprMem,
10340
1.88k
    arg3: &OperandSize,
10341
1.88k
    arg4: &DivSignedness,
10342
1.88k
    arg5: &TrapCode,
10343
1.88k
) -> ValueRegs {
10344
1.88k
    let v6 = C::temp_writable_gpr(ctx);
10345
1.88k
    let v7 = C::temp_writable_gpr(ctx);
10346
1.88k
    let v8 = MInst::Div {
10347
1.88k
        size: arg3.clone(),
10348
1.88k
        sign: arg4.clone(),
10349
1.88k
        trap: arg5.clone(),
10350
1.88k
        divisor: arg2.clone(),
10351
1.88k
        dividend_lo: arg0,
10352
1.88k
        dividend_hi: arg1,
10353
1.88k
        dst_quotient: v6,
10354
1.88k
        dst_remainder: v7,
10355
1.88k
    };
10356
1.88k
    let v9 = C::emit(ctx, &v8);
10357
1.88k
    let v10 = constructor_writable_gpr_to_r_reg(ctx, v6);
10358
1.88k
    let v11 = constructor_writable_gpr_to_r_reg(ctx, v7);
10359
1.88k
    let v12 = C::value_regs(ctx, v10, v11);
10360
1.88k
    // Rule at src/isa/x64/inst.isle line 4897.
10361
1.88k
    return v12;
10362
1.88k
}
10363
10364
// Generated as internal constructor for term x64_div_quotient.
10365
1.64k
pub fn constructor_x64_div_quotient<C: Context>(
10366
1.64k
    ctx: &mut C,
10367
1.64k
    arg0: Gpr,
10368
1.64k
    arg1: Gpr,
10369
1.64k
    arg2: &GprMem,
10370
1.64k
    arg3: &OperandSize,
10371
1.64k
    arg4: &DivSignedness,
10372
1.64k
    arg5: &TrapCode,
10373
1.64k
) -> ValueRegs {
10374
1.64k
    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
10375
1.64k
    let v8 = C::value_regs_get(ctx, v6, 0x0);
10376
1.64k
    let v9 = C::value_reg(ctx, v8);
10377
1.64k
    // Rule at src/isa/x64/inst.isle line 4905.
10378
1.64k
    return v9;
10379
1.64k
}
10380
10381
// Generated as internal constructor for term x64_div_remainder.
10382
246
pub fn constructor_x64_div_remainder<C: Context>(
10383
246
    ctx: &mut C,
10384
246
    arg0: Gpr,
10385
246
    arg1: Gpr,
10386
246
    arg2: &GprMem,
10387
246
    arg3: &OperandSize,
10388
246
    arg4: &DivSignedness,
10389
246
    arg5: &TrapCode,
10390
246
) -> ValueRegs {
10391
246
    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
10392
246
    let v8 = C::value_regs_get(ctx, v6, 0x1);
10393
246
    let v9 = C::value_reg(ctx, v8);
10394
246
    // Rule at src/isa/x64/inst.isle line 4910.
10395
246
    return v9;
10396
246
}
10397
10398
// Generated as internal constructor for term x64_sign_extend_data.
10399
212
pub fn constructor_x64_sign_extend_data<C: Context>(
10400
212
    ctx: &mut C,
10401
212
    arg0: Gpr,
10402
212
    arg1: &OperandSize,
10403
212
) -> Gpr {
10404
212
    let v2 = C::temp_writable_gpr(ctx);
10405
212
    let v3 = MInst::SignExtendData {
10406
212
        size: arg1.clone(),
10407
212
        src: arg0,
10408
212
        dst: v2,
10409
212
    };
10410
212
    let v4 = C::emit(ctx, &v3);
10411
212
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
10412
212
    // Rule at src/isa/x64/inst.isle line 4915.
10413
212
    return v5;
10414
212
}
10415
10416
// Generated as internal constructor for term read_pinned_gpr.
10417
0
pub fn constructor_read_pinned_gpr<C: Context>(
10418
0
    ctx: &mut C,
10419
0
) -> Gpr {
10420
0
    let v0 = C::preg_pinned(ctx);
10421
0
    let v1 = constructor_mov_from_preg(ctx, v0);
10422
0
    let v2 = C::gpr_new(ctx, v1);
10423
0
    // Rule at src/isa/x64/inst.isle line 4923.
10424
0
    return v2;
10425
0
}
10426
10427
// Generated as internal constructor for term write_pinned_gpr.
10428
0
pub fn constructor_write_pinned_gpr<C: Context>(
10429
0
    ctx: &mut C,
10430
0
    arg0: Gpr,
10431
0
) -> SideEffectNoResult {
10432
0
    let v1 = C::preg_pinned(ctx);
10433
0
    let v2 = &constructor_mov_to_preg(ctx, v1, arg0);
10434
0
    // Rule at src/isa/x64/inst.isle line 4927.
10435
0
    return v2.clone();
10436
0
}
10437
10438
// Generated as internal constructor for term elf_tls_get_addr.
10439
0
pub fn constructor_elf_tls_get_addr<C: Context>(
10440
0
    ctx: &mut C,
10441
0
    arg0: ExternalName,
10442
0
) -> Gpr {
10443
0
    let v1 = C::temp_writable_gpr(ctx);
10444
0
    let v2 = MInst::ElfTlsGetAddr {
10445
0
        symbol: arg0,
10446
0
        dst: v1,
10447
0
    };
10448
0
    let v3 = C::emit(ctx, &v2);
10449
0
    let v4 = C::writable_gpr_to_gpr(ctx, v1);
10450
0
    // Rule at src/isa/x64/inst.isle line 4975.
10451
0
    return v4;
10452
0
}
10453
10454
// Generated as internal constructor for term macho_tls_get_addr.
10455
0
pub fn constructor_macho_tls_get_addr<C: Context>(
10456
0
    ctx: &mut C,
10457
0
    arg0: ExternalName,
10458
0
) -> Gpr {
10459
0
    let v1 = C::temp_writable_gpr(ctx);
10460
0
    let v2 = MInst::MachOTlsGetAddr {
10461
0
        symbol: arg0,
10462
0
        dst: v1,
10463
0
    };
10464
0
    let v3 = C::emit(ctx, &v2);
10465
0
    let v4 = C::writable_gpr_to_gpr(ctx, v1);
10466
0
    // Rule at src/isa/x64/inst.isle line 4982.
10467
0
    return v4;
10468
0
}
10469
10470
// Generated as internal constructor for term coff_tls_get_addr.
10471
0
pub fn constructor_coff_tls_get_addr<C: Context>(
10472
0
    ctx: &mut C,
10473
0
    arg0: ExternalName,
10474
0
) -> Gpr {
10475
0
    let v1 = C::temp_writable_gpr(ctx);
10476
0
    let v2 = C::temp_writable_gpr(ctx);
10477
0
    let v3 = MInst::CoffTlsGetAddr {
10478
0
        symbol: arg0,
10479
0
        dst: v1,
10480
0
        tmp: v2,
10481
0
    };
10482
0
    let v4 = C::emit(ctx, &v3);
10483
0
    let v5 = C::writable_gpr_to_gpr(ctx, v1);
10484
0
    // Rule at src/isa/x64/inst.isle line 4989.
10485
0
    return v5;
10486
0
}
10487
10488
// Generated as internal constructor for term reg_to_xmm_mem.
10489
0
pub fn constructor_reg_to_xmm_mem<C: Context>(
10490
0
    ctx: &mut C,
10491
0
    arg0: Reg,
10492
0
) -> XmmMem {
10493
0
    let v1 = C::xmm_new(ctx, arg0);
10494
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
10495
0
    // Rule at src/isa/x64/inst.isle line 5088.
10496
0
    return v2.clone();
10497
0
}
10498
10499
// Generated as internal constructor for term xmm_to_reg_mem.
10500
0
pub fn constructor_xmm_to_reg_mem<C: Context>(
10501
0
    ctx: &mut C,
10502
0
    arg0: Reg,
10503
0
) -> XmmMem {
10504
0
    let v1 = C::xmm_new(ctx, arg0);
10505
0
    let v2 = C::xmm_to_reg(ctx, v1);
10506
0
    let v3 = RegMem::Reg {
10507
0
        reg: v2,
10508
0
    };
10509
0
    let v4 = &C::reg_mem_to_xmm_mem(ctx, &v3);
10510
0
    // Rule at src/isa/x64/inst.isle line 5091.
10511
0
    return v4.clone();
10512
0
}
10513
10514
// Generated as internal constructor for term writable_gpr_to_r_reg.
10515
703k
pub fn constructor_writable_gpr_to_r_reg<C: Context>(
10516
703k
    ctx: &mut C,
10517
703k
    arg0: WritableGpr,
10518
703k
) -> Reg {
10519
703k
    let v1 = C::writable_gpr_to_reg(ctx, arg0);
10520
703k
    let v2 = C::writable_reg_to_reg(ctx, v1);
10521
703k
    // Rule at src/isa/x64/inst.isle line 5095.
10522
703k
    return v2;
10523
703k
}
10524
10525
// Generated as internal constructor for term writable_gpr_to_gpr_mem.
10526
0
pub fn constructor_writable_gpr_to_gpr_mem<C: Context>(
10527
0
    ctx: &mut C,
10528
0
    arg0: WritableGpr,
10529
0
) -> GprMem {
10530
0
    let v1 = C::writable_gpr_to_gpr(ctx, arg0);
10531
0
    let v2 = &C::gpr_to_gpr_mem(ctx, v1);
10532
0
    // Rule at src/isa/x64/inst.isle line 5098.
10533
0
    return v2.clone();
10534
0
}
10535
10536
// Generated as internal constructor for term writable_gpr_to_value_regs.
10537
0
pub fn constructor_writable_gpr_to_value_regs<C: Context>(
10538
0
    ctx: &mut C,
10539
0
    arg0: WritableGpr,
10540
0
) -> ValueRegs {
10541
0
    let v1 = constructor_writable_gpr_to_r_reg(ctx, arg0);
10542
0
    let v2 = C::value_reg(ctx, v1);
10543
0
    // Rule at src/isa/x64/inst.isle line 5101.
10544
0
    return v2;
10545
0
}
10546
10547
// Generated as internal constructor for term writable_xmm_to_r_reg.
10548
0
pub fn constructor_writable_xmm_to_r_reg<C: Context>(
10549
0
    ctx: &mut C,
10550
0
    arg0: WritableXmm,
10551
0
) -> Reg {
10552
0
    let v1 = C::writable_xmm_to_reg(ctx, arg0);
10553
0
    let v2 = C::writable_reg_to_reg(ctx, v1);
10554
0
    // Rule at src/isa/x64/inst.isle line 5104.
10555
0
    return v2;
10556
0
}
10557
10558
// Generated as internal constructor for term writable_xmm_to_xmm_mem.
10559
0
pub fn constructor_writable_xmm_to_xmm_mem<C: Context>(
10560
0
    ctx: &mut C,
10561
0
    arg0: WritableXmm,
10562
0
) -> XmmMem {
10563
0
    let v1 = C::writable_xmm_to_xmm(ctx, arg0);
10564
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
10565
0
    // Rule at src/isa/x64/inst.isle line 5107.
10566
0
    return v2.clone();
10567
0
}
10568
10569
// Generated as internal constructor for term writable_xmm_to_value_regs.
10570
0
pub fn constructor_writable_xmm_to_value_regs<C: Context>(
10571
0
    ctx: &mut C,
10572
0
    arg0: WritableXmm,
10573
0
) -> ValueRegs {
10574
0
    let v1 = constructor_writable_xmm_to_r_reg(ctx, arg0);
10575
0
    let v2 = C::value_reg(ctx, v1);
10576
0
    // Rule at src/isa/x64/inst.isle line 5110.
10577
0
    return v2;
10578
0
}
10579
10580
// Generated as internal constructor for term synthetic_amode_to_gpr_mem.
10581
412k
pub fn constructor_synthetic_amode_to_gpr_mem<C: Context>(
10582
412k
    ctx: &mut C,
10583
412k
    arg0: &SyntheticAmode,
10584
412k
) -> GprMem {
10585
412k
    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
10586
412k
    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
10587
412k
    // Rule at src/isa/x64/inst.isle line 5117.
10588
412k
    return v2.clone();
10589
412k
}
10590
10591
// Generated as internal constructor for term amode_to_gpr_mem.
10592
412k
pub fn constructor_amode_to_gpr_mem<C: Context>(
10593
412k
    ctx: &mut C,
10594
412k
    arg0: &Amode,
10595
412k
) -> GprMem {
10596
412k
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
10597
412k
    let v2 = &constructor_synthetic_amode_to_gpr_mem(ctx, v1);
10598
412k
    // Rule at src/isa/x64/inst.isle line 5115.
10599
412k
    return v2.clone();
10600
412k
}
10601
10602
// Generated as internal constructor for term amode_to_xmm_mem.
10603
0
pub fn constructor_amode_to_xmm_mem<C: Context>(
10604
0
    ctx: &mut C,
10605
0
    arg0: &Amode,
10606
0
) -> XmmMem {
10607
0
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
10608
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
10609
0
    // Rule at src/isa/x64/inst.isle line 5120.
10610
0
    return v2.clone();
10611
0
}
10612
10613
// Generated as internal constructor for term synthetic_amode_to_xmm_mem.
10614
0
pub fn constructor_synthetic_amode_to_xmm_mem<C: Context>(
10615
0
    ctx: &mut C,
10616
0
    arg0: &SyntheticAmode,
10617
0
) -> XmmMem {
10618
0
    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
10619
0
    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
10620
0
    // Rule at src/isa/x64/inst.isle line 5123.
10621
0
    return v2.clone();
10622
0
}
10623
10624
// Generated as internal constructor for term const_to_xmm_mem.
10625
0
pub fn constructor_const_to_xmm_mem<C: Context>(
10626
0
    ctx: &mut C,
10627
0
    arg0: VCodeConstant,
10628
0
) -> XmmMem {
10629
0
    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
10630
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
10631
0
    // Rule at src/isa/x64/inst.isle line 5128.
10632
0
    return v2.clone();
10633
0
}
10634
10635
// Generated as internal constructor for term xmm_to_xmm_mem_aligned.
10636
0
pub fn constructor_xmm_to_xmm_mem_aligned<C: Context>(
10637
0
    ctx: &mut C,
10638
0
    arg0: Xmm,
10639
0
) -> XmmMemAligned {
10640
0
    let v1 = &C::xmm_to_xmm_mem(ctx, arg0);
10641
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10642
0
    // Rule at src/isa/x64/inst.isle line 5131.
10643
0
    return v2.clone();
10644
0
}
10645
10646
// Generated as internal constructor for term amode_to_xmm_mem_aligned.
10647
0
pub fn constructor_amode_to_xmm_mem_aligned<C: Context>(
10648
0
    ctx: &mut C,
10649
0
    arg0: &Amode,
10650
0
) -> XmmMemAligned {
10651
0
    let v1 = &constructor_amode_to_xmm_mem(ctx, arg0);
10652
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10653
0
    // Rule at src/isa/x64/inst.isle line 5133.
10654
0
    return v2.clone();
10655
0
}
10656
10657
// Generated as internal constructor for term synthetic_amode_to_xmm_mem_aligned.
10658
0
pub fn constructor_synthetic_amode_to_xmm_mem_aligned<C: Context>(
10659
0
    ctx: &mut C,
10660
0
    arg0: &SyntheticAmode,
10661
0
) -> XmmMemAligned {
10662
0
    let v1 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
10663
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10664
0
    // Rule at src/isa/x64/inst.isle line 5135.
10665
0
    return v2.clone();
10666
0
}
10667
10668
// Generated as internal constructor for term put_in_xmm_mem_aligned.
10669
0
pub fn constructor_put_in_xmm_mem_aligned<C: Context>(
10670
0
    ctx: &mut C,
10671
0
    arg0: Value,
10672
0
) -> XmmMemAligned {
10673
0
    let v1 = &C::put_in_xmm_mem(ctx, arg0);
10674
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
10675
0
    // Rule at src/isa/x64/inst.isle line 5137.
10676
0
    return v2.clone();
10677
0
}
10678
10679
// Generated as internal constructor for term mov_from_preg.
10680
7.58k
pub fn constructor_mov_from_preg<C: Context>(
10681
7.58k
    ctx: &mut C,
10682
7.58k
    arg0: PReg,
10683
7.58k
) -> Reg {
10684
7.58k
    let v1 = C::temp_writable_gpr(ctx);
10685
7.58k
    let v2 = MInst::MovFromPReg {
10686
7.58k
        src: arg0,
10687
7.58k
        dst: v1,
10688
7.58k
    };
10689
7.58k
    let v3 = C::emit(ctx, &v2);
10690
7.58k
    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
10691
7.58k
    // Rule at src/isa/x64/inst.isle line 5141.
10692
7.58k
    return v4;
10693
7.58k
}
10694
10695
// Generated as internal constructor for term mov_to_preg.
10696
0
pub fn constructor_mov_to_preg<C: Context>(
10697
0
    ctx: &mut C,
10698
0
    arg0: PReg,
10699
0
    arg1: Gpr,
10700
0
) -> SideEffectNoResult {
10701
0
    let v2 = MInst::MovToPReg {
10702
0
        src: arg1,
10703
0
        dst: arg0,
10704
0
    };
10705
0
    let v3 = SideEffectNoResult::Inst {
10706
0
        inst: v2,
10707
0
    };
10708
0
    // Rule at src/isa/x64/inst.isle line 5147.
10709
0
    return v3;
10710
0
}
10711
10712
// Generated as internal constructor for term x64_rbp.
10713
1.16k
pub fn constructor_x64_rbp<C: Context>(
10714
1.16k
    ctx: &mut C,
10715
1.16k
) -> Reg {
10716
1.16k
    let v0 = C::preg_rbp(ctx);
10717
1.16k
    let v1 = constructor_mov_from_preg(ctx, v0);
10718
1.16k
    // Rule at src/isa/x64/inst.isle line 5160.
10719
1.16k
    return v1;
10720
1.16k
}
10721
10722
// Generated as internal constructor for term x64_rsp.
10723
6.41k
pub fn constructor_x64_rsp<C: Context>(
10724
6.41k
    ctx: &mut C,
10725
6.41k
) -> Reg {
10726
6.41k
    let v0 = C::preg_rsp(ctx);
10727
6.41k
    let v1 = constructor_mov_from_preg(ctx, v0);
10728
6.41k
    // Rule at src/isa/x64/inst.isle line 5164.
10729
6.41k
    return v1;
10730
6.41k
}
10731
10732
// Generated as internal constructor for term lower.
10733
3.39M
pub fn constructor_lower<C: Context>(
10734
3.39M
    ctx: &mut C,
10735
3.39M
    arg0: Inst,
10736
3.39M
) -> Option<InstOutput> {
10737
3.39M
    let v6 = &C::inst_data(ctx, arg0);
10738
3.39M
    match v6 {
10739
        &InstructionData::AtomicCas {
10740
18.4E
            opcode: ref v1555,
10741
18.4E
            args: ref v1556,
10742
18.4E
            flags: v1557,
10743
18.4E
        } => {
10744
18.4E
            if let &Opcode::AtomicCas = v1555 {
10745
18.4E
                let v1 = C::first_result(ctx, arg0);
10746
18.4E
                if let Some(v2) = v1 {
10747
18.4E
                    let v3 = C::value_type(ctx, v2);
10748
18.4E
                    let v4 = C::fits_in_64(ctx, v3);
10749
18.4E
                    if let Some(v5) = v4 {
10750
18.4E
                        let v1530 = C::ty_int(ctx, v3);
10751
18.4E
                        if let Some(
v15310
) = v1530 {
10752
0
                            let v1558 = C::unpack_value_array_3(ctx, v1556);
10753
0
                            let v1562 = constructor_put_in_gpr(ctx, v1558.1);
10754
0
                            let v1563 = constructor_put_in_gpr(ctx, v1558.2);
10755
0
                            let v1564 = C::zero_offset(ctx);
10756
0
                            let v1565 = &constructor_to_amode(ctx, v1557, v1558.0, v1564);
10757
0
                            let v1566 = &C::amode_to_synthetic_amode(ctx, v1565);
10758
0
                            let v1567 = constructor_x64_cmpxchg(ctx, v5, v1562, v1563, v1566);
10759
0
                            let v1568 = constructor_output_gpr(ctx, v1567);
10760
0
                            // Rule at src/isa/x64/lower.isle line 2960.
10761
0
                            return Some(v1568);
10762
0
                        }
10763
0
                    }
10764
0
                }
10765
0
            }
10766
        }
10767
        &InstructionData::AtomicRmw {
10768
0
            opcode: ref v1569,
10769
0
            args: ref v1570,
10770
0
            flags: v1571,
10771
0
            op: ref v1572,
10772
0
        } => {
10773
0
            if let &Opcode::AtomicRmw = v1569 {
10774
0
                let v1 = C::first_result(ctx, arg0);
10775
0
                if let Some(v2) = v1 {
10776
0
                    let v3 = C::value_type(ctx, v2);
10777
0
                    let v4 = C::fits_in_64(ctx, v3);
10778
0
                    if let Some(v5) = v4 {
10779
0
                        let v1530 = C::ty_int(ctx, v3);
10780
0
                        if let Some(v1531) = v1530 {
10781
0
                            let v1576 = &C::atomic_rmw_op_to_mach_atomic_rmw_op(ctx, v1572);
10782
0
                            let v1532 = C::zero_offset(ctx);
10783
0
                            let v1573 = C::unpack_value_array_2(ctx, v1570);
10784
0
                            let v1577 = &constructor_to_amode(ctx, v1571, v1573.0, v1532);
10785
0
                            let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
10786
0
                            let v1579 = constructor_put_in_gpr(ctx, v1573.1);
10787
0
                            let v1580 = constructor_x64_atomic_rmw_seq(ctx, v5, v1576, v1578, v1579);
10788
0
                            let v1581 = constructor_output_gpr(ctx, v1580);
10789
0
                            // Rule at src/isa/x64/lower.isle line 2976.
10790
0
                            return Some(v1581);
10791
0
                        }
10792
0
                    }
10793
0
                }
10794
0
            }
10795
        }
10796
        &InstructionData::Binary {
10797
846k
            opcode: ref v34,
10798
846k
            args: ref v35,
10799
846k
        } => {
10800
846k
            match v34 {
10801
                &Opcode::Swizzle => {
10802
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
10803
0
                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
10804
0
                    let v2109 = C::swizzle_zero_mask(ctx);
10805
0
                    let v2110 = &constructor_const_to_xmm_mem(ctx, v2109);
10806
0
                    let v2111 = constructor_x64_paddusb(ctx, v1069, v2110);
10807
0
                    let v2112 = constructor_put_in_xmm(ctx, v36.0);
10808
0
                    let v2113 = &C::xmm_to_xmm_mem(ctx, v2111);
10809
0
                    let v2114 = constructor_x64_pshufb(ctx, v2112, v2113);
10810
0
                    let v2115 = constructor_output_xmm(ctx, v2114);
10811
0
                    // Rule at src/isa/x64/lower.isle line 3957.
10812
0
                    return Some(v2115);
10813
                }
10814
                &Opcode::X86Pshufb => {
10815
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
10816
0
                    let v57 = constructor_put_in_xmm(ctx, v36.0);
10817
0
                    let v58 = &C::put_in_xmm_mem(ctx, v36.1);
10818
0
                    let v2116 = constructor_x64_pshufb(ctx, v57, v58);
10819
0
                    let v2117 = constructor_output_xmm(ctx, v2116);
10820
0
                    // Rule at src/isa/x64/lower.isle line 3963.
10821
0
                    return Some(v2117);
10822
                }
10823
                &Opcode::Smin => {
10824
18.4E
                    let v1 = C::first_result(ctx, arg0);
10825
18.4E
                    if let Some(v2) = v1 {
10826
18.4E
                        let v3 = C::value_type(ctx, v2);
10827
18.4E
                        let v586 = C::ty_vec128(ctx, v3);
10828
18.4E
                        if let Some(v587) = v586 {
10829
18.4E
                            let v598 = constructor_has_pmins(ctx, v587);
10830
18.4E
                            if v598 == true {
10831
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
10832
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
10833
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
10834
0
                                let v599 = constructor_x64_pmins(ctx, v587, v57, v58);
10835
0
                                let v600 = constructor_output_xmm(ctx, v599);
10836
0
                                // Rule at src/isa/x64/lower.isle line 1414.
10837
0
                                return Some(v600);
10838
0
                            }
10839
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10840
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
10841
0
                            let v369 = constructor_put_in_xmm(ctx, v36.1);
10842
0
                            let v262 = &C::xmm_to_xmm_mem(ctx, v57);
10843
0
                            let v601 = constructor_x64_pcmpgt(ctx, v587, v369, v262);
10844
0
                            let v264 = &C::xmm_to_xmm_mem(ctx, v57);
10845
0
                            let v602 = constructor_x64_pand(ctx, v601, v264);
10846
0
                            let v374 = &C::xmm_to_xmm_mem(ctx, v369);
10847
0
                            let v603 = constructor_x64_pandn(ctx, v601, v374);
10848
0
                            let v604 = &C::xmm_to_xmm_mem(ctx, v603);
10849
0
                            let v605 = constructor_x64_por(ctx, v602, v604);
10850
0
                            let v606 = constructor_output_xmm(ctx, v605);
10851
0
                            // Rule at src/isa/x64/lower.isle line 1418.
10852
0
                            return Some(v606);
10853
0
                        }
10854
0
                        let v4 = C::fits_in_64(ctx, v3);
10855
0
                        if let Some(v5) = v4 {
10856
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10857
0
                            let v581 = constructor_cmp_and_choose(ctx, v5, &CC::L, v36.0, v36.1);
10858
0
                            let v582 = C::output(ctx, v581);
10859
0
                            // Rule at src/isa/x64/lower.isle line 1368.
10860
0
                            return Some(v582);
10861
0
                        }
10862
0
                    }
10863
                }
10864
                &Opcode::Umin => {
10865
1.02k
                    let v1 = C::first_result(ctx, arg0);
10866
1.02k
                    if let Some(v2) = v1 {
10867
1.02k
                        let v3 = C::value_type(ctx, v2);
10868
1.02k
                        let v586 = C::ty_vec128(ctx, v3);
10869
1.02k
                        if let Some(
v5870
) = v586 {
10870
0
                            let v628 = constructor_has_pminu(ctx, v587);
10871
0
                            if v628 == true {
10872
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
10873
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
10874
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
10875
0
                                let v629 = constructor_x64_pminu(ctx, v587, v57, v58);
10876
0
                                let v630 = constructor_output_xmm(ctx, v629);
10877
0
                                // Rule at src/isa/x64/lower.isle line 1466.
10878
0
                                return Some(v630);
10879
0
                            }
10880
1.02k
                        }
10881
1.02k
                        if v3 == I16X8 {
10882
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10883
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
10884
0
                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
10885
0
                            let v139 = constructor_x64_psubusw(ctx, v57, v58);
10886
0
                            let v631 = &C::xmm_to_xmm_mem(ctx, v139);
10887
0
                            let v632 = constructor_x64_psubw(ctx, v57, v631);
10888
0
                            let v633 = constructor_output_xmm(ctx, v632);
10889
0
                            // Rule at src/isa/x64/lower.isle line 1472.
10890
0
                            return Some(v633);
10891
1.02k
                        }
10892
1.02k
                        if let Some(
v5870
) = v586 {
10893
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10894
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
10895
0
                            let v369 = constructor_put_in_xmm(ctx, v36.1);
10896
0
                            let v614 = constructor_flip_high_bit_mask(ctx, v587);
10897
0
                            let v615 = &C::xmm_to_xmm_mem(ctx, v614);
10898
0
                            let v616 = constructor_x64_pxor(ctx, v57, v615);
10899
0
                            let v617 = &C::xmm_to_xmm_mem(ctx, v614);
10900
0
                            let v618 = constructor_x64_pxor(ctx, v369, v617);
10901
0
                            let v634 = &C::xmm_to_xmm_mem(ctx, v616);
10902
0
                            let v635 = constructor_x64_pcmpgt(ctx, v587, v618, v634);
10903
0
                            let v621 = &C::xmm_to_xmm_mem(ctx, v57);
10904
0
                            let v636 = constructor_x64_pand(ctx, v635, v621);
10905
0
                            let v623 = &C::xmm_to_xmm_mem(ctx, v369);
10906
0
                            let v637 = constructor_x64_pandn(ctx, v635, v623);
10907
0
                            let v638 = &C::xmm_to_xmm_mem(ctx, v637);
10908
0
                            let v639 = constructor_x64_por(ctx, v636, v638);
10909
0
                            let v640 = constructor_output_xmm(ctx, v639);
10910
0
                            // Rule at src/isa/x64/lower.isle line 1477.
10911
0
                            return Some(v640);
10912
1.02k
                        }
10913
1.02k
                        let v4 = C::fits_in_64(ctx, v3);
10914
1.02k
                        if let Some(v5) = v4 {
10915
1.02k
                            let v36 = C::unpack_value_array_2(ctx, v35);
10916
1.02k
                            let v575 = constructor_cmp_and_choose(ctx, v5, &CC::B, v36.0, v36.1);
10917
1.02k
                            let v576 = C::output(ctx, v575);
10918
1.02k
                            // Rule at src/isa/x64/lower.isle line 1362.
10919
1.02k
                            return Some(v576);
10920
0
                        }
10921
0
                    }
10922
                }
10923
                &Opcode::Smax => {
10924
0
                    let v1 = C::first_result(ctx, arg0);
10925
0
                    if let Some(v2) = v1 {
10926
0
                        let v3 = C::value_type(ctx, v2);
10927
0
                        let v586 = C::ty_vec128(ctx, v3);
10928
0
                        if let Some(v587) = v586 {
10929
0
                            let v588 = constructor_has_pmaxs(ctx, v587);
10930
0
                            if v588 == true {
10931
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
10932
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
10933
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
10934
0
                                let v589 = constructor_x64_pmaxs(ctx, v587, v57, v58);
10935
0
                                let v590 = constructor_output_xmm(ctx, v589);
10936
0
                                // Rule at src/isa/x64/lower.isle line 1398.
10937
0
                                return Some(v590);
10938
0
                            }
10939
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10940
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
10941
0
                            let v369 = constructor_put_in_xmm(ctx, v36.1);
10942
0
                            let v591 = &C::xmm_to_xmm_mem(ctx, v369);
10943
0
                            let v592 = constructor_x64_pcmpgt(ctx, v587, v57, v591);
10944
0
                            let v264 = &C::xmm_to_xmm_mem(ctx, v57);
10945
0
                            let v593 = constructor_x64_pand(ctx, v592, v264);
10946
0
                            let v374 = &C::xmm_to_xmm_mem(ctx, v369);
10947
0
                            let v594 = constructor_x64_pandn(ctx, v592, v374);
10948
0
                            let v595 = &C::xmm_to_xmm_mem(ctx, v594);
10949
0
                            let v596 = constructor_x64_por(ctx, v593, v595);
10950
0
                            let v597 = constructor_output_xmm(ctx, v596);
10951
0
                            // Rule at src/isa/x64/lower.isle line 1402.
10952
0
                            return Some(v597);
10953
0
                        }
10954
0
                        let v4 = C::fits_in_64(ctx, v3);
10955
0
                        if let Some(v5) = v4 {
10956
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10957
0
                            let v584 = constructor_cmp_and_choose(ctx, v5, &CC::NL, v36.0, v36.1);
10958
0
                            let v585 = C::output(ctx, v584);
10959
0
                            // Rule at src/isa/x64/lower.isle line 1371.
10960
0
                            return Some(v585);
10961
0
                        }
10962
0
                    }
10963
                }
10964
                &Opcode::Umax => {
10965
1.14k
                    let v1 = C::first_result(ctx, arg0);
10966
1.14k
                    if let Some(v2) = v1 {
10967
1.14k
                        let v3 = C::value_type(ctx, v2);
10968
1.14k
                        let v586 = C::ty_vec128(ctx, v3);
10969
1.14k
                        if let Some(
v5870
) = v586 {
10970
0
                            let v607 = constructor_has_pmaxu(ctx, v587);
10971
0
                            if v607 == true {
10972
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
10973
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
10974
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
10975
0
                                let v608 = constructor_x64_pmaxu(ctx, v587, v57, v58);
10976
0
                                let v609 = constructor_output_xmm(ctx, v608);
10977
0
                                // Rule at src/isa/x64/lower.isle line 1430.
10978
0
                                return Some(v609);
10979
0
                            }
10980
1.14k
                        }
10981
1.14k
                        if v3 == I16X8 {
10982
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10983
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
10984
0
                            let v369 = constructor_put_in_xmm(ctx, v36.1);
10985
0
                            let v262 = &C::xmm_to_xmm_mem(ctx, v57);
10986
0
                            let v610 = constructor_x64_psubusw(ctx, v369, v262);
10987
0
                            let v611 = &C::xmm_to_xmm_mem(ctx, v610);
10988
0
                            let v612 = constructor_x64_paddw(ctx, v57, v611);
10989
0
                            let v613 = constructor_output_xmm(ctx, v612);
10990
0
                            // Rule at src/isa/x64/lower.isle line 1436.
10991
0
                            return Some(v613);
10992
1.14k
                        }
10993
1.14k
                        if let Some(
v5870
) = v586 {
10994
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
10995
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
10996
0
                            let v369 = constructor_put_in_xmm(ctx, v36.1);
10997
0
                            let v614 = constructor_flip_high_bit_mask(ctx, v587);
10998
0
                            let v615 = &C::xmm_to_xmm_mem(ctx, v614);
10999
0
                            let v616 = constructor_x64_pxor(ctx, v57, v615);
11000
0
                            let v617 = &C::xmm_to_xmm_mem(ctx, v614);
11001
0
                            let v618 = constructor_x64_pxor(ctx, v369, v617);
11002
0
                            let v619 = &C::xmm_to_xmm_mem(ctx, v618);
11003
0
                            let v620 = constructor_x64_pcmpgt(ctx, v587, v616, v619);
11004
0
                            let v621 = &C::xmm_to_xmm_mem(ctx, v57);
11005
0
                            let v622 = constructor_x64_pand(ctx, v620, v621);
11006
0
                            let v623 = &C::xmm_to_xmm_mem(ctx, v369);
11007
0
                            let v624 = constructor_x64_pandn(ctx, v620, v623);
11008
0
                            let v625 = &C::xmm_to_xmm_mem(ctx, v624);
11009
0
                            let v626 = constructor_x64_por(ctx, v622, v625);
11010
0
                            let v627 = constructor_output_xmm(ctx, v626);
11011
0
                            // Rule at src/isa/x64/lower.isle line 1443.
11012
0
                            return Some(v627);
11013
1.14k
                        }
11014
1.14k
                        let v4 = C::fits_in_64(ctx, v3);
11015
1.14k
                        if let Some(v5) = v4 {
11016
1.14k
                            let v36 = C::unpack_value_array_2(ctx, v35);
11017
1.14k
                            let v578 = constructor_cmp_and_choose(ctx, v5, &CC::NB, v36.0, v36.1);
11018
1.14k
                            let v579 = C::output(ctx, v578);
11019
1.14k
                            // Rule at src/isa/x64/lower.isle line 1365.
11020
1.14k
                            return Some(v579);
11021
0
                        }
11022
0
                    }
11023
                }
11024
                &Opcode::AvgRound => {
11025
0
                    let v1 = C::first_result(ctx, arg0);
11026
0
                    if let Some(v2) = v1 {
11027
0
                        let v3 = C::value_type(ctx, v2);
11028
0
                        let v53 = C::multi_lane(ctx, v3);
11029
0
                        if let Some(v54) = v53 {
11030
0
                            match v54.0 {
11031
                                0x8 => {
11032
0
                                    if v54.1 == 0x10 {
11033
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11034
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11035
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11036
0
                                        let v340 = constructor_x64_pavgb(ctx, v57, v58);
11037
0
                                        let v341 = constructor_output_xmm(ctx, v340);
11038
0
                                        // Rule at src/isa/x64/lower.isle line 835.
11039
0
                                        return Some(v341);
11040
0
                                    }
11041
                                }
11042
                                0x10 => {
11043
0
                                    if v54.1 == 0x8 {
11044
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11045
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11046
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11047
0
                                        let v342 = constructor_x64_pavgw(ctx, v57, v58);
11048
0
                                        let v343 = constructor_output_xmm(ctx, v342);
11049
0
                                        // Rule at src/isa/x64/lower.isle line 839.
11050
0
                                        return Some(v343);
11051
0
                                    }
11052
                                }
11053
0
                                _ => {}
11054
                            }
11055
0
                        }
11056
0
                    }
11057
                }
11058
                &Opcode::UaddSat => {
11059
0
                    let v1 = C::first_result(ctx, arg0);
11060
0
                    if let Some(v2) = v1 {
11061
0
                        let v3 = C::value_type(ctx, v2);
11062
0
                        let v53 = C::multi_lane(ctx, v3);
11063
0
                        if let Some(v54) = v53 {
11064
0
                            match v54.0 {
11065
                                0x8 => {
11066
0
                                    if v54.1 == 0x10 {
11067
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11068
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11069
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11070
0
                                        let v115 = constructor_x64_paddusb(ctx, v57, v58);
11071
0
                                        let v116 = constructor_output_xmm(ctx, v115);
11072
0
                                        // Rule at src/isa/x64/lower.isle line 184.
11073
0
                                        return Some(v116);
11074
0
                                    }
11075
                                }
11076
                                0x10 => {
11077
0
                                    if v54.1 == 0x8 {
11078
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11079
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11080
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11081
0
                                        let v117 = constructor_x64_paddusw(ctx, v57, v58);
11082
0
                                        let v118 = constructor_output_xmm(ctx, v117);
11083
0
                                        // Rule at src/isa/x64/lower.isle line 188.
11084
0
                                        return Some(v118);
11085
0
                                    }
11086
                                }
11087
0
                                _ => {}
11088
                            }
11089
0
                        }
11090
0
                    }
11091
                }
11092
                &Opcode::SaddSat => {
11093
0
                    let v1 = C::first_result(ctx, arg0);
11094
0
                    if let Some(v2) = v1 {
11095
0
                        let v3 = C::value_type(ctx, v2);
11096
0
                        let v53 = C::multi_lane(ctx, v3);
11097
0
                        if let Some(v54) = v53 {
11098
0
                            match v54.0 {
11099
                                0x8 => {
11100
0
                                    if v54.1 == 0x10 {
11101
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11102
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11103
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11104
0
                                        let v111 = constructor_x64_paddsb(ctx, v57, v58);
11105
0
                                        let v112 = constructor_output_xmm(ctx, v111);
11106
0
                                        // Rule at src/isa/x64/lower.isle line 174.
11107
0
                                        return Some(v112);
11108
0
                                    }
11109
                                }
11110
                                0x10 => {
11111
0
                                    if v54.1 == 0x8 {
11112
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11113
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11114
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11115
0
                                        let v113 = constructor_x64_paddsw(ctx, v57, v58);
11116
0
                                        let v114 = constructor_output_xmm(ctx, v113);
11117
0
                                        // Rule at src/isa/x64/lower.isle line 178.
11118
0
                                        return Some(v114);
11119
0
                                    }
11120
                                }
11121
0
                                _ => {}
11122
                            }
11123
0
                        }
11124
0
                    }
11125
                }
11126
                &Opcode::UsubSat => {
11127
0
                    let v1 = C::first_result(ctx, arg0);
11128
0
                    if let Some(v2) = v1 {
11129
0
                        let v3 = C::value_type(ctx, v2);
11130
0
                        let v53 = C::multi_lane(ctx, v3);
11131
0
                        if let Some(v54) = v53 {
11132
0
                            match v54.0 {
11133
                                0x8 => {
11134
0
                                    if v54.1 == 0x10 {
11135
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11136
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11137
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11138
0
                                        let v137 = constructor_x64_psubusb(ctx, v57, v58);
11139
0
                                        let v138 = constructor_output_xmm(ctx, v137);
11140
0
                                        // Rule at src/isa/x64/lower.isle line 245.
11141
0
                                        return Some(v138);
11142
0
                                    }
11143
                                }
11144
                                0x10 => {
11145
0
                                    if v54.1 == 0x8 {
11146
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11147
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11148
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11149
0
                                        let v139 = constructor_x64_psubusw(ctx, v57, v58);
11150
0
                                        let v140 = constructor_output_xmm(ctx, v139);
11151
0
                                        // Rule at src/isa/x64/lower.isle line 249.
11152
0
                                        return Some(v140);
11153
0
                                    }
11154
                                }
11155
0
                                _ => {}
11156
                            }
11157
0
                        }
11158
0
                    }
11159
                }
11160
                &Opcode::SsubSat => {
11161
0
                    let v1 = C::first_result(ctx, arg0);
11162
0
                    if let Some(v2) = v1 {
11163
0
                        let v3 = C::value_type(ctx, v2);
11164
0
                        let v53 = C::multi_lane(ctx, v3);
11165
0
                        if let Some(v54) = v53 {
11166
0
                            match v54.0 {
11167
                                0x8 => {
11168
0
                                    if v54.1 == 0x10 {
11169
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11170
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11171
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11172
0
                                        let v133 = constructor_x64_psubsb(ctx, v57, v58);
11173
0
                                        let v134 = constructor_output_xmm(ctx, v133);
11174
0
                                        // Rule at src/isa/x64/lower.isle line 235.
11175
0
                                        return Some(v134);
11176
0
                                    }
11177
                                }
11178
                                0x10 => {
11179
0
                                    if v54.1 == 0x8 {
11180
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11181
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11182
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11183
0
                                        let v135 = constructor_x64_psubsw(ctx, v57, v58);
11184
0
                                        let v136 = constructor_output_xmm(ctx, v135);
11185
0
                                        // Rule at src/isa/x64/lower.isle line 239.
11186
0
                                        return Some(v136);
11187
0
                                    }
11188
                                }
11189
0
                                _ => {}
11190
                            }
11191
0
                        }
11192
0
                    }
11193
                }
11194
                &Opcode::Iadd => {
11195
651k
                    let v1 = C::first_result(ctx, arg0);
11196
651k
                    if let Some(v2) = v1 {
11197
651k
                        let v3 = C::value_type(ctx, v2);
11198
651k
                        if v3 == I128 {
11199
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
11200
0
                            let v67 = C::put_in_regs(ctx, v36.0);
11201
0
                            let v69 = constructor_value_regs_get_gpr(ctx, v67, 0x0);
11202
0
                            let v71 = constructor_value_regs_get_gpr(ctx, v67, 0x1);
11203
0
                            let v72 = C::put_in_regs(ctx, v36.1);
11204
0
                            let v73 = constructor_value_regs_get_gpr(ctx, v72, 0x0);
11205
0
                            let v74 = constructor_value_regs_get_gpr(ctx, v72, 0x1);
11206
0
                            let v75 = &C::gpr_to_gpr_mem_imm(ctx, v73);
11207
0
                            let v76 = &constructor_x64_add_with_flags_paired(ctx, I64, v69, v75);
11208
0
                            let v77 = &C::gpr_to_gpr_mem_imm(ctx, v74);
11209
0
                            let v78 = &constructor_x64_adc_paired(ctx, I64, v71, v77);
11210
0
                            let v79 = constructor_with_flags(ctx, v76, v78);
11211
0
                            let v80 = C::output(ctx, v79);
11212
0
                            // Rule at src/isa/x64/lower.isle line 78.
11213
0
                            return Some(v80);
11214
651k
                        }
11215
651k
                        let v53 = C::multi_lane(ctx, v3);
11216
651k
                        if let Some(
v5421
) = v53 {
11217
21
                            match v54.0 {
11218
                                0x8 => {
11219
21
                                    if v54.1 == 0x10 {
11220
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11221
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11222
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11223
0
                                        let v59 = constructor_x64_paddb(ctx, v57, v58);
11224
0
                                        let v60 = constructor_output_xmm(ctx, v59);
11225
0
                                        // Rule at src/isa/x64/lower.isle line 61.
11226
0
                                        return Some(v60);
11227
0
                                    }
11228
                                }
11229
                                0x10 => {
11230
0
                                    if v54.1 == 0x8 {
11231
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11232
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11233
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11234
0
                                        let v61 = constructor_x64_paddw(ctx, v57, v58);
11235
0
                                        let v62 = constructor_output_xmm(ctx, v61);
11236
0
                                        // Rule at src/isa/x64/lower.isle line 65.
11237
0
                                        return Some(v62);
11238
0
                                    }
11239
                                }
11240
                                0x20 => {
11241
0
                                    if v54.1 == 0x4 {
11242
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11243
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11244
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11245
0
                                        let v63 = constructor_x64_paddd(ctx, v57, v58);
11246
0
                                        let v64 = constructor_output_xmm(ctx, v63);
11247
0
                                        // Rule at src/isa/x64/lower.isle line 69.
11248
0
                                        return Some(v64);
11249
0
                                    }
11250
                                }
11251
                                0x40 => {
11252
0
                                    if v54.1 == 0x2 {
11253
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11254
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11255
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11256
0
                                        let v65 = constructor_x64_paddq(ctx, v57, v58);
11257
0
                                        let v66 = constructor_output_xmm(ctx, v65);
11258
0
                                        // Rule at src/isa/x64/lower.isle line 73.
11259
0
                                        return Some(v66);
11260
0
                                    }
11261
                                }
11262
0
                                _ => {}
11263
                            }
11264
651k
                        }
11265
651k
                        let v4 = C::fits_in_64(ctx, v3);
11266
651k
                        if let Some(v5) = v4 {
11267
651k
                            let v36 = C::unpack_value_array_2(ctx, v35);
11268
651k
                            let v48 = &C::sinkable_load(ctx, v36.0);
11269
651k
                            if let Some(
v497.47k
) = v48 {
11270
7.47k
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
11271
7.47k
                                let v50 = &constructor_sink_load_to_gpr_mem_imm(ctx, v49);
11272
7.47k
                                let v51 = constructor_x64_add(ctx, v5, v45, v50);
11273
7.47k
                                let v52 = constructor_output_gpr(ctx, v51);
11274
7.47k
                                // Rule at src/isa/x64/lower.isle line 55.
11275
7.47k
                                return Some(v52);
11276
644k
                            }
11277
644k
                            let v43 = &C::simm32_from_value(ctx, v36.0);
11278
644k
                            if let Some(
v440
) = v43 {
11279
0
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
11280
0
                                let v46 = constructor_x64_add(ctx, v5, v45, v44);
11281
0
                                let v47 = constructor_output_gpr(ctx, v46);
11282
0
                                // Rule at src/isa/x64/lower.isle line 52.
11283
0
                                return Some(v47);
11284
644k
                            }
11285
644k
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11286
644k
                            let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
11287
644k
                            let v41 = constructor_x64_add(ctx, v5, v39, v40);
11288
644k
                            let v42 = constructor_output_gpr(ctx, v41);
11289
644k
                            // Rule at src/isa/x64/lower.isle line 45.
11290
644k
                            return Some(v42);
11291
0
                        }
11292
0
                    }
11293
                }
11294
                &Opcode::Isub => {
11295
41.9k
                    let v1 = C::first_result(ctx, arg0);
11296
41.9k
                    if let Some(v2) = v1 {
11297
41.9k
                        let v3 = C::value_type(ctx, v2);
11298
41.9k
                        if v3 == I128 {
11299
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
11300
0
                            let v67 = C::put_in_regs(ctx, v36.0);
11301
0
                            let v69 = constructor_value_regs_get_gpr(ctx, v67, 0x0);
11302
0
                            let v71 = constructor_value_regs_get_gpr(ctx, v67, 0x1);
11303
0
                            let v72 = C::put_in_regs(ctx, v36.1);
11304
0
                            let v73 = constructor_value_regs_get_gpr(ctx, v72, 0x0);
11305
0
                            let v74 = constructor_value_regs_get_gpr(ctx, v72, 0x1);
11306
0
                            let v75 = &C::gpr_to_gpr_mem_imm(ctx, v73);
11307
0
                            let v129 = &constructor_x64_sub_with_flags_paired(ctx, I64, v69, v75);
11308
0
                            let v77 = &C::gpr_to_gpr_mem_imm(ctx, v74);
11309
0
                            let v130 = &constructor_x64_sbb_paired(ctx, I64, v71, v77);
11310
0
                            let v131 = constructor_with_flags(ctx, v129, v130);
11311
0
                            let v132 = C::output(ctx, v131);
11312
0
                            // Rule at src/isa/x64/lower.isle line 220.
11313
0
                            return Some(v132);
11314
41.9k
                        }
11315
41.9k
                        let v53 = C::multi_lane(ctx, v3);
11316
41.9k
                        if let Some(
v540
) = v53 {
11317
0
                            match v54.0 {
11318
                                0x8 => {
11319
0
                                    if v54.1 == 0x10 {
11320
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11321
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11322
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11323
0
                                        let v121 = constructor_x64_psubb(ctx, v57, v58);
11324
0
                                        let v122 = constructor_output_xmm(ctx, v121);
11325
0
                                        // Rule at src/isa/x64/lower.isle line 203.
11326
0
                                        return Some(v122);
11327
0
                                    }
11328
                                }
11329
                                0x10 => {
11330
0
                                    if v54.1 == 0x8 {
11331
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11332
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11333
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11334
0
                                        let v123 = constructor_x64_psubw(ctx, v57, v58);
11335
0
                                        let v124 = constructor_output_xmm(ctx, v123);
11336
0
                                        // Rule at src/isa/x64/lower.isle line 207.
11337
0
                                        return Some(v124);
11338
0
                                    }
11339
                                }
11340
                                0x20 => {
11341
0
                                    if v54.1 == 0x4 {
11342
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11343
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11344
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11345
0
                                        let v125 = constructor_x64_psubd(ctx, v57, v58);
11346
0
                                        let v126 = constructor_output_xmm(ctx, v125);
11347
0
                                        // Rule at src/isa/x64/lower.isle line 211.
11348
0
                                        return Some(v126);
11349
0
                                    }
11350
                                }
11351
                                0x40 => {
11352
0
                                    if v54.1 == 0x2 {
11353
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11354
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11355
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11356
0
                                        let v127 = constructor_x64_psubq(ctx, v57, v58);
11357
0
                                        let v128 = constructor_output_xmm(ctx, v127);
11358
0
                                        // Rule at src/isa/x64/lower.isle line 215.
11359
0
                                        return Some(v128);
11360
0
                                    }
11361
                                }
11362
0
                                _ => {}
11363
                            }
11364
41.9k
                        }
11365
41.9k
                        let v4 = C::fits_in_64(ctx, v3);
11366
41.9k
                        if let Some(v5) = v4 {
11367
41.9k
                            let v36 = C::unpack_value_array_2(ctx, v35);
11368
41.9k
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11369
41.9k
                            let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
11370
41.9k
                            let v119 = constructor_x64_sub(ctx, v5, v39, v40);
11371
41.9k
                            let v120 = constructor_output_gpr(ctx, v119);
11372
41.9k
                            // Rule at src/isa/x64/lower.isle line 197.
11373
41.9k
                            return Some(v120);
11374
0
                        }
11375
0
                    }
11376
                }
11377
                &Opcode::Imul => {
11378
28.8k
                    let v1 = C::first_result(ctx, arg0);
11379
28.8k
                    if let Some(v2) = v1 {
11380
28.8k
                        let v3 = C::value_type(ctx, v2);
11381
28.8k
                        let v53 = C::multi_lane(ctx, v3);
11382
28.8k
                        if let Some(
v540
) = v53 {
11383
0
                            if v54.0 == 0x40 {
11384
0
                                if v54.1 == 0x2 {
11385
0
                                    let v386 = C::avx512vl_enabled(ctx, v3);
11386
0
                                    if v386 == true {
11387
0
                                        let v387 = C::avx512dq_enabled(ctx, v3);
11388
0
                                        if v387 == true {
11389
0
                                            let v36 = C::unpack_value_array_2(ctx, v35);
11390
0
                                            let v388 = &C::put_in_xmm_mem(ctx, v36.0);
11391
0
                                            let v369 = constructor_put_in_xmm(ctx, v36.1);
11392
0
                                            let v389 = constructor_x64_vpmullq(ctx, v388, v369);
11393
0
                                            let v390 = constructor_output_xmm(ctx, v389);
11394
0
                                            // Rule at src/isa/x64/lower.isle line 926.
11395
0
                                            return Some(v390);
11396
0
                                        }
11397
0
                                    }
11398
0
                                }
11399
0
                            }
11400
28.8k
                        }
11401
28.8k
                        if v3 == I128 {
11402
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
11403
0
                            let v67 = C::put_in_regs(ctx, v36.0);
11404
0
                            let v69 = constructor_value_regs_get_gpr(ctx, v67, 0x0);
11405
0
                            let v71 = constructor_value_regs_get_gpr(ctx, v67, 0x1);
11406
0
                            let v72 = C::put_in_regs(ctx, v36.1);
11407
0
                            let v73 = constructor_value_regs_get_gpr(ctx, v72, 0x0);
11408
0
                            let v74 = constructor_value_regs_get_gpr(ctx, v72, 0x1);
11409
0
                            let v350 = &C::gpr_to_gpr_mem_imm(ctx, v74);
11410
0
                            let v351 = constructor_x64_mul(ctx, I64, v69, v350);
11411
0
                            let v352 = &C::gpr_to_gpr_mem_imm(ctx, v73);
11412
0
                            let v353 = constructor_x64_mul(ctx, I64, v71, v352);
11413
0
                            let v354 = &C::gpr_to_gpr_mem_imm(ctx, v353);
11414
0
                            let v355 = constructor_x64_add(ctx, I64, v351, v354);
11415
0
                            let v356 = &C::gpr_to_gpr_mem(ctx, v73);
11416
0
                            let v357 = constructor_mulhi_u(ctx, I64, v69, v356);
11417
0
                            let v358 = constructor_value_regs_get_gpr(ctx, v357, 0x0);
11418
0
                            let v359 = constructor_value_regs_get_gpr(ctx, v357, 0x1);
11419
0
                            let v360 = &C::gpr_to_gpr_mem_imm(ctx, v359);
11420
0
                            let v361 = constructor_x64_add(ctx, I64, v355, v360);
11421
0
                            let v362 = constructor_value_gprs(ctx, v358, v361);
11422
0
                            let v363 = C::output(ctx, v362);
11423
0
                            // Rule at src/isa/x64/lower.isle line 876.
11424
0
                            return Some(v363);
11425
28.8k
                        }
11426
28.8k
                        if let Some(
v540
) = v53 {
11427
0
                            match v54.0 {
11428
                                0x10 => {
11429
0
                                    if v54.1 == 0x8 {
11430
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11431
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11432
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11433
0
                                        let v364 = constructor_x64_pmullw(ctx, v57, v58);
11434
0
                                        let v365 = constructor_output_xmm(ctx, v364);
11435
0
                                        // Rule at src/isa/x64/lower.isle line 903.
11436
0
                                        return Some(v365);
11437
0
                                    }
11438
                                }
11439
                                0x20 => {
11440
0
                                    if v54.1 == 0x4 {
11441
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11442
0
                                        let v159 = C::def_inst(ctx, v36.1);
11443
0
                                        if let Some(v160) = v159 {
11444
0
                                            let v161 = &C::inst_data(ctx, v160);
11445
                                            if let &InstructionData::Unary {
11446
0
                                                opcode: ref v162,
11447
0
                                                arg: v163,
11448
0
                                            } = v161 {
11449
0
                                                match v162 {
11450
                                                    &Opcode::SwidenLow => {
11451
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11452
0
                                                        if let Some(v169) = v168 {
11453
0
                                                            let v170 = &C::inst_data(ctx, v169);
11454
                                                            if let &InstructionData::Unary {
11455
0
                                                                opcode: ref v171,
11456
0
                                                                arg: v172,
11457
0
                                                            } = v170 {
11458
0
                                                                if let &Opcode::SwidenLow = v171 {
11459
0
                                                                    let v408 = C::value_type(ctx, v172);
11460
0
                                                                    let v409 = C::multi_lane(ctx, v408);
11461
0
                                                                    if let Some(v410) = v409 {
11462
0
                                                                        if v410.0 == 0x10 {
11463
0
                                                                            if v410.1 == 0x8 {
11464
0
                                                                                let v413 = C::value_type(ctx, v163);
11465
0
                                                                                let v414 = C::multi_lane(ctx, v413);
11466
0
                                                                                if let Some(v415) = v414 {
11467
0
                                                                                    if v415.0 == 0x10 {
11468
0
                                                                                        if v415.1 == 0x8 {
11469
0
                                                                                            let v173 = constructor_put_in_xmm(ctx, v172);
11470
0
                                                                                            let v418 = constructor_put_in_xmm(ctx, v163);
11471
0
                                                                                            let v419 = &C::xmm_to_xmm_mem(ctx, v418);
11472
0
                                                                                            let v420 = constructor_x64_pmullw(ctx, v173, v419);
11473
0
                                                                                            let v421 = &C::xmm_to_xmm_mem(ctx, v418);
11474
0
                                                                                            let v422 = constructor_x64_pmulhw(ctx, v173, v421);
11475
0
                                                                                            let v423 = &C::xmm_to_xmm_mem(ctx, v422);
11476
0
                                                                                            let v434 = constructor_x64_punpcklwd(ctx, v420, v423);
11477
0
                                                                                            let v435 = constructor_output_xmm(ctx, v434);
11478
0
                                                                                            // Rule at src/isa/x64/lower.isle line 997.
11479
0
                                                                                            return Some(v435);
11480
0
                                                                                        }
11481
0
                                                                                    }
11482
0
                                                                                }
11483
0
                                                                            }
11484
0
                                                                        }
11485
0
                                                                    }
11486
0
                                                                }
11487
0
                                                            }
11488
0
                                                        }
11489
                                                    }
11490
                                                    &Opcode::SwidenHigh => {
11491
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11492
0
                                                        if let Some(v169) = v168 {
11493
0
                                                            let v170 = &C::inst_data(ctx, v169);
11494
                                                            if let &InstructionData::Unary {
11495
0
                                                                opcode: ref v171,
11496
0
                                                                arg: v172,
11497
0
                                                            } = v170 {
11498
0
                                                                if let &Opcode::SwidenHigh = v171 {
11499
0
                                                                    let v408 = C::value_type(ctx, v172);
11500
0
                                                                    let v409 = C::multi_lane(ctx, v408);
11501
0
                                                                    if let Some(v410) = v409 {
11502
0
                                                                        if v410.0 == 0x10 {
11503
0
                                                                            if v410.1 == 0x8 {
11504
0
                                                                                let v413 = C::value_type(ctx, v163);
11505
0
                                                                                let v414 = C::multi_lane(ctx, v413);
11506
0
                                                                                if let Some(v415) = v414 {
11507
0
                                                                                    if v415.0 == 0x10 {
11508
0
                                                                                        if v415.1 == 0x8 {
11509
0
                                                                                            let v173 = constructor_put_in_xmm(ctx, v172);
11510
0
                                                                                            let v418 = constructor_put_in_xmm(ctx, v163);
11511
0
                                                                                            let v419 = &C::xmm_to_xmm_mem(ctx, v418);
11512
0
                                                                                            let v420 = constructor_x64_pmullw(ctx, v173, v419);
11513
0
                                                                                            let v421 = &C::xmm_to_xmm_mem(ctx, v418);
11514
0
                                                                                            let v422 = constructor_x64_pmulhw(ctx, v173, v421);
11515
0
                                                                                            let v423 = &C::xmm_to_xmm_mem(ctx, v422);
11516
0
                                                                                            let v424 = constructor_x64_punpckhwd(ctx, v420, v423);
11517
0
                                                                                            let v425 = constructor_output_xmm(ctx, v424);
11518
0
                                                                                            // Rule at src/isa/x64/lower.isle line 974.
11519
0
                                                                                            return Some(v425);
11520
0
                                                                                        }
11521
0
                                                                                    }
11522
0
                                                                                }
11523
0
                                                                            }
11524
0
                                                                        }
11525
0
                                                                    }
11526
0
                                                                }
11527
0
                                                            }
11528
0
                                                        }
11529
                                                    }
11530
                                                    &Opcode::UwidenLow => {
11531
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11532
0
                                                        if let Some(v169) = v168 {
11533
0
                                                            let v170 = &C::inst_data(ctx, v169);
11534
                                                            if let &InstructionData::Unary {
11535
0
                                                                opcode: ref v171,
11536
0
                                                                arg: v172,
11537
0
                                                            } = v170 {
11538
0
                                                                if let &Opcode::UwidenLow = v171 {
11539
0
                                                                    let v408 = C::value_type(ctx, v172);
11540
0
                                                                    let v409 = C::multi_lane(ctx, v408);
11541
0
                                                                    if let Some(v410) = v409 {
11542
0
                                                                        if v410.0 == 0x10 {
11543
0
                                                                            if v410.1 == 0x8 {
11544
0
                                                                                let v413 = C::value_type(ctx, v163);
11545
0
                                                                                let v414 = C::multi_lane(ctx, v413);
11546
0
                                                                                if let Some(v415) = v414 {
11547
0
                                                                                    if v415.0 == 0x10 {
11548
0
                                                                                        if v415.1 == 0x8 {
11549
0
                                                                                            let v173 = constructor_put_in_xmm(ctx, v172);
11550
0
                                                                                            let v418 = constructor_put_in_xmm(ctx, v163);
11551
0
                                                                                            let v419 = &C::xmm_to_xmm_mem(ctx, v418);
11552
0
                                                                                            let v420 = constructor_x64_pmullw(ctx, v173, v419);
11553
0
                                                                                            let v421 = &C::xmm_to_xmm_mem(ctx, v418);
11554
0
                                                                                            let v442 = constructor_x64_pmulhuw(ctx, v173, v421);
11555
0
                                                                                            let v443 = &C::xmm_to_xmm_mem(ctx, v442);
11556
0
                                                                                            let v448 = constructor_x64_punpcklwd(ctx, v420, v443);
11557
0
                                                                                            let v449 = constructor_output_xmm(ctx, v448);
11558
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1042.
11559
0
                                                                                            return Some(v449);
11560
0
                                                                                        }
11561
0
                                                                                    }
11562
0
                                                                                }
11563
0
                                                                            }
11564
0
                                                                        }
11565
0
                                                                    }
11566
0
                                                                }
11567
0
                                                            }
11568
0
                                                        }
11569
                                                    }
11570
                                                    &Opcode::UwidenHigh => {
11571
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11572
0
                                                        if let Some(v169) = v168 {
11573
0
                                                            let v170 = &C::inst_data(ctx, v169);
11574
                                                            if let &InstructionData::Unary {
11575
0
                                                                opcode: ref v171,
11576
0
                                                                arg: v172,
11577
0
                                                            } = v170 {
11578
0
                                                                if let &Opcode::UwidenHigh = v171 {
11579
0
                                                                    let v408 = C::value_type(ctx, v172);
11580
0
                                                                    let v409 = C::multi_lane(ctx, v408);
11581
0
                                                                    if let Some(v410) = v409 {
11582
0
                                                                        if v410.0 == 0x10 {
11583
0
                                                                            if v410.1 == 0x8 {
11584
0
                                                                                let v413 = C::value_type(ctx, v163);
11585
0
                                                                                let v414 = C::multi_lane(ctx, v413);
11586
0
                                                                                if let Some(v415) = v414 {
11587
0
                                                                                    if v415.0 == 0x10 {
11588
0
                                                                                        if v415.1 == 0x8 {
11589
0
                                                                                            let v173 = constructor_put_in_xmm(ctx, v172);
11590
0
                                                                                            let v418 = constructor_put_in_xmm(ctx, v163);
11591
0
                                                                                            let v419 = &C::xmm_to_xmm_mem(ctx, v418);
11592
0
                                                                                            let v420 = constructor_x64_pmullw(ctx, v173, v419);
11593
0
                                                                                            let v421 = &C::xmm_to_xmm_mem(ctx, v418);
11594
0
                                                                                            let v442 = constructor_x64_pmulhuw(ctx, v173, v421);
11595
0
                                                                                            let v443 = &C::xmm_to_xmm_mem(ctx, v442);
11596
0
                                                                                            let v444 = constructor_x64_punpckhwd(ctx, v420, v443);
11597
0
                                                                                            let v445 = constructor_output_xmm(ctx, v444);
11598
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1020.
11599
0
                                                                                            return Some(v445);
11600
0
                                                                                        }
11601
0
                                                                                    }
11602
0
                                                                                }
11603
0
                                                                            }
11604
0
                                                                        }
11605
0
                                                                    }
11606
0
                                                                }
11607
0
                                                            }
11608
0
                                                        }
11609
                                                    }
11610
0
                                                    _ => {}
11611
                                                }
11612
0
                                            }
11613
0
                                        }
11614
0
                                        let v366 = C::use_sse41(ctx);
11615
0
                                        if v366 == true {
11616
0
                                            let v57 = constructor_put_in_xmm(ctx, v36.0);
11617
0
                                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11618
0
                                            let v367 = constructor_x64_pmulld(ctx, v57, v58);
11619
0
                                            let v368 = constructor_output_xmm(ctx, v367);
11620
0
                                            // Rule at src/isa/x64/lower.isle line 906.
11621
0
                                            return Some(v368);
11622
0
                                        }
11623
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11624
0
                                        let v369 = constructor_put_in_xmm(ctx, v36.1);
11625
0
                                        let v262 = &C::xmm_to_xmm_mem(ctx, v57);
11626
0
                                        let v371 = constructor_x64_pshufd(ctx, v262, 0x31);
11627
0
                                        let v372 = &C::xmm_to_xmm_mem(ctx, v369);
11628
0
                                        let v373 = constructor_x64_pshufd(ctx, v372, 0x31);
11629
0
                                        let v374 = &C::xmm_to_xmm_mem(ctx, v369);
11630
0
                                        let v375 = constructor_x64_pmuludq(ctx, v57, v374);
11631
0
                                        let v376 = &C::xmm_to_xmm_mem(ctx, v375);
11632
0
                                        let v378 = constructor_x64_pshufd(ctx, v376, 0x8);
11633
0
                                        let v379 = &C::xmm_to_xmm_mem(ctx, v373);
11634
0
                                        let v380 = constructor_x64_pmuludq(ctx, v371, v379);
11635
0
                                        let v381 = &C::xmm_to_xmm_mem(ctx, v380);
11636
0
                                        let v382 = constructor_x64_pshufd(ctx, v381, 0x8);
11637
0
                                        let v383 = &C::xmm_to_xmm_mem(ctx, v382);
11638
0
                                        let v384 = constructor_x64_punpckldq(ctx, v378, v383);
11639
0
                                        let v385 = constructor_output_xmm(ctx, v384);
11640
0
                                        // Rule at src/isa/x64/lower.isle line 913.
11641
0
                                        return Some(v385);
11642
0
                                    }
11643
                                }
11644
                                0x40 => {
11645
0
                                    if v54.1 == 0x2 {
11646
0
                                        let v36 = C::unpack_value_array_2(ctx, v35);
11647
0
                                        let v159 = C::def_inst(ctx, v36.1);
11648
0
                                        if let Some(v160) = v159 {
11649
0
                                            let v161 = &C::inst_data(ctx, v160);
11650
                                            if let &InstructionData::Unary {
11651
0
                                                opcode: ref v162,
11652
0
                                                arg: v163,
11653
0
                                            } = v161 {
11654
0
                                                match v162 {
11655
                                                    &Opcode::SwidenLow => {
11656
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11657
0
                                                        if let Some(v169) = v168 {
11658
0
                                                            let v170 = &C::inst_data(ctx, v169);
11659
                                                            if let &InstructionData::Unary {
11660
0
                                                                opcode: ref v171,
11661
0
                                                                arg: v172,
11662
0
                                                            } = v170 {
11663
0
                                                                if let &Opcode::SwidenLow = v171 {
11664
0
                                                                    let v366 = C::use_sse41(ctx);
11665
0
                                                                    if v366 == true {
11666
0
                                                                        let v408 = C::value_type(ctx, v172);
11667
0
                                                                        let v409 = C::multi_lane(ctx, v408);
11668
0
                                                                        if let Some(v410) = v409 {
11669
0
                                                                            if v410.0 == 0x20 {
11670
0
                                                                                if v410.1 == 0x4 {
11671
0
                                                                                    let v413 = C::value_type(ctx, v163);
11672
0
                                                                                    let v414 = C::multi_lane(ctx, v413);
11673
0
                                                                                    if let Some(v415) = v414 {
11674
0
                                                                                        if v415.0 == 0x20 {
11675
0
                                                                                            if v415.1 == 0x4 {
11676
0
                                                                                                let v426 = &C::put_in_xmm_mem(ctx, v172);
11677
0
                                                                                                let v437 = constructor_x64_pshufd(ctx, v426, 0x50);
11678
0
                                                                                                let v429 = &C::put_in_xmm_mem(ctx, v163);
11679
0
                                                                                                let v438 = constructor_x64_pshufd(ctx, v429, 0x50);
11680
0
                                                                                                let v439 = &C::xmm_to_xmm_mem(ctx, v438);
11681
0
                                                                                                let v440 = constructor_x64_pmuldq(ctx, v437, v439);
11682
0
                                                                                                let v441 = constructor_output_xmm(ctx, v440);
11683
0
                                                                                                // Rule at src/isa/x64/lower.isle line 1009.
11684
0
                                                                                                return Some(v441);
11685
0
                                                                                            }
11686
0
                                                                                        }
11687
0
                                                                                    }
11688
0
                                                                                }
11689
0
                                                                            }
11690
0
                                                                        }
11691
0
                                                                    }
11692
0
                                                                }
11693
0
                                                            }
11694
0
                                                        }
11695
                                                    }
11696
                                                    &Opcode::SwidenHigh => {
11697
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11698
0
                                                        if let Some(v169) = v168 {
11699
0
                                                            let v170 = &C::inst_data(ctx, v169);
11700
                                                            if let &InstructionData::Unary {
11701
0
                                                                opcode: ref v171,
11702
0
                                                                arg: v172,
11703
0
                                                            } = v170 {
11704
0
                                                                if let &Opcode::SwidenHigh = v171 {
11705
0
                                                                    let v366 = C::use_sse41(ctx);
11706
0
                                                                    if v366 == true {
11707
0
                                                                        let v408 = C::value_type(ctx, v172);
11708
0
                                                                        let v409 = C::multi_lane(ctx, v408);
11709
0
                                                                        if let Some(v410) = v409 {
11710
0
                                                                            if v410.0 == 0x20 {
11711
0
                                                                                if v410.1 == 0x4 {
11712
0
                                                                                    let v413 = C::value_type(ctx, v163);
11713
0
                                                                                    let v414 = C::multi_lane(ctx, v413);
11714
0
                                                                                    if let Some(v415) = v414 {
11715
0
                                                                                        if v415.0 == 0x20 {
11716
0
                                                                                            if v415.1 == 0x4 {
11717
0
                                                                                                let v426 = &C::put_in_xmm_mem(ctx, v172);
11718
0
                                                                                                let v428 = constructor_x64_pshufd(ctx, v426, 0xFA);
11719
0
                                                                                                let v429 = &C::put_in_xmm_mem(ctx, v163);
11720
0
                                                                                                let v430 = constructor_x64_pshufd(ctx, v429, 0xFA);
11721
0
                                                                                                let v431 = &C::xmm_to_xmm_mem(ctx, v430);
11722
0
                                                                                                let v432 = constructor_x64_pmuldq(ctx, v428, v431);
11723
0
                                                                                                let v433 = constructor_output_xmm(ctx, v432);
11724
0
                                                                                                // Rule at src/isa/x64/lower.isle line 986.
11725
0
                                                                                                return Some(v433);
11726
0
                                                                                            }
11727
0
                                                                                        }
11728
0
                                                                                    }
11729
0
                                                                                }
11730
0
                                                                            }
11731
0
                                                                        }
11732
0
                                                                    }
11733
0
                                                                }
11734
0
                                                            }
11735
0
                                                        }
11736
                                                    }
11737
                                                    &Opcode::UwidenLow => {
11738
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11739
0
                                                        if let Some(v169) = v168 {
11740
0
                                                            let v170 = &C::inst_data(ctx, v169);
11741
                                                            if let &InstructionData::Unary {
11742
0
                                                                opcode: ref v171,
11743
0
                                                                arg: v172,
11744
0
                                                            } = v170 {
11745
0
                                                                if let &Opcode::UwidenLow = v171 {
11746
0
                                                                    let v408 = C::value_type(ctx, v172);
11747
0
                                                                    let v409 = C::multi_lane(ctx, v408);
11748
0
                                                                    if let Some(v410) = v409 {
11749
0
                                                                        if v410.0 == 0x20 {
11750
0
                                                                            if v410.1 == 0x4 {
11751
0
                                                                                let v413 = C::value_type(ctx, v163);
11752
0
                                                                                let v414 = C::multi_lane(ctx, v413);
11753
0
                                                                                if let Some(v415) = v414 {
11754
0
                                                                                    if v415.0 == 0x20 {
11755
0
                                                                                        if v415.1 == 0x4 {
11756
0
                                                                                            let v426 = &C::put_in_xmm_mem(ctx, v172);
11757
0
                                                                                            let v437 = constructor_x64_pshufd(ctx, v426, 0x50);
11758
0
                                                                                            let v429 = &C::put_in_xmm_mem(ctx, v163);
11759
0
                                                                                            let v438 = constructor_x64_pshufd(ctx, v429, 0x50);
11760
0
                                                                                            let v439 = &C::xmm_to_xmm_mem(ctx, v438);
11761
0
                                                                                            let v450 = constructor_x64_pmuludq(ctx, v437, v439);
11762
0
                                                                                            let v451 = constructor_output_xmm(ctx, v450);
11763
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1054.
11764
0
                                                                                            return Some(v451);
11765
0
                                                                                        }
11766
0
                                                                                    }
11767
0
                                                                                }
11768
0
                                                                            }
11769
0
                                                                        }
11770
0
                                                                    }
11771
0
                                                                }
11772
0
                                                            }
11773
0
                                                        }
11774
                                                    }
11775
                                                    &Opcode::UwidenHigh => {
11776
0
                                                        let v168 = C::def_inst(ctx, v36.0);
11777
0
                                                        if let Some(v169) = v168 {
11778
0
                                                            let v170 = &C::inst_data(ctx, v169);
11779
                                                            if let &InstructionData::Unary {
11780
0
                                                                opcode: ref v171,
11781
0
                                                                arg: v172,
11782
0
                                                            } = v170 {
11783
0
                                                                if let &Opcode::UwidenHigh = v171 {
11784
0
                                                                    let v408 = C::value_type(ctx, v172);
11785
0
                                                                    let v409 = C::multi_lane(ctx, v408);
11786
0
                                                                    if let Some(v410) = v409 {
11787
0
                                                                        if v410.0 == 0x20 {
11788
0
                                                                            if v410.1 == 0x4 {
11789
0
                                                                                let v413 = C::value_type(ctx, v163);
11790
0
                                                                                let v414 = C::multi_lane(ctx, v413);
11791
0
                                                                                if let Some(v415) = v414 {
11792
0
                                                                                    if v415.0 == 0x20 {
11793
0
                                                                                        if v415.1 == 0x4 {
11794
0
                                                                                            let v426 = &C::put_in_xmm_mem(ctx, v172);
11795
0
                                                                                            let v428 = constructor_x64_pshufd(ctx, v426, 0xFA);
11796
0
                                                                                            let v429 = &C::put_in_xmm_mem(ctx, v163);
11797
0
                                                                                            let v430 = constructor_x64_pshufd(ctx, v429, 0xFA);
11798
0
                                                                                            let v431 = &C::xmm_to_xmm_mem(ctx, v430);
11799
0
                                                                                            let v446 = constructor_x64_pmuludq(ctx, v428, v431);
11800
0
                                                                                            let v447 = constructor_output_xmm(ctx, v446);
11801
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1032.
11802
0
                                                                                            return Some(v447);
11803
0
                                                                                        }
11804
0
                                                                                    }
11805
0
                                                                                }
11806
0
                                                                            }
11807
0
                                                                        }
11808
0
                                                                    }
11809
0
                                                                }
11810
0
                                                            }
11811
0
                                                        }
11812
                                                    }
11813
0
                                                    _ => {}
11814
                                                }
11815
0
                                            }
11816
0
                                        }
11817
0
                                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11818
0
                                        let v369 = constructor_put_in_xmm(ctx, v36.1);
11819
0
                                        let v392 = &C::xmi_imm(ctx, 0x20);
11820
0
                                        let v393 = constructor_x64_psrlq(ctx, v57, v392);
11821
0
                                        let v372 = &C::xmm_to_xmm_mem(ctx, v369);
11822
0
                                        let v394 = constructor_x64_pmuludq(ctx, v393, v372);
11823
0
                                        let v395 = &C::xmi_imm(ctx, 0x20);
11824
0
                                        let v396 = constructor_x64_psrlq(ctx, v369, v395);
11825
0
                                        let v397 = &C::xmm_to_xmm_mem(ctx, v396);
11826
0
                                        let v398 = constructor_x64_pmuludq(ctx, v57, v397);
11827
0
                                        let v399 = &C::xmm_to_xmm_mem(ctx, v398);
11828
0
                                        let v400 = constructor_x64_paddq(ctx, v394, v399);
11829
0
                                        let v401 = &C::xmi_imm(ctx, 0x20);
11830
0
                                        let v402 = constructor_x64_psllq(ctx, v400, v401);
11831
0
                                        let v403 = &C::xmm_to_xmm_mem(ctx, v369);
11832
0
                                        let v404 = constructor_x64_pmuludq(ctx, v57, v403);
11833
0
                                        let v405 = &C::xmm_to_xmm_mem(ctx, v402);
11834
0
                                        let v406 = constructor_x64_paddq(ctx, v404, v405);
11835
0
                                        let v407 = constructor_output_xmm(ctx, v406);
11836
0
                                        // Rule at src/isa/x64/lower.isle line 952.
11837
0
                                        return Some(v407);
11838
0
                                    }
11839
                                }
11840
0
                                _ => {}
11841
                            }
11842
28.8k
                        }
11843
28.8k
                        let v4 = C::fits_in_64(ctx, v3);
11844
28.8k
                        if let Some(v5) = v4 {
11845
28.8k
                            let v36 = C::unpack_value_array_2(ctx, v35);
11846
28.8k
                            let v48 = &C::sinkable_load(ctx, v36.0);
11847
28.8k
                            if let Some(
v49167
) = v48 {
11848
167
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
11849
167
                                let v50 = &constructor_sink_load_to_gpr_mem_imm(ctx, v49);
11850
167
                                let v348 = constructor_x64_mul(ctx, v5, v45, v50);
11851
167
                                let v349 = constructor_output_gpr(ctx, v348);
11852
167
                                // Rule at src/isa/x64/lower.isle line 857.
11853
167
                                return Some(v349);
11854
28.6k
                            }
11855
28.6k
                            let v43 = &C::simm32_from_value(ctx, v36.0);
11856
28.6k
                            if let Some(
v440
) = v43 {
11857
0
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
11858
0
                                let v346 = constructor_x64_mul(ctx, v5, v45, v44);
11859
0
                                let v347 = constructor_output_gpr(ctx, v346);
11860
0
                                // Rule at src/isa/x64/lower.isle line 854.
11861
0
                                return Some(v347);
11862
28.6k
                            }
11863
28.6k
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11864
28.6k
                            let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
11865
28.6k
                            let v344 = constructor_x64_mul(ctx, v5, v39, v40);
11866
28.6k
                            let v345 = constructor_output_gpr(ctx, v344);
11867
28.6k
                            // Rule at src/isa/x64/lower.isle line 848.
11868
28.6k
                            return Some(v345);
11869
0
                        }
11870
0
                    }
11871
                }
11872
                &Opcode::Umulhi => {
11873
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
11874
0
                    let v1845 = C::value_type(ctx, v36.0);
11875
0
                    match v1845 {
11876
                        I16 => {
11877
0
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11878
0
                            let v98 = &constructor_put_in_gpr_mem(ctx, v36.1);
11879
0
                            let v1979 = constructor_mul_hi(ctx, I16, false, v39, v98);
11880
0
                            let v1980 = constructor_value_regs_get_gpr(ctx, v1979, 0x1);
11881
0
                            let v1981 = constructor_output_gpr(ctx, v1980);
11882
0
                            // Rule at src/isa/x64/lower.isle line 3758.
11883
0
                            return Some(v1981);
11884
                        }
11885
                        I32 => {
11886
0
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11887
0
                            let v98 = &constructor_put_in_gpr_mem(ctx, v36.1);
11888
0
                            let v1982 = constructor_mul_hi(ctx, I32, false, v39, v98);
11889
0
                            let v1983 = constructor_value_regs_get_gpr(ctx, v1982, 0x1);
11890
0
                            let v1984 = constructor_output_gpr(ctx, v1983);
11891
0
                            // Rule at src/isa/x64/lower.isle line 3763.
11892
0
                            return Some(v1984);
11893
                        }
11894
                        I64 => {
11895
0
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11896
0
                            let v98 = &constructor_put_in_gpr_mem(ctx, v36.1);
11897
0
                            let v1985 = constructor_mul_hi(ctx, I64, false, v39, v98);
11898
0
                            let v1986 = constructor_value_regs_get_gpr(ctx, v1985, 0x1);
11899
0
                            let v1987 = constructor_output_gpr(ctx, v1986);
11900
0
                            // Rule at src/isa/x64/lower.isle line 3768.
11901
0
                            return Some(v1987);
11902
                        }
11903
0
                        _ => {}
11904
                    }
11905
                }
11906
                &Opcode::Smulhi => {
11907
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
11908
0
                    let v1845 = C::value_type(ctx, v36.0);
11909
0
                    match v1845 {
11910
                        I16 => {
11911
0
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11912
0
                            let v98 = &constructor_put_in_gpr_mem(ctx, v36.1);
11913
0
                            let v1988 = constructor_mul_hi(ctx, I16, true, v39, v98);
11914
0
                            let v1989 = constructor_value_regs_get_gpr(ctx, v1988, 0x1);
11915
0
                            let v1990 = constructor_output_gpr(ctx, v1989);
11916
0
                            // Rule at src/isa/x64/lower.isle line 3775.
11917
0
                            return Some(v1990);
11918
                        }
11919
                        I32 => {
11920
0
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11921
0
                            let v98 = &constructor_put_in_gpr_mem(ctx, v36.1);
11922
0
                            let v1991 = constructor_mul_hi(ctx, I32, true, v39, v98);
11923
0
                            let v1992 = constructor_value_regs_get_gpr(ctx, v1991, 0x1);
11924
0
                            let v1993 = constructor_output_gpr(ctx, v1992);
11925
0
                            // Rule at src/isa/x64/lower.isle line 3780.
11926
0
                            return Some(v1993);
11927
                        }
11928
                        I64 => {
11929
0
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
11930
0
                            let v98 = &constructor_put_in_gpr_mem(ctx, v36.1);
11931
0
                            let v1994 = constructor_mul_hi(ctx, I64, true, v39, v98);
11932
0
                            let v1995 = constructor_value_regs_get_gpr(ctx, v1994, 0x1);
11933
0
                            let v1996 = constructor_output_gpr(ctx, v1995);
11934
0
                            // Rule at src/isa/x64/lower.isle line 3785.
11935
0
                            return Some(v1996);
11936
                        }
11937
0
                        _ => {}
11938
                    }
11939
                }
11940
                &Opcode::SqmulRoundSat => {
11941
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
11942
0
                    let v1845 = C::value_type(ctx, v36.0);
11943
0
                    if v1845 == I16X8 {
11944
0
                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11945
0
                        let v369 = constructor_put_in_xmm(ctx, v36.1);
11946
0
                        let v2277 = C::sqmul_round_sat_mask(ctx);
11947
0
                        let v2278 = &constructor_const_to_xmm_mem(ctx, v2277);
11948
0
                        let v372 = &C::xmm_to_xmm_mem(ctx, v369);
11949
0
                        let v2279 = constructor_x64_pmulhrsw(ctx, v57, v372);
11950
0
                        let v2280 = constructor_x64_pcmpeqw(ctx, v2279, v2278);
11951
0
                        let v2281 = &C::xmm_to_xmm_mem(ctx, v2280);
11952
0
                        let v2282 = constructor_x64_pxor(ctx, v2279, v2281);
11953
0
                        let v2283 = constructor_output_xmm(ctx, v2282);
11954
0
                        // Rule at src/isa/x64/lower.isle line 4206.
11955
0
                        return Some(v2283);
11956
0
                    }
11957
                }
11958
                &Opcode::X86Pmulhrsw => {
11959
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
11960
0
                    let v1845 = C::value_type(ctx, v36.0);
11961
0
                    if v1845 == I16X8 {
11962
0
                        let v57 = constructor_put_in_xmm(ctx, v36.0);
11963
0
                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
11964
0
                        let v2284 = constructor_x64_pmulhrsw(ctx, v57, v58);
11965
0
                        let v2285 = constructor_output_xmm(ctx, v2284);
11966
0
                        // Rule at src/isa/x64/lower.isle line 4217.
11967
0
                        return Some(v2285);
11968
0
                    }
11969
                }
11970
                &Opcode::Udiv => {
11971
1.43k
                    let v36 = C::unpack_value_array_2(ctx, v35);
11972
1.43k
                    let v1845 = C::value_type(ctx, v36.0);
11973
1.43k
                    if v1845 == I8 {
11974
0
                        let v1921 = constructor_extend_to_gpr(ctx, v36.0, I32, &ExtendKind::Zero);
11975
0
                        let v182 = constructor_put_in_gpr(ctx, v36.1);
11976
0
                        let v1922 = &C::gpr_to_gpr_mem(ctx, v182);
11977
0
                        let v1925 = constructor_x64_div8(ctx, v1921, v1922, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
11978
0
                        let v1926 = constructor_output_gpr(ctx, v1925);
11979
0
                        // Rule at src/isa/x64/lower.isle line 3637.
11980
0
                        return Some(v1926);
11981
1.43k
                    }
11982
1.43k
                    let v1927 = C::fits_in_64(ctx, v1845);
11983
1.43k
                    if let Some(v1928) = v1927 {
11984
1.43k
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
11985
1.43k
                        let v15 = constructor_imm(ctx, I64, 0x0);
11986
1.43k
                        let v1929 = C::gpr_new(ctx, v15);
11987
1.43k
                        let v1930 = constructor_put_in_gpr(ctx, v36.1);
11988
1.43k
                        let v1931 = &C::gpr_to_gpr_mem(ctx, v1930);
11989
1.43k
                        let v1932 = &C::raw_operand_size_of_type(ctx, v1928);
11990
1.43k
                        let v1933 = constructor_x64_div_quotient(ctx, v39, v1929, v1931, v1932, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
11991
1.43k
                        let v1934 = C::output(ctx, v1933);
11992
1.43k
                        // Rule at src/isa/x64/lower.isle line 3646.
11993
1.43k
                        return Some(v1934);
11994
0
                    }
11995
                }
11996
                &Opcode::Sdiv => {
11997
212
                    let v36 = C::unpack_value_array_2(ctx, v35);
11998
212
                    let v1845 = C::value_type(ctx, v36.0);
11999
212
                    if v1845 == I8 {
12000
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12001
0
                        let v1936 = constructor_x64_sign_extend_data(ctx, v39, &OperandSize::Size8);
12002
0
                        let v1937 = constructor_nonzero_sdiv_divisor(ctx, I8, v36.1);
12003
0
                        let v1938 = &C::reg_to_gpr_mem(ctx, v1937);
12004
0
                        let v1941 = constructor_x64_div8(ctx, v1936, v1938, &DivSignedness::Signed, &TrapCode::IntegerOverflow);
12005
0
                        let v1942 = constructor_output_gpr(ctx, v1941);
12006
0
                        // Rule at src/isa/x64/lower.isle line 3656.
12007
0
                        return Some(v1942);
12008
212
                    }
12009
212
                    let v1927 = C::fits_in_64(ctx, v1845);
12010
212
                    if let Some(v1928) = v1927 {
12011
212
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12012
212
                        let v1943 = &C::raw_operand_size_of_type(ctx, v1928);
12013
212
                        let v1944 = constructor_x64_sign_extend_data(ctx, v39, v1943);
12014
212
                        let v1945 = constructor_nonzero_sdiv_divisor(ctx, v1928, v36.1);
12015
212
                        let v1946 = &C::reg_to_gpr_mem(ctx, v1945);
12016
212
                        let v1947 = constructor_x64_div_quotient(ctx, v39, v1944, v1946, v1943, &DivSignedness::Signed, &TrapCode::IntegerOverflow);
12017
212
                        let v1948 = C::output(ctx, v1947);
12018
212
                        // Rule at src/isa/x64/lower.isle line 3662.
12019
212
                        return Some(v1948);
12020
0
                    }
12021
                }
12022
                &Opcode::Urem => {
12023
246
                    let v36 = C::unpack_value_array_2(ctx, v35);
12024
246
                    let v1845 = C::value_type(ctx, v36.0);
12025
246
                    if v1845 == I8 {
12026
0
                        let v1921 = constructor_extend_to_gpr(ctx, v36.0, I32, &ExtendKind::Zero);
12027
0
                        let v182 = constructor_put_in_gpr(ctx, v36.1);
12028
0
                        let v1922 = &C::gpr_to_gpr_mem(ctx, v182);
12029
0
                        let v1925 = constructor_x64_div8(ctx, v1921, v1922, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12030
0
                        let v1024 = Imm8Reg::Imm8 {
12031
0
                            imm: 0x8,
12032
0
                        };
12033
0
                        let v1949 = &C::imm8_reg_to_imm8_gpr(ctx, &v1024);
12034
0
                        let v1950 = constructor_x64_shr(ctx, I64, v1925, v1949);
12035
0
                        let v1951 = constructor_output_gpr(ctx, v1950);
12036
0
                        // Rule at src/isa/x64/lower.isle line 3695.
12037
0
                        return Some(v1951);
12038
246
                    }
12039
246
                    let v1927 = C::fits_in_64(ctx, v1845);
12040
246
                    if let Some(v1928) = v1927 {
12041
246
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12042
246
                        let v15 = constructor_imm(ctx, I64, 0x0);
12043
246
                        let v1929 = C::gpr_new(ctx, v15);
12044
246
                        let v1930 = constructor_put_in_gpr(ctx, v36.1);
12045
246
                        let v1931 = &C::gpr_to_gpr_mem(ctx, v1930);
12046
246
                        let v1932 = &C::raw_operand_size_of_type(ctx, v1928);
12047
246
                        let v1952 = constructor_x64_div_remainder(ctx, v39, v1929, v1931, v1932, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12048
246
                        let v1953 = C::output(ctx, v1952);
12049
246
                        // Rule at src/isa/x64/lower.isle line 3704.
12050
246
                        return Some(v1953);
12051
0
                    }
12052
                }
12053
                &Opcode::Srem => {
12054
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
12055
0
                    let v159 = C::def_inst(ctx, v36.1);
12056
0
                    if let Some(v160) = v159 {
12057
0
                        let v161 = &C::inst_data(ctx, v160);
12058
                        if let &InstructionData::UnaryImm {
12059
0
                            opcode: ref v1954,
12060
0
                            imm: v1955,
12061
0
                        } = v161 {
12062
0
                            if let &Opcode::Iconst = v1954 {
12063
0
                                let v1845 = C::value_type(ctx, v36.0);
12064
0
                                if v1845 == I8 {
12065
0
                                    let v1956 = C::safe_divisor_from_imm64(ctx, I8, v1955);
12066
0
                                    if let Some(v1957) = v1956 {
12067
0
                                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12068
0
                                        let v1936 = constructor_x64_sign_extend_data(ctx, v39, &OperandSize::Size8);
12069
0
                                        let v1958 = constructor_imm(ctx, I8, v1957);
12070
0
                                        let v1959 = &C::reg_to_gpr_mem(ctx, v1958);
12071
0
                                        let v1960 = constructor_x64_div8(ctx, v1936, v1959, &DivSignedness::Signed, &TrapCode::IntegerDivisionByZero);
12072
0
                                        let v1024 = Imm8Reg::Imm8 {
12073
0
                                            imm: 0x8,
12074
0
                                        };
12075
0
                                        let v1961 = &C::imm8_reg_to_imm8_gpr(ctx, &v1024);
12076
0
                                        let v1962 = constructor_x64_shr(ctx, I64, v1960, v1961);
12077
0
                                        let v1963 = constructor_output_gpr(ctx, v1962);
12078
0
                                        // Rule at src/isa/x64/lower.isle line 3719.
12079
0
                                        return Some(v1963);
12080
0
                                    }
12081
0
                                }
12082
0
                                let v1964 = C::safe_divisor_from_imm64(ctx, v1845, v1955);
12083
0
                                if let Some(v1965) = v1964 {
12084
0
                                    let v39 = constructor_put_in_gpr(ctx, v36.0);
12085
0
                                    let v1966 = &C::raw_operand_size_of_type(ctx, v1845);
12086
0
                                    let v1967 = constructor_x64_sign_extend_data(ctx, v39, v1966);
12087
0
                                    let v1968 = constructor_imm(ctx, v1845, v1965);
12088
0
                                    let v1969 = &C::reg_to_gpr_mem(ctx, v1968);
12089
0
                                    let v1970 = constructor_x64_div_remainder(ctx, v39, v1967, v1969, v1966, &DivSignedness::Signed, &TrapCode::IntegerDivisionByZero);
12090
0
                                    let v1971 = C::output(ctx, v1970);
12091
0
                                    // Rule at src/isa/x64/lower.isle line 3728.
12092
0
                                    return Some(v1971);
12093
0
                                }
12094
0
                            }
12095
0
                        }
12096
0
                    }
12097
0
                    let v1845 = C::value_type(ctx, v36.0);
12098
0
                    if v1845 == I8 {
12099
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12100
0
                        let v1936 = constructor_x64_sign_extend_data(ctx, v39, &OperandSize::Size8);
12101
0
                        let v1972 = constructor_put_in_gpr(ctx, v36.1);
12102
0
                        let v1973 = constructor_x64_checked_srem_seq8(ctx, v1936, v1972);
12103
0
                        let v1024 = Imm8Reg::Imm8 {
12104
0
                            imm: 0x8,
12105
0
                        };
12106
0
                        let v1949 = &C::imm8_reg_to_imm8_gpr(ctx, &v1024);
12107
0
                        let v1974 = constructor_x64_shr(ctx, I64, v1973, v1949);
12108
0
                        let v1975 = constructor_output_gpr(ctx, v1974);
12109
0
                        // Rule at src/isa/x64/lower.isle line 3741.
12110
0
                        return Some(v1975);
12111
0
                    }
12112
0
                    let v39 = constructor_put_in_gpr(ctx, v36.0);
12113
0
                    let v1966 = &C::raw_operand_size_of_type(ctx, v1845);
12114
0
                    let v1967 = constructor_x64_sign_extend_data(ctx, v39, v1966);
12115
0
                    let v1930 = constructor_put_in_gpr(ctx, v36.1);
12116
0
                    let v1976 = constructor_x64_checked_srem_seq(ctx, v1966, v39, v1967, v1930);
12117
0
                    let v1977 = C::value_regs_get(ctx, v1976, 0x1);
12118
0
                    let v1978 = constructor_output_reg(ctx, v1977);
12119
0
                    // Rule at src/isa/x64/lower.isle line 3747.
12120
0
                    return Some(v1978);
12121
                }
12122
                &Opcode::UaddOverflow => {
12123
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
12124
0
                    let v81 = C::value_type(ctx, v36.1);
12125
0
                    let v82 = C::fits_in_64(ctx, v81);
12126
0
                    if let Some(v83) = v82 {
12127
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12128
0
                        let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12129
0
                        let v86 = constructor_construct_overflow_op_alu(ctx, v83, &CC::B, &AluRmiROpcode::Add, v39, v40);
12130
0
                        // Rule at src/isa/x64/lower.isle line 127.
12131
0
                        return Some(v86);
12132
0
                    }
12133
0
                    if v81 == I128 {
12134
0
                        let v88 = constructor_construct_overflow_op_alu_128(ctx, &CC::B, &AluRmiROpcode::Add, &AluRmiROpcode::Adc, v36.0, v36.1);
12135
0
                        // Rule at src/isa/x64/lower.isle line 131.
12136
0
                        return Some(v88);
12137
0
                    }
12138
                }
12139
                &Opcode::SaddOverflow => {
12140
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
12141
0
                    let v81 = C::value_type(ctx, v36.1);
12142
0
                    let v82 = C::fits_in_64(ctx, v81);
12143
0
                    if let Some(v83) = v82 {
12144
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12145
0
                        let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12146
0
                        let v90 = constructor_construct_overflow_op_alu(ctx, v83, &CC::O, &AluRmiROpcode::Add, v39, v40);
12147
0
                        // Rule at src/isa/x64/lower.isle line 136.
12148
0
                        return Some(v90);
12149
0
                    }
12150
0
                    if v81 == I128 {
12151
0
                        let v91 = constructor_construct_overflow_op_alu_128(ctx, &CC::O, &AluRmiROpcode::Add, &AluRmiROpcode::Adc, v36.0, v36.1);
12152
0
                        // Rule at src/isa/x64/lower.isle line 139.
12153
0
                        return Some(v91);
12154
0
                    }
12155
                }
12156
                &Opcode::UsubOverflow => {
12157
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
12158
0
                    let v81 = C::value_type(ctx, v36.1);
12159
0
                    let v82 = C::fits_in_64(ctx, v81);
12160
0
                    if let Some(v83) = v82 {
12161
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12162
0
                        let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12163
0
                        let v93 = constructor_construct_overflow_op_alu(ctx, v83, &CC::B, &AluRmiROpcode::Sub, v39, v40);
12164
0
                        // Rule at src/isa/x64/lower.isle line 144.
12165
0
                        return Some(v93);
12166
0
                    }
12167
0
                    if v81 == I128 {
12168
0
                        let v95 = constructor_construct_overflow_op_alu_128(ctx, &CC::B, &AluRmiROpcode::Sub, &AluRmiROpcode::Sbb, v36.0, v36.1);
12169
0
                        // Rule at src/isa/x64/lower.isle line 147.
12170
0
                        return Some(v95);
12171
0
                    }
12172
                }
12173
                &Opcode::SsubOverflow => {
12174
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
12175
0
                    let v81 = C::value_type(ctx, v36.1);
12176
0
                    let v82 = C::fits_in_64(ctx, v81);
12177
0
                    if let Some(v83) = v82 {
12178
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12179
0
                        let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12180
0
                        let v96 = constructor_construct_overflow_op_alu(ctx, v83, &CC::O, &AluRmiROpcode::Sub, v39, v40);
12181
0
                        // Rule at src/isa/x64/lower.isle line 152.
12182
0
                        return Some(v96);
12183
0
                    }
12184
0
                    if v81 == I128 {
12185
0
                        let v97 = constructor_construct_overflow_op_alu_128(ctx, &CC::O, &AluRmiROpcode::Sub, &AluRmiROpcode::Sbb, v36.0, v36.1);
12186
0
                        // Rule at src/isa/x64/lower.isle line 155.
12187
0
                        return Some(v97);
12188
0
                    }
12189
                }
12190
                &Opcode::UmulOverflow => {
12191
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
12192
0
                    let v81 = C::value_type(ctx, v36.1);
12193
0
                    let v82 = C::fits_in_64(ctx, v81);
12194
0
                    if let Some(v83) = v82 {
12195
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12196
0
                        let v98 = &constructor_put_in_gpr_mem(ctx, v36.1);
12197
0
                        let v99 = &constructor_x64_umullo_with_flags_paired(ctx, v83, v39, v98);
12198
0
                        let v100 = constructor_construct_overflow_op(ctx, &CC::O, v99);
12199
0
                        // Rule at src/isa/x64/lower.isle line 160.
12200
0
                        return Some(v100);
12201
0
                    }
12202
                }
12203
                &Opcode::SmulOverflow => {
12204
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
12205
0
                    let v81 = C::value_type(ctx, v36.1);
12206
0
                    let v101 = C::ty_int_ref_16_to_64(ctx, v81);
12207
0
                    if let Some(v102) = v101 {
12208
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12209
0
                        let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12210
0
                        let v104 = constructor_construct_overflow_op_alu(ctx, v102, &CC::O, &AluRmiROpcode::Mul, v39, v40);
12211
0
                        // Rule at src/isa/x64/lower.isle line 165.
12212
0
                        return Some(v104);
12213
0
                    }
12214
0
                    if v81 == I8 {
12215
0
                        let v39 = constructor_put_in_gpr(ctx, v36.0);
12216
0
                        let v106 = &C::put_in_reg_mem(ctx, v36.1);
12217
0
                        let v107 = &constructor_reg_mem_to_reg_mem_imm(ctx, v106);
12218
0
                        let v108 = &C::gpr_mem_imm_new(ctx, v107);
12219
0
                        let v109 = &constructor_x64_alurmi_with_flags_paired(ctx, &AluRmiROpcode::Mul, I8, v39, v108);
12220
0
                        let v110 = constructor_construct_overflow_op(ctx, &CC::O, v109);
12221
0
                        // Rule at src/isa/x64/lower.isle line 169.
12222
0
                        return Some(v110);
12223
0
                    }
12224
                }
12225
                &Opcode::Band => {
12226
50.3k
                    let v1 = C::first_result(ctx, arg0);
12227
50.3k
                    if let Some(v2) = v1 {
12228
50.3k
                        let v3 = C::value_type(ctx, v2);
12229
50.3k
                        let v141 = C::ty_int_ref_scalar_64(ctx, v3);
12230
50.3k
                        if let Some(v142) = v141 {
12231
50.3k
                            let v176 = C::use_bmi1(ctx, v3);
12232
50.3k
                            if v176 == true {
12233
50.3k
                                let v36 = C::unpack_value_array_2(ctx, v35);
12234
50.3k
                                let v168 = C::def_inst(ctx, v36.0);
12235
50.3k
                                if let Some(
v16946.9k
) = v168 {
12236
46.9k
                                    let v170 = &C::inst_data(ctx, v169);
12237
                                    if let &InstructionData::Unary {
12238
1.45k
                                        opcode: ref v171,
12239
1.45k
                                        arg: v172,
12240
46.9k
                                    } = v170 {
12241
1.45k
                                        if let &Opcode::Bnot = v171 {
12242
88
                                            let v181 = constructor_put_in_gpr(ctx, v172);
12243
88
                                            let v182 = constructor_put_in_gpr(ctx, v36.1);
12244
88
                                            let v183 = constructor_x64_andn(ctx, v3, v181, v182);
12245
88
                                            let v184 = constructor_output_gpr(ctx, v183);
12246
88
                                            // Rule at src/isa/x64/lower.isle line 328.
12247
88
                                            return Some(v184);
12248
1.37k
                                        }
12249
45.4k
                                    }
12250
3.39k
                                }
12251
50.2k
                                let v159 = C::def_inst(ctx, v36.1);
12252
50.2k
                                if let Some(
v16050.1k
) = v159 {
12253
50.1k
                                    let v161 = &C::inst_data(ctx, v160);
12254
                                    if let &InstructionData::Unary {
12255
1.32k
                                        opcode: ref v162,
12256
1.32k
                                        arg: v163,
12257
50.1k
                                    } = v161 {
12258
1.32k
                                        if let &Opcode::Bnot = v162 {
12259
143
                                            let v177 = constructor_put_in_gpr(ctx, v163);
12260
143
                                            let v178 = constructor_put_in_gpr(ctx, v36.0);
12261
143
                                            let v179 = constructor_x64_andn(ctx, v3, v177, v178);
12262
143
                                            let v180 = constructor_output_gpr(ctx, v179);
12263
143
                                            // Rule at src/isa/x64/lower.isle line 324.
12264
143
                                            return Some(v180);
12265
1.18k
                                        }
12266
48.7k
                                    }
12267
115
                                }
12268
0
                            }
12269
0
                        }
12270
50.0k
                        let v53 = C::multi_lane(ctx, v3);
12271
50.0k
                        if let Some(
v541
) = v53 {
12272
1
                            let v36 = C::unpack_value_array_2(ctx, v35);
12273
1
                            let v168 = C::def_inst(ctx, v36.0);
12274
1
                            if let Some(v169) = v168 {
12275
1
                                let v170 = &C::inst_data(ctx, v169);
12276
                                if let &InstructionData::Unary {
12277
1
                                    opcode: ref v171,
12278
1
                                    arg: v172,
12279
1
                                } = v170 {
12280
1
                                    if let &Opcode::Bnot = v171 {
12281
0
                                        let v173 = constructor_put_in_xmm(ctx, v172);
12282
0
                                        let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12283
0
                                        let v174 = constructor_sse_and_not(ctx, v3, v173, v58);
12284
0
                                        let v175 = constructor_output_xmm(ctx, v174);
12285
0
                                        // Rule at src/isa/x64/lower.isle line 321.
12286
0
                                        return Some(v175);
12287
0
                                    }
12288
0
                                }
12289
0
                            }
12290
0
                            let v159 = C::def_inst(ctx, v36.1);
12291
0
                            if let Some(v160) = v159 {
12292
0
                                let v161 = &C::inst_data(ctx, v160);
12293
                                if let &InstructionData::Unary {
12294
0
                                    opcode: ref v162,
12295
0
                                    arg: v163,
12296
0
                                } = v161 {
12297
0
                                    if let &Opcode::Bnot = v162 {
12298
0
                                        let v164 = constructor_put_in_xmm(ctx, v163);
12299
0
                                        let v165 = &C::put_in_xmm_mem(ctx, v36.0);
12300
0
                                        let v166 = constructor_sse_and_not(ctx, v3, v164, v165);
12301
0
                                        let v167 = constructor_output_xmm(ctx, v166);
12302
0
                                        // Rule at src/isa/x64/lower.isle line 319.
12303
0
                                        return Some(v167);
12304
0
                                    }
12305
0
                                }
12306
0
                            }
12307
50.0k
                        }
12308
50.0k
                        if v3 == I128 {
12309
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12310
0
                            let v67 = C::put_in_regs(ctx, v36.0);
12311
0
                            let v69 = constructor_value_regs_get_gpr(ctx, v67, 0x0);
12312
0
                            let v71 = constructor_value_regs_get_gpr(ctx, v67, 0x1);
12313
0
                            let v72 = C::put_in_regs(ctx, v36.1);
12314
0
                            let v73 = constructor_value_regs_get_gpr(ctx, v72, 0x0);
12315
0
                            let v74 = constructor_value_regs_get_gpr(ctx, v72, 0x1);
12316
0
                            let v75 = &C::gpr_to_gpr_mem_imm(ctx, v73);
12317
0
                            let v155 = constructor_x64_and(ctx, I64, v69, v75);
12318
0
                            let v77 = &C::gpr_to_gpr_mem_imm(ctx, v74);
12319
0
                            let v156 = constructor_x64_and(ctx, I64, v71, v77);
12320
0
                            let v157 = constructor_value_gprs(ctx, v155, v156);
12321
0
                            let v158 = C::output(ctx, v157);
12322
0
                            // Rule at src/isa/x64/lower.isle line 293.
12323
0
                            return Some(v158);
12324
50.0k
                        }
12325
50.0k
                        if let Some(
v540
) = v53 {
12326
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12327
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
12328
0
                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12329
0
                            let v153 = constructor_sse_and(ctx, v3, v57, v58);
12330
0
                            let v154 = constructor_output_xmm(ctx, v153);
12331
0
                            // Rule at src/isa/x64/lower.isle line 287.
12332
0
                            return Some(v154);
12333
50.0k
                        }
12334
50.0k
                        let v149 = C::ty_scalar_float(ctx, v3);
12335
50.0k
                        if let Some(
v1500
) = v149 {
12336
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12337
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
12338
0
                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12339
0
                            let v151 = constructor_sse_and(ctx, v150, v57, v58);
12340
0
                            let v152 = constructor_output_xmm(ctx, v151);
12341
0
                            // Rule at src/isa/x64/lower.isle line 275.
12342
0
                            return Some(v152);
12343
50.0k
                        }
12344
50.0k
                        if let Some(v142) = v141 {
12345
50.0k
                            let v36 = C::unpack_value_array_2(ctx, v35);
12346
50.0k
                            let v43 = &C::simm32_from_value(ctx, v36.0);
12347
50.0k
                            if let Some(
v440
) = v43 {
12348
0
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
12349
0
                                let v147 = constructor_x64_and(ctx, v3, v45, v44);
12350
0
                                let v148 = constructor_output_gpr(ctx, v147);
12351
0
                                // Rule at src/isa/x64/lower.isle line 269.
12352
0
                                return Some(v148);
12353
50.0k
                            }
12354
50.0k
                            let v48 = &C::sinkable_load(ctx, v36.0);
12355
50.0k
                            if let Some(
v49797
) = v48 {
12356
797
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
12357
797
                                let v50 = &constructor_sink_load_to_gpr_mem_imm(ctx, v49);
12358
797
                                let v145 = constructor_x64_and(ctx, v3, v45, v50);
12359
797
                                let v146 = constructor_output_gpr(ctx, v145);
12360
797
                                // Rule at src/isa/x64/lower.isle line 265.
12361
797
                                return Some(v146);
12362
49.2k
                            }
12363
49.2k
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
12364
49.2k
                            let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12365
49.2k
                            let v143 = constructor_x64_and(ctx, v3, v39, v40);
12366
49.2k
                            let v144 = constructor_output_gpr(ctx, v143);
12367
49.2k
                            // Rule at src/isa/x64/lower.isle line 258.
12368
49.2k
                            return Some(v144);
12369
0
                        }
12370
0
                    }
12371
                }
12372
                &Opcode::Bor => {
12373
11.8k
                    let v1 = C::first_result(ctx, arg0);
12374
11.8k
                    if let Some(v2) = v1 {
12375
11.8k
                        let v3 = C::value_type(ctx, v2);
12376
11.8k
                        if v3 == I128 {
12377
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12378
0
                            let v67 = C::put_in_regs(ctx, v36.0);
12379
0
                            let v195 = C::put_in_regs(ctx, v36.1);
12380
0
                            let v196 = constructor_or_i128(ctx, v67, v195);
12381
0
                            let v197 = C::output(ctx, v196);
12382
0
                            // Rule at src/isa/x64/lower.isle line 382.
12383
0
                            return Some(v197);
12384
11.8k
                        }
12385
11.8k
                        let v53 = C::multi_lane(ctx, v3);
12386
11.8k
                        if let Some(
v540
) = v53 {
12387
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12388
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
12389
0
                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12390
0
                            let v193 = constructor_sse_or(ctx, v3, v57, v58);
12391
0
                            let v194 = constructor_output_xmm(ctx, v193);
12392
0
                            // Rule at src/isa/x64/lower.isle line 367.
12393
0
                            return Some(v194);
12394
11.8k
                        }
12395
11.8k
                        let v149 = C::ty_scalar_float(ctx, v3);
12396
11.8k
                        if let Some(
v1500
) = v149 {
12397
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12398
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
12399
0
                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12400
0
                            let v191 = constructor_sse_or(ctx, v150, v57, v58);
12401
0
                            let v192 = constructor_output_xmm(ctx, v191);
12402
0
                            // Rule at src/isa/x64/lower.isle line 355.
12403
0
                            return Some(v192);
12404
11.8k
                        }
12405
11.8k
                        let v141 = C::ty_int_ref_scalar_64(ctx, v3);
12406
11.8k
                        if let Some(v142) = v141 {
12407
11.8k
                            let v36 = C::unpack_value_array_2(ctx, v35);
12408
11.8k
                            let v43 = &C::simm32_from_value(ctx, v36.0);
12409
11.8k
                            if let Some(
v440
) = v43 {
12410
0
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
12411
0
                                let v189 = constructor_x64_or(ctx, v3, v45, v44);
12412
0
                                let v190 = constructor_output_gpr(ctx, v189);
12413
0
                                // Rule at src/isa/x64/lower.isle line 349.
12414
0
                                return Some(v190);
12415
11.8k
                            }
12416
11.8k
                            let v48 = &C::sinkable_load(ctx, v36.0);
12417
11.8k
                            if let Some(
v4911
) = v48 {
12418
11
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
12419
11
                                let v50 = &constructor_sink_load_to_gpr_mem_imm(ctx, v49);
12420
11
                                let v187 = constructor_x64_or(ctx, v3, v45, v50);
12421
11
                                let v188 = constructor_output_gpr(ctx, v187);
12422
11
                                // Rule at src/isa/x64/lower.isle line 345.
12423
11
                                return Some(v188);
12424
11.8k
                            }
12425
11.8k
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
12426
11.8k
                            let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12427
11.8k
                            let v185 = constructor_x64_or(ctx, v3, v39, v40);
12428
11.8k
                            let v186 = constructor_output_gpr(ctx, v185);
12429
11.8k
                            // Rule at src/isa/x64/lower.isle line 338.
12430
11.8k
                            return Some(v186);
12431
0
                        }
12432
0
                    }
12433
                }
12434
                &Opcode::Bxor => {
12435
2.62k
                    let v1 = C::first_result(ctx, arg0);
12436
2.62k
                    if let Some(v2) = v1 {
12437
2.62k
                        let v3 = C::value_type(ctx, v2);
12438
2.62k
                        if v3 == I128 {
12439
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12440
0
                            let v67 = C::put_in_regs(ctx, v36.0);
12441
0
                            let v69 = constructor_value_regs_get_gpr(ctx, v67, 0x0);
12442
0
                            let v71 = constructor_value_regs_get_gpr(ctx, v67, 0x1);
12443
0
                            let v72 = C::put_in_regs(ctx, v36.1);
12444
0
                            let v73 = constructor_value_regs_get_gpr(ctx, v72, 0x0);
12445
0
                            let v74 = constructor_value_regs_get_gpr(ctx, v72, 0x1);
12446
0
                            let v75 = &C::gpr_to_gpr_mem_imm(ctx, v73);
12447
0
                            let v208 = constructor_x64_xor(ctx, I64, v69, v75);
12448
0
                            let v77 = &C::gpr_to_gpr_mem_imm(ctx, v74);
12449
0
                            let v209 = constructor_x64_xor(ctx, I64, v71, v77);
12450
0
                            let v210 = constructor_value_gprs(ctx, v208, v209);
12451
0
                            let v211 = C::output(ctx, v210);
12452
0
                            // Rule at src/isa/x64/lower.isle line 417.
12453
0
                            return Some(v211);
12454
2.62k
                        }
12455
2.62k
                        let v53 = C::multi_lane(ctx, v3);
12456
2.62k
                        if let Some(
v540
) = v53 {
12457
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12458
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
12459
0
                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12460
0
                            let v206 = constructor_x64_xor_vector(ctx, v3, v57, v58);
12461
0
                            let v207 = constructor_output_xmm(ctx, v206);
12462
0
                            // Rule at src/isa/x64/lower.isle line 412.
12463
0
                            return Some(v207);
12464
2.62k
                        }
12465
2.62k
                        let v149 = C::ty_scalar_float(ctx, v3);
12466
2.62k
                        if let Some(
v1500
) = v149 {
12467
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12468
0
                            let v57 = constructor_put_in_xmm(ctx, v36.0);
12469
0
                            let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12470
0
                            let v204 = constructor_x64_xor_vector(ctx, v150, v57, v58);
12471
0
                            let v205 = constructor_output_xmm(ctx, v204);
12472
0
                            // Rule at src/isa/x64/lower.isle line 407.
12473
0
                            return Some(v205);
12474
2.62k
                        }
12475
2.62k
                        let v141 = C::ty_int_ref_scalar_64(ctx, v3);
12476
2.62k
                        if let Some(v142) = v141 {
12477
2.62k
                            let v36 = C::unpack_value_array_2(ctx, v35);
12478
2.62k
                            let v43 = &C::simm32_from_value(ctx, v36.0);
12479
2.62k
                            if let Some(
v440
) = v43 {
12480
0
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
12481
0
                                let v202 = constructor_x64_xor(ctx, v3, v45, v44);
12482
0
                                let v203 = constructor_output_gpr(ctx, v202);
12483
0
                                // Rule at src/isa/x64/lower.isle line 401.
12484
0
                                return Some(v203);
12485
2.62k
                            }
12486
2.62k
                            let v48 = &C::sinkable_load(ctx, v36.0);
12487
2.62k
                            if let Some(
v492
) = v48 {
12488
2
                                let v45 = constructor_put_in_gpr(ctx, v36.1);
12489
2
                                let v50 = &constructor_sink_load_to_gpr_mem_imm(ctx, v49);
12490
2
                                let v200 = constructor_x64_xor(ctx, v3, v45, v50);
12491
2
                                let v201 = constructor_output_gpr(ctx, v200);
12492
2
                                // Rule at src/isa/x64/lower.isle line 397.
12493
2
                                return Some(v201);
12494
2.61k
                            }
12495
2.61k
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
12496
2.61k
                            let v40 = &constructor_put_in_gpr_mem_imm(ctx, v36.1);
12497
2.61k
                            let v198 = constructor_x64_xor(ctx, v3, v39, v40);
12498
2.61k
                            let v199 = constructor_output_gpr(ctx, v198);
12499
2.61k
                            // Rule at src/isa/x64/lower.isle line 390.
12500
2.61k
                            return Some(v199);
12501
0
                        }
12502
0
                    }
12503
                }
12504
                &Opcode::Rotl => {
12505
979
                    let v1 = C::first_result(ctx, arg0);
12506
979
                    if let Some(v2) = v1 {
12507
979
                        let v3 = C::value_type(ctx, v2);
12508
979
                        if v3 == I128 {
12509
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12510
0
                            let v67 = C::put_in_regs(ctx, v36.0);
12511
0
                            let v289 = constructor_lo_gpr(ctx, v36.1);
12512
0
                            let v290 = constructor_shl_i128(ctx, v67, v289);
12513
0
                            let v292 = constructor_imm(ctx, I64, 0x80);
12514
0
                            let v293 = C::gpr_new(ctx, v292);
12515
0
                            let v294 = &C::gpr_to_gpr_mem_imm(ctx, v289);
12516
0
                            let v295 = constructor_x64_sub(ctx, I64, v293, v294);
12517
0
                            let v296 = constructor_shr_i128(ctx, v67, v295);
12518
0
                            let v297 = constructor_or_i128(ctx, v290, v296);
12519
0
                            let v298 = C::output(ctx, v297);
12520
0
                            // Rule at src/isa/x64/lower.isle line 772.
12521
0
                            return Some(v298);
12522
979
                        }
12523
979
                        let v4 = C::fits_in_64(ctx, v3);
12524
979
                        if let Some(v5) = v4 {
12525
979
                            let v36 = C::unpack_value_array_2(ctx, v35);
12526
979
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
12527
979
                            let v212 = &constructor_put_masked_in_imm8_gpr(ctx, v36.1, v5);
12528
979
                            let v287 = constructor_x64_rotl(ctx, v5, v39, v212);
12529
979
                            let v288 = constructor_output_gpr(ctx, v287);
12530
979
                            // Rule at src/isa/x64/lower.isle line 766.
12531
979
                            return Some(v288);
12532
0
                        }
12533
0
                    }
12534
                }
12535
                &Opcode::Rotr => {
12536
3
                    let v1 = C::first_result(ctx, arg0);
12537
3
                    if let Some(v2) = v1 {
12538
3
                        let v3 = C::value_type(ctx, v2);
12539
3
                        if v3 == I128 {
12540
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
12541
0
                            let v67 = C::put_in_regs(ctx, v36.0);
12542
0
                            let v289 = constructor_lo_gpr(ctx, v36.1);
12543
0
                            let v301 = constructor_shr_i128(ctx, v67, v289);
12544
0
                            let v292 = constructor_imm(ctx, I64, 0x80);
12545
0
                            let v293 = C::gpr_new(ctx, v292);
12546
0
                            let v294 = &C::gpr_to_gpr_mem_imm(ctx, v289);
12547
0
                            let v295 = constructor_x64_sub(ctx, I64, v293, v294);
12548
0
                            let v302 = constructor_shl_i128(ctx, v67, v295);
12549
0
                            let v303 = constructor_or_i128(ctx, v301, v302);
12550
0
                            let v304 = C::output(ctx, v303);
12551
0
                            // Rule at src/isa/x64/lower.isle line 793.
12552
0
                            return Some(v304);
12553
3
                        }
12554
3
                        let v4 = C::fits_in_64(ctx, v3);
12555
3
                        if let Some(v5) = v4 {
12556
3
                            let v36 = C::unpack_value_array_2(ctx, v35);
12557
3
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
12558
3
                            let v212 = &constructor_put_masked_in_imm8_gpr(ctx, v36.1, v5);
12559
3
                            let v299 = constructor_x64_rotr(ctx, v5, v39, v212);
12560
3
                            let v300 = constructor_output_gpr(ctx, v299);
12561
3
                            // Rule at src/isa/x64/lower.isle line 787.
12562
3
                            return Some(v300);
12563
0
                        }
12564
0
                    }
12565
                }
12566
                &Opcode::Ishl => {
12567
44.2k
                    let v1 = C::first_result(ctx, arg0);
12568
44.2k
                    if let Some(v2) = v1 {
12569
44.2k
                        let v3 = C::value_type(ctx, v2);
12570
44.2k
                        match v3 {
12571
                            I128 => {
12572
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12573
0
                                let v215 = constructor_lo_gpr(ctx, v36.1);
12574
0
                                let v216 = C::put_in_regs(ctx, v36.0);
12575
0
                                let v217 = constructor_shl_i128(ctx, v216, v215);
12576
0
                                let v218 = C::output(ctx, v217);
12577
0
                                // Rule at src/isa/x64/lower.isle line 470.
12578
0
                                return Some(v218);
12579
                            }
12580
                            I8X16 => {
12581
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12582
0
                                let v219 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12583
0
                                let v220 = constructor_put_in_xmm(ctx, v36.0);
12584
0
                                let v221 = &constructor_mov_rmi_to_xmm(ctx, v219);
12585
0
                                let v222 = constructor_x64_psllw(ctx, v220, v221);
12586
0
                                let v223 = &constructor_ishl_i8x16_mask(ctx, v219);
12587
0
                                let v226 = constructor_x64_load(ctx, I8X16, v223, &ExtKind::None);
12588
0
                                let v227 = RegMem::Reg {
12589
0
                                    reg: v226,
12590
0
                                };
12591
0
                                let v228 = &C::reg_mem_to_xmm_mem(ctx, &v227);
12592
0
                                let v229 = constructor_sse_and(ctx, I8X16, v222, v228);
12593
0
                                let v230 = constructor_output_xmm(ctx, v229);
12594
0
                                // Rule at src/isa/x64/lower.isle line 482.
12595
0
                                return Some(v230);
12596
                            }
12597
                            I16X8 => {
12598
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12599
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12600
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12601
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12602
0
                                let v233 = constructor_x64_psllw(ctx, v57, v232);
12603
0
                                let v234 = constructor_output_xmm(ctx, v233);
12604
0
                                // Rule at src/isa/x64/lower.isle line 526.
12605
0
                                return Some(v234);
12606
                            }
12607
                            I32X4 => {
12608
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12609
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12610
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12611
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12612
0
                                let v235 = constructor_x64_pslld(ctx, v57, v232);
12613
0
                                let v236 = constructor_output_xmm(ctx, v235);
12614
0
                                // Rule at src/isa/x64/lower.isle line 529.
12615
0
                                return Some(v236);
12616
                            }
12617
                            I64X2 => {
12618
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12619
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12620
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12621
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12622
0
                                let v237 = constructor_x64_psllq(ctx, v57, v232);
12623
0
                                let v238 = constructor_output_xmm(ctx, v237);
12624
0
                                // Rule at src/isa/x64/lower.isle line 532.
12625
0
                                return Some(v238);
12626
                            }
12627
44.2k
                            _ => {}
12628
44.2k
                        }
12629
44.2k
                        let v4 = C::fits_in_64(ctx, v3);
12630
44.2k
                        if let Some(
v544.2k
) = v4 {
12631
44.2k
                            let v36 = C::unpack_value_array_2(ctx, v35);
12632
44.2k
                            let v39 = constructor_put_in_gpr(ctx, v36.0);
12633
44.2k
                            let v212 = &constructor_put_masked_in_imm8_gpr(ctx, v36.1, v5);
12634
44.2k
                            let v213 = constructor_x64_shl(ctx, v5, v39, v212);
12635
44.2k
                            let v214 = constructor_output_gpr(ctx, v213);
12636
44.2k
                            // Rule at src/isa/x64/lower.isle line 431.
12637
44.2k
                            return Some(v214);
12638
0
                        }
12639
0
                    }
12640
                }
12641
                &Opcode::Ushr => {
12642
9.24k
                    let v1 = C::first_result(ctx, arg0);
12643
9.24k
                    if let Some(v2) = v1 {
12644
9.24k
                        let v3 = C::value_type(ctx, v2);
12645
9.24k
                        match v3 {
12646
                            I128 => {
12647
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12648
0
                                let v215 = constructor_lo_gpr(ctx, v36.1);
12649
0
                                let v216 = C::put_in_regs(ctx, v36.0);
12650
0
                                let v243 = constructor_shr_i128(ctx, v216, v215);
12651
0
                                let v244 = C::output(ctx, v243);
12652
0
                                // Rule at src/isa/x64/lower.isle line 576.
12653
0
                                return Some(v244);
12654
                            }
12655
                            I8X16 => {
12656
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12657
0
                                let v219 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12658
0
                                let v220 = constructor_put_in_xmm(ctx, v36.0);
12659
0
                                let v221 = &constructor_mov_rmi_to_xmm(ctx, v219);
12660
0
                                let v245 = constructor_x64_psrlw(ctx, v220, v221);
12661
0
                                let v246 = &constructor_ushr_i8x16_mask(ctx, v219);
12662
0
                                let v247 = &constructor_synthetic_amode_to_xmm_mem(ctx, v246);
12663
0
                                let v248 = constructor_sse_and(ctx, I8X16, v245, v247);
12664
0
                                let v249 = constructor_output_xmm(ctx, v248);
12665
0
                                // Rule at src/isa/x64/lower.isle line 586.
12666
0
                                return Some(v249);
12667
                            }
12668
                            I16X8 => {
12669
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12670
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12671
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12672
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12673
0
                                let v250 = constructor_x64_psrlw(ctx, v57, v232);
12674
0
                                let v251 = constructor_output_xmm(ctx, v250);
12675
0
                                // Rule at src/isa/x64/lower.isle line 631.
12676
0
                                return Some(v251);
12677
                            }
12678
                            I32X4 => {
12679
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12680
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12681
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12682
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12683
0
                                let v252 = constructor_x64_psrld(ctx, v57, v232);
12684
0
                                let v253 = constructor_output_xmm(ctx, v252);
12685
0
                                // Rule at src/isa/x64/lower.isle line 634.
12686
0
                                return Some(v253);
12687
                            }
12688
                            I64X2 => {
12689
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12690
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12691
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12692
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12693
0
                                let v254 = constructor_x64_psrlq(ctx, v57, v232);
12694
0
                                let v255 = constructor_output_xmm(ctx, v254);
12695
0
                                // Rule at src/isa/x64/lower.isle line 637.
12696
0
                                return Some(v255);
12697
                            }
12698
9.24k
                            _ => {}
12699
9.24k
                        }
12700
9.24k
                        let v4 = C::fits_in_64(ctx, v3);
12701
9.24k
                        if let Some(v5) = v4 {
12702
9.24k
                            let v36 = C::unpack_value_array_2(ctx, v35);
12703
9.24k
                            let v240 = constructor_extend_to_gpr(ctx, v36.0, v5, &ExtendKind::Zero);
12704
9.24k
                            let v212 = &constructor_put_masked_in_imm8_gpr(ctx, v36.1, v5);
12705
9.24k
                            let v241 = constructor_x64_shr(ctx, v5, v240, v212);
12706
9.24k
                            let v242 = constructor_output_gpr(ctx, v241);
12707
9.24k
                            // Rule at src/isa/x64/lower.isle line 539.
12708
9.24k
                            return Some(v242);
12709
0
                        }
12710
0
                    }
12711
                }
12712
                &Opcode::Sshr => {
12713
209
                    let v1 = C::first_result(ctx, arg0);
12714
209
                    if let Some(v2) = v1 {
12715
209
                        let v3 = C::value_type(ctx, v2);
12716
209
                        match v3 {
12717
                            I128 => {
12718
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12719
0
                                let v215 = constructor_lo_gpr(ctx, v36.1);
12720
0
                                let v216 = C::put_in_regs(ctx, v36.0);
12721
0
                                let v260 = constructor_sar_i128(ctx, v216, v215);
12722
0
                                let v261 = C::output(ctx, v260);
12723
0
                                // Rule at src/isa/x64/lower.isle line 687.
12724
0
                                return Some(v261);
12725
                            }
12726
                            I8X16 => {
12727
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12728
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12729
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12730
0
                                let v262 = &C::xmm_to_xmm_mem(ctx, v57);
12731
0
                                let v263 = constructor_x64_punpcklbw(ctx, v57, v262);
12732
0
                                let v264 = &C::xmm_to_xmm_mem(ctx, v57);
12733
0
                                let v265 = constructor_x64_punpckhbw(ctx, v57, v264);
12734
0
                                let v81 = C::value_type(ctx, v36.1);
12735
0
                                let v266 = &constructor_sshr_i8x16_bigger_shift(ctx, v81, v231);
12736
0
                                let v267 = constructor_x64_psraw(ctx, v263, v266);
12737
0
                                let v268 = constructor_x64_psraw(ctx, v265, v266);
12738
0
                                let v269 = &C::xmm_to_xmm_mem(ctx, v268);
12739
0
                                let v270 = constructor_x64_packsswb(ctx, v267, v269);
12740
0
                                let v271 = constructor_output_xmm(ctx, v270);
12741
0
                                // Rule at src/isa/x64/lower.isle line 708.
12742
0
                                return Some(v271);
12743
                            }
12744
                            I16X8 => {
12745
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12746
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12747
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12748
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12749
0
                                let v272 = constructor_x64_psraw(ctx, v57, v232);
12750
0
                                let v273 = constructor_output_xmm(ctx, v272);
12751
0
                                // Rule at src/isa/x64/lower.isle line 737.
12752
0
                                return Some(v273);
12753
                            }
12754
                            I32X4 => {
12755
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12756
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12757
0
                                let v231 = &constructor_mask_xmm_shift(ctx, v3, v36.1);
12758
0
                                let v232 = &constructor_mov_rmi_to_xmm(ctx, v231);
12759
0
                                let v274 = constructor_x64_psrad(ctx, v57, v232);
12760
0
                                let v275 = constructor_output_xmm(ctx, v274);
12761
0
                                // Rule at src/isa/x64/lower.isle line 740.
12762
0
                                return Some(v275);
12763
                            }
12764
                            I64X2 => {
12765
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12766
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12767
0
                                let v277 = constructor_x64_pextrq(ctx, v57, 0x0);
12768
0
                                let v279 = constructor_x64_pextrq(ctx, v57, 0x1);
12769
0
                                let v280 = &constructor_put_masked_in_imm8_gpr(ctx, v36.1, I64);
12770
0
                                let v281 = constructor_x64_sar(ctx, I64, v277, v280);
12771
0
                                let v282 = constructor_x64_sar(ctx, I64, v279, v280);
12772
0
                                let v283 = &C::gpr_to_gpr_mem(ctx, v281);
12773
0
                                let v284 = &C::gpr_to_gpr_mem(ctx, v282);
12774
0
                                let v285 = constructor_make_i64x2_from_lanes(ctx, v283, v284);
12775
0
                                let v286 = constructor_output_xmm(ctx, v285);
12776
0
                                // Rule at src/isa/x64/lower.isle line 751.
12777
0
                                return Some(v286);
12778
                            }
12779
209
                            _ => {}
12780
209
                        }
12781
209
                        let v4 = C::fits_in_64(ctx, v3);
12782
209
                        if let Some(v5) = v4 {
12783
209
                            let v36 = C::unpack_value_array_2(ctx, v35);
12784
209
                            let v257 = constructor_extend_to_gpr(ctx, v36.0, v5, &ExtendKind::Sign);
12785
209
                            let v212 = &constructor_put_masked_in_imm8_gpr(ctx, v36.1, v5);
12786
209
                            let v258 = constructor_x64_sar(ctx, v5, v257, v212);
12787
209
                            let v259 = constructor_output_gpr(ctx, v258);
12788
209
                            // Rule at src/isa/x64/lower.isle line 650.
12789
209
                            return Some(v259);
12790
0
                        }
12791
0
                    }
12792
                }
12793
                &Opcode::Fadd => {
12794
0
                    let v1 = C::first_result(ctx, arg0);
12795
0
                    if let Some(v2) = v1 {
12796
0
                        let v3 = C::value_type(ctx, v2);
12797
0
                        match v3 {
12798
                            F32 => {
12799
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12800
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12801
0
                                if let Some(v49) = v48 {
12802
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12803
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12804
0
                                    let v1081 = constructor_x64_addss(ctx, v1069, v1080);
12805
0
                                    let v1082 = constructor_output_xmm(ctx, v1081);
12806
0
                                    // Rule at src/isa/x64/lower.isle line 2233.
12807
0
                                    return Some(v1082);
12808
0
                                }
12809
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12810
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12811
0
                                let v1072 = constructor_x64_addss(ctx, v57, v58);
12812
0
                                let v1073 = constructor_output_xmm(ctx, v1072);
12813
0
                                // Rule at src/isa/x64/lower.isle line 2222.
12814
0
                                return Some(v1073);
12815
                            }
12816
                            F64 => {
12817
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12818
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12819
0
                                if let Some(v49) = v48 {
12820
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12821
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12822
0
                                    let v1083 = constructor_x64_addsd(ctx, v1069, v1080);
12823
0
                                    let v1084 = constructor_output_xmm(ctx, v1083);
12824
0
                                    // Rule at src/isa/x64/lower.isle line 2235.
12825
0
                                    return Some(v1084);
12826
0
                                }
12827
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12828
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12829
0
                                let v1074 = constructor_x64_addsd(ctx, v57, v58);
12830
0
                                let v1075 = constructor_output_xmm(ctx, v1074);
12831
0
                                // Rule at src/isa/x64/lower.isle line 2224.
12832
0
                                return Some(v1075);
12833
                            }
12834
                            F32X4 => {
12835
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12836
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12837
0
                                if let Some(v49) = v48 {
12838
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12839
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12840
0
                                    let v1085 = constructor_x64_addps(ctx, v1069, v1080);
12841
0
                                    let v1086 = constructor_output_xmm(ctx, v1085);
12842
0
                                    // Rule at src/isa/x64/lower.isle line 2237.
12843
0
                                    return Some(v1086);
12844
0
                                }
12845
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12846
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12847
0
                                let v1076 = constructor_x64_addps(ctx, v57, v58);
12848
0
                                let v1077 = constructor_output_xmm(ctx, v1076);
12849
0
                                // Rule at src/isa/x64/lower.isle line 2226.
12850
0
                                return Some(v1077);
12851
                            }
12852
                            F64X2 => {
12853
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12854
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12855
0
                                if let Some(v49) = v48 {
12856
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12857
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12858
0
                                    let v1087 = constructor_x64_addpd(ctx, v1069, v1080);
12859
0
                                    let v1088 = constructor_output_xmm(ctx, v1087);
12860
0
                                    // Rule at src/isa/x64/lower.isle line 2239.
12861
0
                                    return Some(v1088);
12862
0
                                }
12863
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12864
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12865
0
                                let v1078 = constructor_x64_addpd(ctx, v57, v58);
12866
0
                                let v1079 = constructor_output_xmm(ctx, v1078);
12867
0
                                // Rule at src/isa/x64/lower.isle line 2228.
12868
0
                                return Some(v1079);
12869
                            }
12870
0
                            _ => {}
12871
                        }
12872
0
                    }
12873
                }
12874
                &Opcode::Fsub => {
12875
0
                    let v1 = C::first_result(ctx, arg0);
12876
0
                    if let Some(v2) = v1 {
12877
0
                        let v3 = C::value_type(ctx, v2);
12878
0
                        match v3 {
12879
                            F32 => {
12880
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12881
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12882
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12883
0
                                let v1089 = constructor_x64_subss(ctx, v57, v58);
12884
0
                                let v1090 = constructor_output_xmm(ctx, v1089);
12885
0
                                // Rule at src/isa/x64/lower.isle line 2244.
12886
0
                                return Some(v1090);
12887
                            }
12888
                            F64 => {
12889
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12890
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12891
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12892
0
                                let v1091 = constructor_x64_subsd(ctx, v57, v58);
12893
0
                                let v1092 = constructor_output_xmm(ctx, v1091);
12894
0
                                // Rule at src/isa/x64/lower.isle line 2246.
12895
0
                                return Some(v1092);
12896
                            }
12897
                            F32X4 => {
12898
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12899
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12900
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12901
0
                                let v1093 = constructor_x64_subps(ctx, v57, v58);
12902
0
                                let v1094 = constructor_output_xmm(ctx, v1093);
12903
0
                                // Rule at src/isa/x64/lower.isle line 2248.
12904
0
                                return Some(v1094);
12905
                            }
12906
                            F64X2 => {
12907
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12908
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12909
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12910
0
                                let v1095 = constructor_x64_subpd(ctx, v57, v58);
12911
0
                                let v1096 = constructor_output_xmm(ctx, v1095);
12912
0
                                // Rule at src/isa/x64/lower.isle line 2250.
12913
0
                                return Some(v1096);
12914
                            }
12915
0
                            _ => {}
12916
                        }
12917
0
                    }
12918
                }
12919
                &Opcode::Fmul => {
12920
0
                    let v1 = C::first_result(ctx, arg0);
12921
0
                    if let Some(v2) = v1 {
12922
0
                        let v3 = C::value_type(ctx, v2);
12923
0
                        match v3 {
12924
                            F32 => {
12925
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12926
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12927
0
                                if let Some(v49) = v48 {
12928
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12929
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12930
0
                                    let v1105 = constructor_x64_mulss(ctx, v1069, v1080);
12931
0
                                    let v1106 = constructor_output_xmm(ctx, v1105);
12932
0
                                    // Rule at src/isa/x64/lower.isle line 2266.
12933
0
                                    return Some(v1106);
12934
0
                                }
12935
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12936
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12937
0
                                let v1097 = constructor_x64_mulss(ctx, v57, v58);
12938
0
                                let v1098 = constructor_output_xmm(ctx, v1097);
12939
0
                                // Rule at src/isa/x64/lower.isle line 2255.
12940
0
                                return Some(v1098);
12941
                            }
12942
                            F64 => {
12943
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12944
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12945
0
                                if let Some(v49) = v48 {
12946
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12947
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12948
0
                                    let v1107 = constructor_x64_mulsd(ctx, v1069, v1080);
12949
0
                                    let v1108 = constructor_output_xmm(ctx, v1107);
12950
0
                                    // Rule at src/isa/x64/lower.isle line 2268.
12951
0
                                    return Some(v1108);
12952
0
                                }
12953
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12954
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12955
0
                                let v1099 = constructor_x64_mulsd(ctx, v57, v58);
12956
0
                                let v1100 = constructor_output_xmm(ctx, v1099);
12957
0
                                // Rule at src/isa/x64/lower.isle line 2257.
12958
0
                                return Some(v1100);
12959
                            }
12960
                            F32X4 => {
12961
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12962
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12963
0
                                if let Some(v49) = v48 {
12964
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12965
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12966
0
                                    let v1109 = constructor_x64_mulps(ctx, v1069, v1080);
12967
0
                                    let v1110 = constructor_output_xmm(ctx, v1109);
12968
0
                                    // Rule at src/isa/x64/lower.isle line 2270.
12969
0
                                    return Some(v1110);
12970
0
                                }
12971
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12972
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12973
0
                                let v1101 = constructor_x64_mulps(ctx, v57, v58);
12974
0
                                let v1102 = constructor_output_xmm(ctx, v1101);
12975
0
                                // Rule at src/isa/x64/lower.isle line 2259.
12976
0
                                return Some(v1102);
12977
                            }
12978
                            F64X2 => {
12979
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
12980
0
                                let v48 = &C::sinkable_load(ctx, v36.0);
12981
0
                                if let Some(v49) = v48 {
12982
0
                                    let v1069 = constructor_put_in_xmm(ctx, v36.1);
12983
0
                                    let v1080 = &constructor_sink_load_to_xmm_mem(ctx, v49);
12984
0
                                    let v1111 = constructor_x64_mulpd(ctx, v1069, v1080);
12985
0
                                    let v1112 = constructor_output_xmm(ctx, v1111);
12986
0
                                    // Rule at src/isa/x64/lower.isle line 2272.
12987
0
                                    return Some(v1112);
12988
0
                                }
12989
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
12990
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
12991
0
                                let v1103 = constructor_x64_mulpd(ctx, v57, v58);
12992
0
                                let v1104 = constructor_output_xmm(ctx, v1103);
12993
0
                                // Rule at src/isa/x64/lower.isle line 2261.
12994
0
                                return Some(v1104);
12995
                            }
12996
0
                            _ => {}
12997
                        }
12998
0
                    }
12999
                }
13000
                &Opcode::Fdiv => {
13001
0
                    let v1 = C::first_result(ctx, arg0);
13002
0
                    if let Some(v2) = v1 {
13003
0
                        let v3 = C::value_type(ctx, v2);
13004
0
                        match v3 {
13005
                            F32 => {
13006
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13007
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13008
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13009
0
                                let v1113 = constructor_x64_divss(ctx, v57, v58);
13010
0
                                let v1114 = constructor_output_xmm(ctx, v1113);
13011
0
                                // Rule at src/isa/x64/lower.isle line 2277.
13012
0
                                return Some(v1114);
13013
                            }
13014
                            F64 => {
13015
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13016
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13017
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13018
0
                                let v1115 = constructor_x64_divsd(ctx, v57, v58);
13019
0
                                let v1116 = constructor_output_xmm(ctx, v1115);
13020
0
                                // Rule at src/isa/x64/lower.isle line 2279.
13021
0
                                return Some(v1116);
13022
                            }
13023
                            F32X4 => {
13024
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13025
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13026
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13027
0
                                let v1117 = constructor_x64_divps(ctx, v57, v58);
13028
0
                                let v1118 = constructor_output_xmm(ctx, v1117);
13029
0
                                // Rule at src/isa/x64/lower.isle line 2281.
13030
0
                                return Some(v1118);
13031
                            }
13032
                            F64X2 => {
13033
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13034
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13035
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13036
0
                                let v1119 = constructor_x64_divpd(ctx, v57, v58);
13037
0
                                let v1120 = constructor_output_xmm(ctx, v1119);
13038
0
                                // Rule at src/isa/x64/lower.isle line 2283.
13039
0
                                return Some(v1120);
13040
                            }
13041
0
                            _ => {}
13042
                        }
13043
0
                    }
13044
                }
13045
                &Opcode::Fcopysign => {
13046
0
                    let v1 = C::first_result(ctx, arg0);
13047
0
                    if let Some(v2) = v1 {
13048
0
                        let v3 = C::value_type(ctx, v2);
13049
0
                        match v3 {
13050
                            F32 => {
13051
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13052
0
                                let v1845 = C::value_type(ctx, v36.0);
13053
0
                                if v1845 == F32 {
13054
0
                                    let v1888 = constructor_imm(ctx, F32, 0x80000000);
13055
0
                                    let v1889 = C::xmm_new(ctx, v1888);
13056
0
                                    let v1890 = &C::put_in_xmm_mem(ctx, v36.0);
13057
0
                                    let v1891 = constructor_x64_andnps(ctx, v1889, v1890);
13058
0
                                    let v1892 = &C::put_in_xmm_mem(ctx, v36.1);
13059
0
                                    let v1893 = constructor_x64_andps(ctx, v1889, v1892);
13060
0
                                    let v1894 = &C::xmm_to_xmm_mem(ctx, v1893);
13061
0
                                    let v1895 = constructor_x64_orps(ctx, v1891, v1894);
13062
0
                                    let v1896 = constructor_output_xmm(ctx, v1895);
13063
0
                                    // Rule at src/isa/x64/lower.isle line 3536.
13064
0
                                    return Some(v1896);
13065
0
                                }
13066
                            }
13067
                            F64 => {
13068
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13069
0
                                let v1845 = C::value_type(ctx, v36.0);
13070
0
                                if v1845 == F64 {
13071
0
                                    let v1897 = constructor_imm(ctx, F64, 0x8000000000000000);
13072
0
                                    let v1898 = C::xmm_new(ctx, v1897);
13073
0
                                    let v1890 = &C::put_in_xmm_mem(ctx, v36.0);
13074
0
                                    let v1899 = constructor_x64_andnpd(ctx, v1898, v1890);
13075
0
                                    let v1892 = &C::put_in_xmm_mem(ctx, v36.1);
13076
0
                                    let v1900 = constructor_x64_andpd(ctx, v1898, v1892);
13077
0
                                    let v1901 = &C::xmm_to_xmm_mem(ctx, v1900);
13078
0
                                    let v1902 = constructor_x64_orpd(ctx, v1899, v1901);
13079
0
                                    let v1903 = constructor_output_xmm(ctx, v1902);
13080
0
                                    // Rule at src/isa/x64/lower.isle line 3542.
13081
0
                                    return Some(v1903);
13082
0
                                }
13083
                            }
13084
0
                            _ => {}
13085
                        }
13086
0
                    }
13087
                }
13088
                &Opcode::Fmin => {
13089
0
                    let v1 = C::first_result(ctx, arg0);
13090
0
                    if let Some(v2) = v1 {
13091
0
                        let v3 = C::value_type(ctx, v2);
13092
0
                        match v3 {
13093
                            F32 => {
13094
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13095
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13096
0
                                let v369 = constructor_put_in_xmm(ctx, v36.1);
13097
0
                                let v1139 = constructor_xmm_min_max_seq(ctx, F32, true, v57, v369);
13098
0
                                let v1140 = constructor_output_xmm(ctx, v1139);
13099
0
                                // Rule at src/isa/x64/lower.isle line 2314.
13100
0
                                return Some(v1140);
13101
                            }
13102
                            F64 => {
13103
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13104
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13105
0
                                let v369 = constructor_put_in_xmm(ctx, v36.1);
13106
0
                                let v1141 = constructor_xmm_min_max_seq(ctx, F64, true, v57, v369);
13107
0
                                let v1142 = constructor_output_xmm(ctx, v1141);
13108
0
                                // Rule at src/isa/x64/lower.isle line 2316.
13109
0
                                return Some(v1142);
13110
                            }
13111
                            F32X4 => {
13112
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13113
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13114
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13115
0
                                let v1143 = constructor_x64_minps(ctx, v57, v58);
13116
0
                                let v1144 = constructor_put_in_xmm(ctx, v36.1);
13117
0
                                let v1145 = &C::put_in_xmm_mem(ctx, v36.0);
13118
0
                                let v1146 = constructor_x64_minps(ctx, v1144, v1145);
13119
0
                                let v1147 = &C::xmm_to_xmm_mem(ctx, v1146);
13120
0
                                let v1148 = constructor_x64_orps(ctx, v1143, v1147);
13121
0
                                let v1149 = &C::xmm_to_xmm_mem(ctx, v1146);
13122
0
                                let v1150 = constructor_x64_cmpps(ctx, v1148, v1149, &FcmpImm::Unordered);
13123
0
                                let v1151 = &C::xmm_to_xmm_mem(ctx, v1150);
13124
0
                                let v1152 = constructor_x64_orps(ctx, v1148, v1151);
13125
0
                                let v1154 = &C::xmi_imm(ctx, 0xA);
13126
0
                                let v1155 = constructor_x64_psrld(ctx, v1150, v1154);
13127
0
                                let v1156 = &C::xmm_to_xmm_mem(ctx, v1152);
13128
0
                                let v1157 = constructor_x64_andnps(ctx, v1155, v1156);
13129
0
                                let v1158 = constructor_output_xmm(ctx, v1157);
13130
0
                                // Rule at src/isa/x64/lower.isle line 2331.
13131
0
                                return Some(v1158);
13132
                            }
13133
                            F64X2 => {
13134
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13135
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13136
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13137
0
                                let v1159 = constructor_x64_minpd(ctx, v57, v58);
13138
0
                                let v1144 = constructor_put_in_xmm(ctx, v36.1);
13139
0
                                let v1145 = &C::put_in_xmm_mem(ctx, v36.0);
13140
0
                                let v1160 = constructor_x64_minpd(ctx, v1144, v1145);
13141
0
                                let v1161 = &C::xmm_to_xmm_mem(ctx, v1160);
13142
0
                                let v1162 = constructor_x64_orpd(ctx, v1159, v1161);
13143
0
                                let v1163 = &C::xmm_to_xmm_mem(ctx, v1160);
13144
0
                                let v1164 = constructor_x64_cmppd(ctx, v1159, v1163, &FcmpImm::Unordered);
13145
0
                                let v1165 = &C::xmm_to_xmm_mem(ctx, v1164);
13146
0
                                let v1166 = constructor_x64_orpd(ctx, v1162, v1165);
13147
0
                                let v1168 = &C::xmi_imm(ctx, 0xD);
13148
0
                                let v1169 = constructor_x64_psrlq(ctx, v1164, v1168);
13149
0
                                let v1170 = &C::xmm_to_xmm_mem(ctx, v1166);
13150
0
                                let v1171 = constructor_x64_andnpd(ctx, v1169, v1170);
13151
0
                                let v1172 = constructor_output_xmm(ctx, v1171);
13152
0
                                // Rule at src/isa/x64/lower.isle line 2374.
13153
0
                                return Some(v1172);
13154
                            }
13155
0
                            _ => {}
13156
                        }
13157
0
                    }
13158
                }
13159
                &Opcode::FminPseudo => {
13160
0
                    let v1 = C::first_result(ctx, arg0);
13161
0
                    if let Some(v2) = v1 {
13162
0
                        let v3 = C::value_type(ctx, v2);
13163
0
                        match v3 {
13164
                            F32 => {
13165
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13166
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13167
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13168
0
                                let v1208 = constructor_x64_minss(ctx, v1069, v165);
13169
0
                                let v1209 = constructor_output_xmm(ctx, v1208);
13170
0
                                // Rule at src/isa/x64/lower.isle line 2483.
13171
0
                                return Some(v1209);
13172
                            }
13173
                            F64 => {
13174
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13175
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13176
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13177
0
                                let v1210 = constructor_x64_minsd(ctx, v1069, v165);
13178
0
                                let v1211 = constructor_output_xmm(ctx, v1210);
13179
0
                                // Rule at src/isa/x64/lower.isle line 2485.
13180
0
                                return Some(v1211);
13181
                            }
13182
                            F32X4 => {
13183
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13184
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13185
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13186
0
                                let v1212 = constructor_x64_minps(ctx, v1069, v165);
13187
0
                                let v1213 = constructor_output_xmm(ctx, v1212);
13188
0
                                // Rule at src/isa/x64/lower.isle line 2487.
13189
0
                                return Some(v1213);
13190
                            }
13191
                            F64X2 => {
13192
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13193
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13194
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13195
0
                                let v1214 = constructor_x64_minpd(ctx, v1069, v165);
13196
0
                                let v1215 = constructor_output_xmm(ctx, v1214);
13197
0
                                // Rule at src/isa/x64/lower.isle line 2489.
13198
0
                                return Some(v1215);
13199
                            }
13200
0
                            _ => {}
13201
                        }
13202
0
                    }
13203
                }
13204
                &Opcode::Fmax => {
13205
0
                    let v1 = C::first_result(ctx, arg0);
13206
0
                    if let Some(v2) = v1 {
13207
0
                        let v3 = C::value_type(ctx, v2);
13208
0
                        match v3 {
13209
                            F32 => {
13210
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13211
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13212
0
                                let v369 = constructor_put_in_xmm(ctx, v36.1);
13213
0
                                let v1174 = constructor_xmm_min_max_seq(ctx, F32, false, v57, v369);
13214
0
                                let v1175 = constructor_output_xmm(ctx, v1174);
13215
0
                                // Rule at src/isa/x64/lower.isle line 2386.
13216
0
                                return Some(v1175);
13217
                            }
13218
                            F64 => {
13219
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13220
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13221
0
                                let v369 = constructor_put_in_xmm(ctx, v36.1);
13222
0
                                let v1176 = constructor_xmm_min_max_seq(ctx, F64, false, v57, v369);
13223
0
                                let v1177 = constructor_output_xmm(ctx, v1176);
13224
0
                                // Rule at src/isa/x64/lower.isle line 2388.
13225
0
                                return Some(v1177);
13226
                            }
13227
                            F32X4 => {
13228
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13229
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13230
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13231
0
                                let v1178 = constructor_x64_maxps(ctx, v57, v58);
13232
0
                                let v1144 = constructor_put_in_xmm(ctx, v36.1);
13233
0
                                let v1145 = &C::put_in_xmm_mem(ctx, v36.0);
13234
0
                                let v1179 = constructor_x64_maxps(ctx, v1144, v1145);
13235
0
                                let v1180 = &C::xmm_to_xmm_mem(ctx, v1179);
13236
0
                                let v1181 = constructor_x64_xorps(ctx, v1178, v1180);
13237
0
                                let v1182 = &C::xmm_to_xmm_mem(ctx, v1181);
13238
0
                                let v1183 = constructor_x64_orps(ctx, v1178, v1182);
13239
0
                                let v1184 = &C::xmm_to_xmm_mem(ctx, v1181);
13240
0
                                let v1185 = constructor_x64_subps(ctx, v1183, v1184);
13241
0
                                let v1186 = &C::xmm_to_xmm_mem(ctx, v1183);
13242
0
                                let v1187 = constructor_x64_cmpps(ctx, v1183, v1186, &FcmpImm::Unordered);
13243
0
                                let v1188 = &C::xmi_imm(ctx, 0xA);
13244
0
                                let v1189 = constructor_x64_psrld(ctx, v1187, v1188);
13245
0
                                let v1190 = &C::xmm_to_xmm_mem(ctx, v1185);
13246
0
                                let v1191 = constructor_x64_andnps(ctx, v1189, v1190);
13247
0
                                let v1192 = constructor_output_xmm(ctx, v1191);
13248
0
                                // Rule at src/isa/x64/lower.isle line 2394.
13249
0
                                return Some(v1192);
13250
                            }
13251
                            F64X2 => {
13252
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13253
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13254
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13255
0
                                let v1193 = constructor_x64_maxpd(ctx, v57, v58);
13256
0
                                let v1144 = constructor_put_in_xmm(ctx, v36.1);
13257
0
                                let v1145 = &C::put_in_xmm_mem(ctx, v36.0);
13258
0
                                let v1194 = constructor_x64_maxpd(ctx, v1144, v1145);
13259
0
                                let v1195 = &C::xmm_to_xmm_mem(ctx, v1194);
13260
0
                                let v1196 = constructor_x64_xorpd(ctx, v1193, v1195);
13261
0
                                let v1197 = &C::xmm_to_xmm_mem(ctx, v1196);
13262
0
                                let v1198 = constructor_x64_orpd(ctx, v1193, v1197);
13263
0
                                let v1199 = &C::xmm_to_xmm_mem(ctx, v1196);
13264
0
                                let v1200 = constructor_x64_subpd(ctx, v1198, v1199);
13265
0
                                let v1201 = &C::xmm_to_xmm_mem(ctx, v1198);
13266
0
                                let v1202 = constructor_x64_cmppd(ctx, v1198, v1201, &FcmpImm::Unordered);
13267
0
                                let v1203 = &C::xmi_imm(ctx, 0xD);
13268
0
                                let v1204 = constructor_x64_psrlq(ctx, v1202, v1203);
13269
0
                                let v1205 = &C::xmm_to_xmm_mem(ctx, v1200);
13270
0
                                let v1206 = constructor_x64_andnpd(ctx, v1204, v1205);
13271
0
                                let v1207 = constructor_output_xmm(ctx, v1206);
13272
0
                                // Rule at src/isa/x64/lower.isle line 2437.
13273
0
                                return Some(v1207);
13274
                            }
13275
0
                            _ => {}
13276
                        }
13277
0
                    }
13278
                }
13279
                &Opcode::FmaxPseudo => {
13280
0
                    let v1 = C::first_result(ctx, arg0);
13281
0
                    if let Some(v2) = v1 {
13282
0
                        let v3 = C::value_type(ctx, v2);
13283
0
                        match v3 {
13284
                            F32 => {
13285
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13286
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13287
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13288
0
                                let v1216 = constructor_x64_maxss(ctx, v1069, v165);
13289
0
                                let v1217 = constructor_output_xmm(ctx, v1216);
13290
0
                                // Rule at src/isa/x64/lower.isle line 2494.
13291
0
                                return Some(v1217);
13292
                            }
13293
                            F64 => {
13294
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13295
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13296
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13297
0
                                let v1218 = constructor_x64_maxsd(ctx, v1069, v165);
13298
0
                                let v1219 = constructor_output_xmm(ctx, v1218);
13299
0
                                // Rule at src/isa/x64/lower.isle line 2496.
13300
0
                                return Some(v1219);
13301
                            }
13302
                            F32X4 => {
13303
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13304
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13305
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13306
0
                                let v1220 = constructor_x64_maxps(ctx, v1069, v165);
13307
0
                                let v1221 = constructor_output_xmm(ctx, v1220);
13308
0
                                // Rule at src/isa/x64/lower.isle line 2498.
13309
0
                                return Some(v1221);
13310
                            }
13311
                            F64X2 => {
13312
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13313
0
                                let v1069 = constructor_put_in_xmm(ctx, v36.1);
13314
0
                                let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13315
0
                                let v1222 = constructor_x64_maxpd(ctx, v1069, v165);
13316
0
                                let v1223 = constructor_output_xmm(ctx, v1222);
13317
0
                                // Rule at src/isa/x64/lower.isle line 2500.
13318
0
                                return Some(v1223);
13319
                            }
13320
0
                            _ => {}
13321
                        }
13322
0
                    }
13323
                }
13324
                &Opcode::Snarrow => {
13325
0
                    let v1 = C::first_result(ctx, arg0);
13326
0
                    if let Some(v2) = v1 {
13327
0
                        let v3 = C::value_type(ctx, v2);
13328
0
                        match v3 {
13329
                            I8X16 => {
13330
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13331
0
                                let v1845 = C::value_type(ctx, v36.0);
13332
0
                                if v1845 == I16X8 {
13333
0
                                    let v57 = constructor_put_in_xmm(ctx, v36.0);
13334
0
                                    let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13335
0
                                    let v1846 = constructor_x64_packsswb(ctx, v57, v58);
13336
0
                                    let v1847 = constructor_output_xmm(ctx, v1846);
13337
0
                                    // Rule at src/isa/x64/lower.isle line 3463.
13338
0
                                    return Some(v1847);
13339
0
                                }
13340
                            }
13341
                            I16X8 => {
13342
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13343
0
                                let v1845 = C::value_type(ctx, v36.0);
13344
0
                                if v1845 == I32X4 {
13345
0
                                    let v57 = constructor_put_in_xmm(ctx, v36.0);
13346
0
                                    let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13347
0
                                    let v1848 = constructor_x64_packssdw(ctx, v57, v58);
13348
0
                                    let v1849 = constructor_output_xmm(ctx, v1848);
13349
0
                                    // Rule at src/isa/x64/lower.isle line 3466.
13350
0
                                    return Some(v1849);
13351
0
                                }
13352
                            }
13353
                            I32X4 => {
13354
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13355
0
                                let v159 = C::def_inst(ctx, v36.1);
13356
0
                                if let Some(v160) = v159 {
13357
0
                                    let v161 = &C::inst_data(ctx, v160);
13358
                                    if let &InstructionData::UnaryConst {
13359
0
                                        opcode: ref v1853,
13360
0
                                        constant_handle: v1854,
13361
0
                                    } = v161 {
13362
0
                                        if let &Opcode::Vconst = v1853 {
13363
0
                                            let v168 = C::def_inst(ctx, v36.0);
13364
0
                                            if let Some(v169) = v168 {
13365
0
                                                let v170 = &C::inst_data(ctx, v169);
13366
                                                if let &InstructionData::Unary {
13367
0
                                                    opcode: ref v171,
13368
0
                                                    arg: v172,
13369
0
                                                } = v170 {
13370
0
                                                    match v171 {
13371
                                                        &Opcode::FcvtToSintSat => {
13372
0
                                                            let v1850 = C::first_result(ctx, v169);
13373
0
                                                            if let Some(v1851) = v1850 {
13374
0
                                                                let v1852 = C::value_type(ctx, v1851);
13375
0
                                                                if v1852 == I64X2 {
13376
0
                                                                    let v1855 = C::u128_from_constant(ctx, v1854);
13377
0
                                                                    if let Some(v1856) = v1855 {
13378
0
                                                                        if v1856 == 0x0 {
13379
0
                                                                            let v173 = constructor_put_in_xmm(ctx, v172);
13380
0
                                                                            let v1857 = &C::xmm_to_xmm_mem(ctx, v173);
13381
0
                                                                            let v1858 = constructor_x64_cmppd(ctx, v173, v1857, &FcmpImm::Equal);
13382
0
                                                                            let v1859 = C::snarrow_umax_mask(ctx);
13383
0
                                                                            let v1860 = &constructor_const_to_xmm_mem(ctx, v1859);
13384
0
                                                                            let v1861 = constructor_x64_andps(ctx, v1858, v1860);
13385
0
                                                                            let v1862 = &C::xmm_to_xmm_mem(ctx, v1861);
13386
0
                                                                            let v1863 = constructor_x64_minpd(ctx, v173, v1862);
13387
0
                                                                            let v1864 = &C::xmm_to_xmm_mem(ctx, v1863);
13388
0
                                                                            let v1865 = constructor_x64_cvttpd2dq(ctx, v1864);
13389
0
                                                                            let v1866 = constructor_output_xmm(ctx, v1865);
13390
0
                                                                            // Rule at src/isa/x64/lower.isle line 3475.
13391
0
                                                                            return Some(v1866);
13392
0
                                                                        }
13393
0
                                                                    }
13394
0
                                                                }
13395
0
                                                            }
13396
                                                        }
13397
                                                        &Opcode::X86Cvtt2dq => {
13398
0
                                                            let v1850 = C::first_result(ctx, v169);
13399
0
                                                            if let Some(v1851) = v1850 {
13400
0
                                                                let v1852 = C::value_type(ctx, v1851);
13401
0
                                                                if v1852 == I64X2 {
13402
0
                                                                    let v1855 = C::u128_from_constant(ctx, v1854);
13403
0
                                                                    if let Some(v1856) = v1855 {
13404
0
                                                                        if v1856 == 0x0 {
13405
0
                                                                            let v426 = &C::put_in_xmm_mem(ctx, v172);
13406
0
                                                                            let v1867 = constructor_x64_cvttpd2dq(ctx, v426);
13407
0
                                                                            let v1868 = constructor_output_xmm(ctx, v1867);
13408
0
                                                                            // Rule at src/isa/x64/lower.isle line 3497.
13409
0
                                                                            return Some(v1868);
13410
0
                                                                        }
13411
0
                                                                    }
13412
0
                                                                }
13413
0
                                                            }
13414
                                                        }
13415
0
                                                        _ => {}
13416
                                                    }
13417
0
                                                }
13418
0
                                            }
13419
0
                                        }
13420
0
                                    }
13421
0
                                }
13422
                            }
13423
0
                            _ => {}
13424
                        }
13425
0
                    }
13426
                }
13427
                &Opcode::Unarrow => {
13428
0
                    let v1 = C::first_result(ctx, arg0);
13429
0
                    if let Some(v2) = v1 {
13430
0
                        let v3 = C::value_type(ctx, v2);
13431
0
                        match v3 {
13432
                            I8X16 => {
13433
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13434
0
                                let v1845 = C::value_type(ctx, v36.0);
13435
0
                                if v1845 == I16X8 {
13436
0
                                    let v57 = constructor_put_in_xmm(ctx, v36.0);
13437
0
                                    let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13438
0
                                    let v1869 = constructor_x64_packuswb(ctx, v57, v58);
13439
0
                                    let v1870 = constructor_output_xmm(ctx, v1869);
13440
0
                                    // Rule at src/isa/x64/lower.isle line 3503.
13441
0
                                    return Some(v1870);
13442
0
                                }
13443
                            }
13444
                            I16X8 => {
13445
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13446
0
                                let v1845 = C::value_type(ctx, v36.0);
13447
0
                                if v1845 == I32X4 {
13448
0
                                    let v57 = constructor_put_in_xmm(ctx, v36.0);
13449
0
                                    let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13450
0
                                    let v1871 = constructor_x64_packusdw(ctx, v57, v58);
13451
0
                                    let v1872 = constructor_output_xmm(ctx, v1871);
13452
0
                                    // Rule at src/isa/x64/lower.isle line 3506.
13453
0
                                    return Some(v1872);
13454
0
                                }
13455
                            }
13456
0
                            _ => {}
13457
                        }
13458
0
                    }
13459
                }
13460
                &Opcode::Uunarrow => {
13461
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
13462
0
                    let v159 = C::def_inst(ctx, v36.1);
13463
0
                    if let Some(v160) = v159 {
13464
0
                        let v161 = &C::inst_data(ctx, v160);
13465
                        if let &InstructionData::UnaryConst {
13466
0
                            opcode: ref v1853,
13467
0
                            constant_handle: v1854,
13468
0
                        } = v161 {
13469
0
                            if let &Opcode::Vconst = v1853 {
13470
0
                                let v168 = C::def_inst(ctx, v36.0);
13471
0
                                if let Some(v169) = v168 {
13472
0
                                    let v170 = &C::inst_data(ctx, v169);
13473
                                    if let &InstructionData::Unary {
13474
0
                                        opcode: ref v171,
13475
0
                                        arg: v172,
13476
0
                                    } = v170 {
13477
0
                                        if let &Opcode::FcvtToUintSat = v171 {
13478
0
                                            let v408 = C::value_type(ctx, v172);
13479
0
                                            if v408 == F64X2 {
13480
0
                                                let v1855 = C::u128_from_constant(ctx, v1854);
13481
0
                                                if let Some(v1856) = v1855 {
13482
0
                                                    if v1856 == 0x0 {
13483
0
                                                        let v173 = constructor_put_in_xmm(ctx, v172);
13484
0
                                                        let v2286 = constructor_xmm_zero(ctx, F64X2);
13485
0
                                                        let v2287 = &C::xmm_to_xmm_mem(ctx, v2286);
13486
0
                                                        let v2288 = constructor_x64_maxpd(ctx, v173, v2287);
13487
0
                                                        let v2289 = C::uunarrow_umax_mask(ctx);
13488
0
                                                        let v2290 = &constructor_const_to_xmm_mem(ctx, v2289);
13489
0
                                                        let v2291 = constructor_x64_minpd(ctx, v2288, v2290);
13490
0
                                                        let v2292 = &C::xmm_to_xmm_mem(ctx, v2291);
13491
0
                                                        let v2293 = constructor_x64_roundpd(ctx, v2292, &RoundImm::RoundZero);
13492
0
                                                        let v2294 = C::uunarrow_uint_mask(ctx);
13493
0
                                                        let v2295 = &constructor_const_to_xmm_mem(ctx, v2294);
13494
0
                                                        let v2296 = constructor_x64_addpd(ctx, v2293, v2295);
13495
0
                                                        let v2297 = &C::xmm_to_xmm_mem(ctx, v2286);
13496
0
                                                        let v2299 = constructor_x64_shufps(ctx, v2296, v2297, 0x88);
13497
0
                                                        let v2300 = constructor_output_xmm(ctx, v2299);
13498
0
                                                        // Rule at src/isa/x64/lower.isle line 4234.
13499
0
                                                        return Some(v2300);
13500
0
                                                    }
13501
0
                                                }
13502
0
                                            }
13503
0
                                        }
13504
0
                                    }
13505
0
                                }
13506
0
                            }
13507
0
                        }
13508
0
                    }
13509
                }
13510
                &Opcode::IaddPairwise => {
13511
0
                    let v1 = C::first_result(ctx, arg0);
13512
0
                    if let Some(v2) = v1 {
13513
0
                        let v3 = C::value_type(ctx, v2);
13514
0
                        match v3 {
13515
                            I16X8 => {
13516
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13517
0
                                let v159 = C::def_inst(ctx, v36.1);
13518
0
                                if let Some(v160) = v159 {
13519
0
                                    let v161 = &C::inst_data(ctx, v160);
13520
                                    if let &InstructionData::Unary {
13521
0
                                        opcode: ref v162,
13522
0
                                        arg: v163,
13523
0
                                    } = v161 {
13524
0
                                        match v162 {
13525
                                            &Opcode::SwidenHigh => {
13526
0
                                                let v168 = C::def_inst(ctx, v36.0);
13527
0
                                                if let Some(v169) = v168 {
13528
0
                                                    let v170 = &C::inst_data(ctx, v169);
13529
                                                    if let &InstructionData::Unary {
13530
0
                                                        opcode: ref v171,
13531
0
                                                        arg: v172,
13532
0
                                                    } = v170 {
13533
0
                                                        if let &Opcode::SwidenLow = v171 {
13534
0
                                                            if v163 == v172 {
13535
0
                                                                let v408 = C::value_type(ctx, v172);
13536
0
                                                                if v408 == I8X16 {
13537
0
                                                                    let v1739 = C::iadd_pairwise_mul_const_16(ctx);
13538
0
                                                                    let v1740 = constructor_x64_xmm_load_const(ctx, I8X16, v1739);
13539
0
                                                                    let v1741 = &C::put_in_xmm_mem(ctx, v172);
13540
0
                                                                    let v1742 = constructor_x64_pmaddubsw(ctx, v1740, v1741);
13541
0
                                                                    let v1743 = constructor_output_xmm(ctx, v1742);
13542
0
                                                                    // Rule at src/isa/x64/lower.isle line 3319.
13543
0
                                                                    return Some(v1743);
13544
0
                                                                }
13545
0
                                                            }
13546
0
                                                        }
13547
0
                                                    }
13548
0
                                                }
13549
                                            }
13550
                                            &Opcode::UwidenHigh => {
13551
0
                                                let v168 = C::def_inst(ctx, v36.0);
13552
0
                                                if let Some(v169) = v168 {
13553
0
                                                    let v170 = &C::inst_data(ctx, v169);
13554
                                                    if let &InstructionData::Unary {
13555
0
                                                        opcode: ref v171,
13556
0
                                                        arg: v172,
13557
0
                                                    } = v170 {
13558
0
                                                        if let &Opcode::UwidenLow = v171 {
13559
0
                                                            if v163 == v172 {
13560
0
                                                                let v408 = C::value_type(ctx, v172);
13561
0
                                                                if v408 == I8X16 {
13562
0
                                                                    let v1739 = C::iadd_pairwise_mul_const_16(ctx);
13563
0
                                                                    let v1749 = &constructor_const_to_xmm_mem(ctx, v1739);
13564
0
                                                                    let v1746 = constructor_put_in_xmm(ctx, v172);
13565
0
                                                                    let v1750 = constructor_x64_pmaddubsw(ctx, v1746, v1749);
13566
0
                                                                    let v1751 = constructor_output_xmm(ctx, v1750);
13567
0
                                                                    // Rule at src/isa/x64/lower.isle line 3335.
13568
0
                                                                    return Some(v1751);
13569
0
                                                                }
13570
0
                                                            }
13571
0
                                                        }
13572
0
                                                    }
13573
0
                                                }
13574
                                            }
13575
0
                                            _ => {}
13576
                                        }
13577
0
                                    }
13578
0
                                }
13579
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13580
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13581
0
                                let v1735 = constructor_x64_phaddw(ctx, v57, v58);
13582
0
                                let v1736 = constructor_output_xmm(ctx, v1735);
13583
0
                                // Rule at src/isa/x64/lower.isle line 3312.
13584
0
                                return Some(v1736);
13585
                            }
13586
                            I32X4 => {
13587
0
                                let v36 = C::unpack_value_array_2(ctx, v35);
13588
0
                                let v159 = C::def_inst(ctx, v36.1);
13589
0
                                if let Some(v160) = v159 {
13590
0
                                    let v161 = &C::inst_data(ctx, v160);
13591
0
                                    match v161 {
13592
                                        &InstructionData::Binary {
13593
0
                                            opcode: ref v1777,
13594
0
                                            args: ref v1778,
13595
0
                                        } => {
13596
0
                                            if let &Opcode::Imul = v1777 {
13597
0
                                                let v168 = C::def_inst(ctx, v36.0);
13598
0
                                                if let Some(v169) = v168 {
13599
0
                                                    let v170 = &C::inst_data(ctx, v169);
13600
                                                    if let &InstructionData::Binary {
13601
0
                                                        opcode: ref v1762,
13602
0
                                                        args: ref v1763,
13603
0
                                                    } = v170 {
13604
0
                                                        if let &Opcode::Imul = v1762 {
13605
0
                                                            let v1764 = C::unpack_value_array_2(ctx, v1763);
13606
0
                                                            let v1767 = C::def_inst(ctx, v1764.0);
13607
0
                                                            if let Some(v1768) = v1767 {
13608
0
                                                                let v1769 = &C::inst_data(ctx, v1768);
13609
                                                                if let &InstructionData::Unary {
13610
0
                                                                    opcode: ref v1770,
13611
0
                                                                    arg: v1771,
13612
0
                                                                } = v1769 {
13613
0
                                                                    if let &Opcode::SwidenLow = v1770 {
13614
0
                                                                        let v1772 = C::def_inst(ctx, v1764.1);
13615
0
                                                                        if let Some(v1773) = v1772 {
13616
0
                                                                            let v1774 = &C::inst_data(ctx, v1773);
13617
                                                                            if let &InstructionData::Unary {
13618
0
                                                                                opcode: ref v1775,
13619
0
                                                                                arg: v1776,
13620
0
                                                                            } = v1774 {
13621
0
                                                                                if let &Opcode::SwidenLow = v1775 {
13622
0
                                                                                    let v1779 = C::unpack_value_array_2(ctx, v1778);
13623
0
                                                                                    let v1782 = C::def_inst(ctx, v1779.0);
13624
0
                                                                                    if let Some(v1783) = v1782 {
13625
0
                                                                                        let v1784 = &C::inst_data(ctx, v1783);
13626
                                                                                        if let &InstructionData::Unary {
13627
0
                                                                                            opcode: ref v1785,
13628
0
                                                                                            arg: v1786,
13629
0
                                                                                        } = v1784 {
13630
0
                                                                                            if let &Opcode::SwidenHigh = v1785 {
13631
0
                                                                                                if v1771 == v1786 {
13632
0
                                                                                                    let v1787 = C::def_inst(ctx, v1779.1);
13633
0
                                                                                                    if let Some(v1788) = v1787 {
13634
0
                                                                                                        let v1789 = &C::inst_data(ctx, v1788);
13635
                                                                                                        if let &InstructionData::Unary {
13636
0
                                                                                                            opcode: ref v1790,
13637
0
                                                                                                            arg: v1791,
13638
0
                                                                                                        } = v1789 {
13639
0
                                                                                                            if let &Opcode::SwidenHigh = v1790 {
13640
0
                                                                                                                if v1776 == v1791 {
13641
0
                                                                                                                    let v1792 = constructor_put_in_xmm(ctx, v1771);
13642
0
                                                                                                                    let v1793 = &C::put_in_xmm_mem(ctx, v1776);
13643
0
                                                                                                                    let v1794 = constructor_x64_pmaddwd(ctx, v1792, v1793);
13644
0
                                                                                                                    let v1795 = constructor_output_xmm(ctx, v1794);
13645
0
                                                                                                                    // Rule at src/isa/x64/lower.isle line 3357.
13646
0
                                                                                                                    return Some(v1795);
13647
0
                                                                                                                }
13648
0
                                                                                                            }
13649
0
                                                                                                        }
13650
0
                                                                                                    }
13651
0
                                                                                                }
13652
0
                                                                                            }
13653
0
                                                                                        }
13654
0
                                                                                    }
13655
0
                                                                                }
13656
0
                                                                            }
13657
0
                                                                        }
13658
0
                                                                    }
13659
0
                                                                }
13660
0
                                                            }
13661
0
                                                        }
13662
0
                                                    }
13663
0
                                                }
13664
0
                                            }
13665
                                        }
13666
                                        &InstructionData::Unary {
13667
0
                                            opcode: ref v162,
13668
0
                                            arg: v163,
13669
0
                                        } => {
13670
0
                                            match v162 {
13671
                                                &Opcode::SwidenHigh => {
13672
0
                                                    let v168 = C::def_inst(ctx, v36.0);
13673
0
                                                    if let Some(v169) = v168 {
13674
0
                                                        let v170 = &C::inst_data(ctx, v169);
13675
                                                        if let &InstructionData::Unary {
13676
0
                                                            opcode: ref v171,
13677
0
                                                            arg: v172,
13678
0
                                                        } = v170 {
13679
0
                                                            if let &Opcode::SwidenLow = v171 {
13680
0
                                                                if v163 == v172 {
13681
0
                                                                    let v408 = C::value_type(ctx, v172);
13682
0
                                                                    if v408 == I16X8 {
13683
0
                                                                        let v1744 = C::iadd_pairwise_mul_const_32(ctx);
13684
0
                                                                        let v1745 = &constructor_const_to_xmm_mem(ctx, v1744);
13685
0
                                                                        let v1746 = constructor_put_in_xmm(ctx, v172);
13686
0
                                                                        let v1747 = constructor_x64_pmaddwd(ctx, v1746, v1745);
13687
0
                                                                        let v1748 = constructor_output_xmm(ctx, v1747);
13688
0
                                                                        // Rule at src/isa/x64/lower.isle line 3327.
13689
0
                                                                        return Some(v1748);
13690
0
                                                                    }
13691
0
                                                                }
13692
0
                                                            }
13693
0
                                                        }
13694
0
                                                    }
13695
                                                }
13696
                                                &Opcode::UwidenHigh => {
13697
0
                                                    let v168 = C::def_inst(ctx, v36.0);
13698
0
                                                    if let Some(v169) = v168 {
13699
0
                                                        let v170 = &C::inst_data(ctx, v169);
13700
                                                        if let &InstructionData::Unary {
13701
0
                                                            opcode: ref v171,
13702
0
                                                            arg: v172,
13703
0
                                                        } = v170 {
13704
0
                                                            if let &Opcode::UwidenLow = v171 {
13705
0
                                                                if v163 == v172 {
13706
0
                                                                    let v408 = C::value_type(ctx, v172);
13707
0
                                                                    if v408 == I16X8 {
13708
0
                                                                        let v1752 = C::iadd_pairwise_xor_const_32(ctx);
13709
0
                                                                        let v1753 = &constructor_const_to_xmm_mem(ctx, v1752);
13710
0
                                                                        let v1746 = constructor_put_in_xmm(ctx, v172);
13711
0
                                                                        let v1754 = constructor_x64_pxor(ctx, v1746, v1753);
13712
0
                                                                        let v1755 = C::iadd_pairwise_mul_const_32(ctx);
13713
0
                                                                        let v1756 = &constructor_const_to_xmm_mem(ctx, v1755);
13714
0
                                                                        let v1757 = constructor_x64_pmaddwd(ctx, v1754, v1756);
13715
0
                                                                        let v1758 = C::iadd_pairwise_addd_const_32(ctx);
13716
0
                                                                        let v1759 = &constructor_const_to_xmm_mem(ctx, v1758);
13717
0
                                                                        let v1760 = constructor_x64_paddd(ctx, v1757, v1759);
13718
0
                                                                        let v1761 = constructor_output_xmm(ctx, v1760);
13719
0
                                                                        // Rule at src/isa/x64/lower.isle line 3343.
13720
0
                                                                        return Some(v1761);
13721
0
                                                                    }
13722
0
                                                                }
13723
0
                                                            }
13724
0
                                                        }
13725
0
                                                    }
13726
                                                }
13727
0
                                                _ => {}
13728
                                            }
13729
                                        }
13730
0
                                        _ => {}
13731
                                    }
13732
0
                                }
13733
0
                                let v57 = constructor_put_in_xmm(ctx, v36.0);
13734
0
                                let v58 = &C::put_in_xmm_mem(ctx, v36.1);
13735
0
                                let v1737 = constructor_x64_phaddd(ctx, v57, v58);
13736
0
                                let v1738 = constructor_output_xmm(ctx, v1737);
13737
0
                                // Rule at src/isa/x64/lower.isle line 3315.
13738
0
                                return Some(v1738);
13739
                            }
13740
0
                            _ => {}
13741
                        }
13742
0
                    }
13743
                }
13744
                &Opcode::X86Pmaddubsw => {
13745
0
                    let v1 = C::first_result(ctx, arg0);
13746
0
                    if let Some(v2) = v1 {
13747
0
                        let v3 = C::value_type(ctx, v2);
13748
0
                        if v3 == I16X8 {
13749
0
                            let v36 = C::unpack_value_array_2(ctx, v35);
13750
0
                            let v1069 = constructor_put_in_xmm(ctx, v36.1);
13751
0
                            let v165 = &C::put_in_xmm_mem(ctx, v36.0);
13752
0
                            let v1070 = constructor_x64_pmaddubsw(ctx, v1069, v165);
13753
0
                            let v1071 = constructor_output_xmm(ctx, v1070);
13754
0
                            // Rule at src/isa/x64/lower.isle line 2217.
13755
0
                            return Some(v1071);
13756
0
                        }
13757
0
                    }
13758
                }
13759
                &Opcode::Iconcat => {
13760
0
                    let v36 = C::unpack_value_array_2(ctx, v35);
13761
0
                    let v1845 = C::value_type(ctx, v36.0);
13762
0
                    if v1845 == I64 {
13763
0
                        let v2261 = C::put_in_reg(ctx, v36.0);
13764
0
                        let v2262 = C::put_in_reg(ctx, v36.1);
13765
0
                        let v2263 = C::value_regs(ctx, v2261, v2262);
13766
0
                        let v2264 = C::output(ctx, v2263);
13767
0
                        // Rule at src/isa/x64/lower.isle line 4182.
13768
0
                        return Some(v2264);
13769
0
                    }
13770
                }
13771
0
                _ => {}
13772
            }
13773
        }
13774
        &InstructionData::BinaryImm8 {
13775
0
            opcode: ref v2118,
13776
0
            arg: v2119,
13777
0
            imm: v2120,
13778
0
        } => {
13779
0
            if let &Opcode::Extractlane = v2118 {
13780
0
                let v1 = C::first_result(ctx, arg0);
13781
0
                if let Some(v2) = v1 {
13782
0
                    let v2121 = C::u8_from_uimm8(ctx, v2120);
13783
0
                    match v2121 {
13784
                        0x0 => {
13785
0
                            let v3 = C::value_type(ctx, v2);
13786
0
                            let v149 = C::ty_scalar_float(ctx, v3);
13787
0
                            if let Some(v150) = v149 {
13788
0
                                let v2122 = constructor_output_value(ctx, v2119);
13789
0
                                // Rule at src/isa/x64/lower.isle line 3971.
13790
0
                                return Some(v2122);
13791
0
                            }
13792
                        }
13793
                        0x1 => {
13794
0
                            let v3 = C::value_type(ctx, v2);
13795
0
                            if v3 == F64 {
13796
0
                                let v2123 = C::value_type(ctx, v2119);
13797
0
                                let v2124 = C::ty_vec128(ctx, v2123);
13798
0
                                if let Some(v2125) = v2124 {
13799
0
                                    let v2126 = &C::put_in_xmm_mem(ctx, v2119);
13800
0
                                    let v2129 = constructor_x64_pshufd(ctx, v2126, 0xEE);
13801
0
                                    let v2130 = constructor_output_xmm(ctx, v2129);
13802
0
                                    // Rule at src/isa/x64/lower.isle line 3980.
13803
0
                                    return Some(v2130);
13804
0
                                }
13805
0
                            }
13806
                        }
13807
0
                        _ => {}
13808
                    }
13809
0
                    let v3 = C::value_type(ctx, v2);
13810
0
                    if v3 == F32 {
13811
0
                        let v2123 = C::value_type(ctx, v2119);
13812
0
                        let v2124 = C::ty_vec128(ctx, v2123);
13813
0
                        if let Some(v2125) = v2124 {
13814
0
                            let v2126 = &C::put_in_xmm_mem(ctx, v2119);
13815
0
                            let v2127 = constructor_x64_pshufd(ctx, v2126, v2121);
13816
0
                            let v2128 = constructor_output_xmm(ctx, v2127);
13817
0
                            // Rule at src/isa/x64/lower.isle line 3975.
13818
0
                            return Some(v2128);
13819
0
                        }
13820
0
                    }
13821
0
                }
13822
0
                let v2123 = C::value_type(ctx, v2119);
13823
0
                let v2131 = C::multi_lane(ctx, v2123);
13824
0
                if let Some(v2132) = v2131 {
13825
0
                    match v2132.0 {
13826
                        0x8 => {
13827
0
                            if v2132.1 == 0x10 {
13828
0
                                let v2135 = constructor_put_in_xmm(ctx, v2119);
13829
0
                                let v2121 = C::u8_from_uimm8(ctx, v2120);
13830
0
                                let v2136 = constructor_x64_pextrb(ctx, v2135, v2121);
13831
0
                                let v2137 = constructor_output_gpr(ctx, v2136);
13832
0
                                // Rule at src/isa/x64/lower.isle line 3988.
13833
0
                                return Some(v2137);
13834
0
                            }
13835
                        }
13836
                        0x10 => {
13837
0
                            if v2132.1 == 0x8 {
13838
0
                                let v2135 = constructor_put_in_xmm(ctx, v2119);
13839
0
                                let v2121 = C::u8_from_uimm8(ctx, v2120);
13840
0
                                let v2138 = constructor_x64_pextrw(ctx, v2135, v2121);
13841
0
                                let v2139 = constructor_output_gpr(ctx, v2138);
13842
0
                                // Rule at src/isa/x64/lower.isle line 3993.
13843
0
                                return Some(v2139);
13844
0
                            }
13845
                        }
13846
                        0x20 => {
13847
0
                            if v2132.1 == 0x4 {
13848
0
                                let v2135 = constructor_put_in_xmm(ctx, v2119);
13849
0
                                let v2121 = C::u8_from_uimm8(ctx, v2120);
13850
0
                                let v2140 = constructor_x64_pextrd(ctx, v2135, v2121);
13851
0
                                let v2141 = constructor_output_gpr(ctx, v2140);
13852
0
                                // Rule at src/isa/x64/lower.isle line 3998.
13853
0
                                return Some(v2141);
13854
0
                            }
13855
                        }
13856
                        0x40 => {
13857
0
                            if v2132.1 == 0x2 {
13858
0
                                let v2135 = constructor_put_in_xmm(ctx, v2119);
13859
0
                                let v2121 = C::u8_from_uimm8(ctx, v2120);
13860
0
                                let v2142 = constructor_x64_pextrq(ctx, v2135, v2121);
13861
0
                                let v2143 = constructor_output_gpr(ctx, v2142);
13862
0
                                // Rule at src/isa/x64/lower.isle line 4001.
13863
0
                                return Some(v2143);
13864
0
                            }
13865
                        }
13866
0
                        _ => {}
13867
                    }
13868
0
                }
13869
0
            }
13870
        }
13871
        &InstructionData::Call {
13872
141k
            opcode: ref v1582,
13873
141k
            args: v1583,
13874
141k
            func_ref: v1584,
13875
141k
        } => {
13876
141k
            if let &Opcode::Call = v1582 {
13877
141k
                let v1586 = C::func_ref_data(ctx, v1584);
13878
141k
                let v1585 = C::value_list_slice(ctx, v1583);
13879
141k
                let v1590 = C::gen_call(ctx, v1586.0, v1586.1, v1586.2, v1585);
13880
141k
                // Rule at src/isa/x64/lower.isle line 2982.
13881
141k
                return Some(v1590);
13882
0
            }
13883
        }
13884
        &InstructionData::CallIndirect {
13885
64.6k
            opcode: ref v1591,
13886
64.6k
            args: v1592,
13887
64.6k
            sig_ref: v1593,
13888
64.6k
        } => {
13889
64.6k
            if let &Opcode::CallIndirect = v1591 {
13890
64.6k
                let v1594 = C::value_list_slice(ctx, v1592);
13891
64.6k
                let v1595 = C::value_slice_unwrap(ctx, v1594);
13892
64.6k
                if let Some(v1596) = v1595 {
13893
64.6k
                    let v1599 = C::gen_call_indirect(ctx, v1593, v1596.0, v1596.1);
13894
64.6k
                    // Rule at src/isa/x64/lower.isle line 2985.
13895
64.6k
                    return Some(v1599);
13896
0
                }
13897
0
            }
13898
        }
13899
        &InstructionData::FloatCompare {
13900
0
            opcode: ref v813,
13901
0
            args: ref v814,
13902
0
            cond: ref v815,
13903
0
        } => {
13904
0
            if let &Opcode::Fcmp = v813 {
13905
0
                match v815 {
13906
                    &FloatCC::Equal => {
13907
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13908
0
                        let v819 = C::value_type(ctx, v816.0);
13909
0
                        let v825 = C::ty_vec128(ctx, v819);
13910
0
                        if let Some(v826) = v825 {
13911
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
13912
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
13913
0
                            let v830 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::Equal);
13914
0
                            let v831 = constructor_output_xmm(ctx, v830);
13915
0
                            // Rule at src/isa/x64/lower.isle line 1730.
13916
0
                            return Some(v831);
13917
0
                        }
13918
                    }
13919
                    &FloatCC::GreaterThan => {
13920
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13921
0
                        let v819 = C::value_type(ctx, v816.0);
13922
0
                        let v825 = C::ty_vec128(ctx, v819);
13923
0
                        if let Some(v826) = v825 {
13924
0
                            let v853 = constructor_put_in_xmm(ctx, v816.1);
13925
0
                            let v854 = &C::put_in_xmm_mem(ctx, v816.0);
13926
0
                            let v855 = constructor_x64_cmpp(ctx, v826, v853, v854, &FcmpImm::LessThan);
13927
0
                            let v856 = constructor_output_xmm(ctx, v855);
13928
0
                            // Rule at src/isa/x64/lower.isle line 1750.
13929
0
                            return Some(v856);
13930
0
                        }
13931
                    }
13932
                    &FloatCC::GreaterThanOrEqual => {
13933
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13934
0
                        let v819 = C::value_type(ctx, v816.0);
13935
0
                        let v825 = C::ty_vec128(ctx, v819);
13936
0
                        if let Some(v826) = v825 {
13937
0
                            let v853 = constructor_put_in_xmm(ctx, v816.1);
13938
0
                            let v854 = &C::put_in_xmm_mem(ctx, v816.0);
13939
0
                            let v857 = constructor_x64_cmpp(ctx, v826, v853, v854, &FcmpImm::LessThanOrEqual);
13940
0
                            let v858 = constructor_output_xmm(ctx, v857);
13941
0
                            // Rule at src/isa/x64/lower.isle line 1752.
13942
0
                            return Some(v858);
13943
0
                        }
13944
                    }
13945
                    &FloatCC::LessThan => {
13946
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13947
0
                        let v819 = C::value_type(ctx, v816.0);
13948
0
                        let v825 = C::ty_vec128(ctx, v819);
13949
0
                        if let Some(v826) = v825 {
13950
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
13951
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
13952
0
                            let v836 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::LessThan);
13953
0
                            let v837 = constructor_output_xmm(ctx, v836);
13954
0
                            // Rule at src/isa/x64/lower.isle line 1734.
13955
0
                            return Some(v837);
13956
0
                        }
13957
                    }
13958
                    &FloatCC::LessThanOrEqual => {
13959
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13960
0
                        let v819 = C::value_type(ctx, v816.0);
13961
0
                        let v825 = C::ty_vec128(ctx, v819);
13962
0
                        if let Some(v826) = v825 {
13963
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
13964
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
13965
0
                            let v839 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::LessThanOrEqual);
13966
0
                            let v840 = constructor_output_xmm(ctx, v839);
13967
0
                            // Rule at src/isa/x64/lower.isle line 1736.
13968
0
                            return Some(v840);
13969
0
                        }
13970
                    }
13971
                    &FloatCC::NotEqual => {
13972
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13973
0
                        let v819 = C::value_type(ctx, v816.0);
13974
0
                        let v825 = C::ty_vec128(ctx, v819);
13975
0
                        if let Some(v826) = v825 {
13976
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
13977
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
13978
0
                            let v833 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::NotEqual);
13979
0
                            let v834 = constructor_output_xmm(ctx, v833);
13980
0
                            // Rule at src/isa/x64/lower.isle line 1732.
13981
0
                            return Some(v834);
13982
0
                        }
13983
                    }
13984
                    &FloatCC::Ordered => {
13985
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13986
0
                        let v819 = C::value_type(ctx, v816.0);
13987
0
                        let v825 = C::ty_vec128(ctx, v819);
13988
0
                        if let Some(v826) = v825 {
13989
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
13990
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
13991
0
                            let v842 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::Ordered);
13992
0
                            let v843 = constructor_output_xmm(ctx, v842);
13993
0
                            // Rule at src/isa/x64/lower.isle line 1738.
13994
0
                            return Some(v843);
13995
0
                        }
13996
                    }
13997
                    &FloatCC::Unordered => {
13998
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
13999
0
                        let v819 = C::value_type(ctx, v816.0);
14000
0
                        let v825 = C::ty_vec128(ctx, v819);
14001
0
                        if let Some(v826) = v825 {
14002
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
14003
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
14004
0
                            let v845 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::Unordered);
14005
0
                            let v846 = constructor_output_xmm(ctx, v845);
14006
0
                            // Rule at src/isa/x64/lower.isle line 1740.
14007
0
                            return Some(v846);
14008
0
                        }
14009
                    }
14010
                    &FloatCC::UnorderedOrGreaterThan => {
14011
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
14012
0
                        let v819 = C::value_type(ctx, v816.0);
14013
0
                        let v825 = C::ty_vec128(ctx, v819);
14014
0
                        if let Some(v826) = v825 {
14015
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
14016
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
14017
0
                            let v848 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::UnorderedOrGreaterThan);
14018
0
                            let v849 = constructor_output_xmm(ctx, v848);
14019
0
                            // Rule at src/isa/x64/lower.isle line 1742.
14020
0
                            return Some(v849);
14021
0
                        }
14022
                    }
14023
                    &FloatCC::UnorderedOrGreaterThanOrEqual => {
14024
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
14025
0
                        let v819 = C::value_type(ctx, v816.0);
14026
0
                        let v825 = C::ty_vec128(ctx, v819);
14027
0
                        if let Some(v826) = v825 {
14028
0
                            let v827 = constructor_put_in_xmm(ctx, v816.0);
14029
0
                            let v828 = &C::put_in_xmm_mem(ctx, v816.1);
14030
0
                            let v851 = constructor_x64_cmpp(ctx, v826, v827, v828, &FcmpImm::UnorderedOrGreaterThanOrEqual);
14031
0
                            let v852 = constructor_output_xmm(ctx, v851);
14032
0
                            // Rule at src/isa/x64/lower.isle line 1744.
14033
0
                            return Some(v852);
14034
0
                        }
14035
                    }
14036
                    &FloatCC::UnorderedOrLessThan => {
14037
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
14038
0
                        let v819 = C::value_type(ctx, v816.0);
14039
0
                        let v825 = C::ty_vec128(ctx, v819);
14040
0
                        if let Some(v826) = v825 {
14041
0
                            let v853 = constructor_put_in_xmm(ctx, v816.1);
14042
0
                            let v854 = &C::put_in_xmm_mem(ctx, v816.0);
14043
0
                            let v859 = constructor_x64_cmpp(ctx, v826, v853, v854, &FcmpImm::UnorderedOrGreaterThan);
14044
0
                            let v860 = constructor_output_xmm(ctx, v859);
14045
0
                            // Rule at src/isa/x64/lower.isle line 1754.
14046
0
                            return Some(v860);
14047
0
                        }
14048
                    }
14049
                    &FloatCC::UnorderedOrLessThanOrEqual => {
14050
0
                        let v816 = C::unpack_value_array_2(ctx, v814);
14051
0
                        let v819 = C::value_type(ctx, v816.0);
14052
0
                        let v825 = C::ty_vec128(ctx, v819);
14053
0
                        if let Some(v826) = v825 {
14054
0
                            let v853 = constructor_put_in_xmm(ctx, v816.1);
14055
0
                            let v854 = &C::put_in_xmm_mem(ctx, v816.0);
14056
0
                            let v861 = constructor_x64_cmpp(ctx, v826, v853, v854, &FcmpImm::UnorderedOrGreaterThanOrEqual);
14057
0
                            let v862 = constructor_output_xmm(ctx, v861);
14058
0
                            // Rule at src/isa/x64/lower.isle line 1756.
14059
0
                            return Some(v862);
14060
0
                        }
14061
                    }
14062
0
                    _ => {}
14063
                }
14064
0
                let v816 = C::unpack_value_array_2(ctx, v814);
14065
0
                let v819 = C::value_type(ctx, v816.0);
14066
0
                let v820 = C::ty_scalar_float(ctx, v819);
14067
0
                if let Some(v821) = v820 {
14068
0
                    let v822 = &constructor_emit_fcmp(ctx, v815, v816.0, v816.1);
14069
0
                    let v823 = constructor_lower_fcmp_bool(ctx, v822);
14070
0
                    let v824 = C::output(ctx, v823);
14071
0
                    // Rule at src/isa/x64/lower.isle line 1723.
14072
0
                    return Some(v824);
14073
0
                }
14074
0
            }
14075
        }
14076
        &InstructionData::FuncAddr {
14077
0
            opcode: ref v1505,
14078
0
            func_ref: v1506,
14079
0
        } => {
14080
0
            if let &Opcode::FuncAddr = v1505 {
14081
0
                let v1507 = C::func_ref_data(ctx, v1506);
14082
0
                let v1512 = constructor_load_ext_name(ctx, v1507.1, 0x0);
14083
0
                let v1513 = constructor_output_reg(ctx, v1512);
14084
0
                // Rule at src/isa/x64/lower.isle line 2924.
14085
0
                return Some(v1513);
14086
0
            }
14087
        }
14088
        &InstructionData::IntAddTrap {
14089
0
            opcode: ref v645,
14090
0
            args: ref v646,
14091
0
            code: ref v647,
14092
0
        } => {
14093
0
            if let &Opcode::UaddOverflowTrap = v645 {
14094
0
                let v1 = C::first_result(ctx, arg0);
14095
0
                if let Some(v2) = v1 {
14096
0
                    let v3 = C::value_type(ctx, v2);
14097
0
                    let v4 = C::fits_in_64(ctx, v3);
14098
0
                    if let Some(v5) = v4 {
14099
0
                        let v648 = C::unpack_value_array_2(ctx, v646);
14100
0
                        let v664 = &C::sinkable_load(ctx, v648.0);
14101
0
                        if let Some(v665) = v664 {
14102
0
                            let v659 = constructor_put_in_gpr(ctx, v648.1);
14103
0
                            let v666 = &constructor_sink_load_to_gpr_mem_imm(ctx, v665);
14104
0
                            let v667 = &constructor_x64_add_with_flags_paired(ctx, v5, v659, v666);
14105
0
                            let v654 = &constructor_trap_if(ctx, &CC::B, v647);
14106
0
                            let v668 = constructor_with_flags(ctx, v667, v654);
14107
0
                            let v669 = C::output(ctx, v668);
14108
0
                            // Rule at src/isa/x64/lower.isle line 1511.
14109
0
                            return Some(v669);
14110
0
                        }
14111
0
                        let v657 = &C::simm32_from_value(ctx, v648.0);
14112
0
                        if let Some(v658) = v657 {
14113
0
                            let v659 = constructor_put_in_gpr(ctx, v648.1);
14114
0
                            let v660 = &constructor_x64_add_with_flags_paired(ctx, v5, v659, v658);
14115
0
                            let v661 = &constructor_trap_if(ctx, &CC::B, v647);
14116
0
                            let v662 = constructor_with_flags(ctx, v660, v661);
14117
0
                            let v663 = C::output(ctx, v662);
14118
0
                            // Rule at src/isa/x64/lower.isle line 1505.
14119
0
                            return Some(v663);
14120
0
                        }
14121
0
                        let v651 = constructor_put_in_gpr(ctx, v648.0);
14122
0
                        let v652 = &constructor_put_in_gpr_mem_imm(ctx, v648.1);
14123
0
                        let v653 = &constructor_x64_add_with_flags_paired(ctx, v5, v651, v652);
14124
0
                        let v654 = &constructor_trap_if(ctx, &CC::B, v647);
14125
0
                        let v655 = constructor_with_flags(ctx, v653, v654);
14126
0
                        let v656 = C::output(ctx, v655);
14127
0
                        // Rule at src/isa/x64/lower.isle line 1497.
14128
0
                        return Some(v656);
14129
0
                    }
14130
0
                }
14131
0
            }
14132
        }
14133
        &InstructionData::IntCompare {
14134
10.7k
            opcode: ref v676,
14135
10.7k
            args: ref v677,
14136
10.7k
            cond: ref v678,
14137
10.7k
        } => {
14138
10.7k
            if let &Opcode::Icmp = v676 {
14139
10.7k
                match v678 {
14140
                    &IntCC::Equal => {
14141
1.96k
                        let v679 = C::unpack_value_array_2(ctx, v677);
14142
1.96k
                        let v682 = C::value_type(ctx, v679.0);
14143
1.96k
                        let v730 = C::ty_vec128(ctx, v682);
14144
1.96k
                        if let Some(
v7310
) = v730 {
14145
0
                            let v732 = constructor_put_in_xmm(ctx, v679.0);
14146
0
                            let v733 = &C::put_in_xmm_mem(ctx, v679.1);
14147
0
                            let v734 = constructor_x64_pcmpeq(ctx, v731, v732, v733);
14148
0
                            let v735 = constructor_output_xmm(ctx, v734);
14149
0
                            // Rule at src/isa/x64/lower.isle line 1573.
14150
0
                            return Some(v735);
14151
1.96k
                        }
14152
                    }
14153
                    &IntCC::NotEqual => {
14154
2.25k
                        let v679 = C::unpack_value_array_2(ctx, v677);
14155
2.25k
                        let v682 = C::value_type(ctx, v679.0);
14156
2.25k
                        let v730 = C::ty_vec128(ctx, v682);
14157
2.25k
                        if let Some(
v7310
) = v730 {
14158
0
                            let v732 = constructor_put_in_xmm(ctx, v679.0);
14159
0
                            let v733 = &C::put_in_xmm_mem(ctx, v679.1);
14160
0
                            let v734 = constructor_x64_pcmpeq(ctx, v731, v732, v733);
14161
0
                            let v736 = constructor_vector_all_ones(ctx);
14162
0
                            let v737 = &C::xmm_to_xmm_mem(ctx, v736);
14163
0
                            let v738 = constructor_x64_pxor(ctx, v734, v737);
14164
0
                            let v739 = constructor_output_xmm(ctx, v738);
14165
0
                            // Rule at src/isa/x64/lower.isle line 1578.
14166
0
                            return Some(v739);
14167
2.25k
                        }
14168
                    }
14169
                    &IntCC::SignedGreaterThan => {
14170
64
                        let v1 = C::first_result(ctx, arg0);
14171
64
                        if let Some(v2) = v1 {
14172
64
                            let v3 = C::value_type(ctx, v2);
14173
64
                            if v3 == I8 {
14174
64
                                let v679 = C::unpack_value_array_2(ctx, v677);
14175
64
                                let v700 = C::def_inst(ctx, v679.0);
14176
64
                                if let Some(v701) = v700 {
14177
64
                                    let v702 = &C::inst_data(ctx, v701);
14178
                                    if let &InstructionData::UnaryImm {
14179
0
                                        opcode: ref v703,
14180
0
                                        imm: v704,
14181
64
                                    } = v702 {
14182
0
                                        if let &Opcode::Iconst = v703 {
14183
0
                                            let v705 = C::u64_from_imm64(ctx, v704);
14184
0
                                            if v705 == 0x0 {
14185
0
                                                let v706 = C::value_type(ctx, v679.1);
14186
0
                                                match v706 {
14187
                                                    I32 => {
14188
0
                                                        let v707 = constructor_put_in_gpr(ctx, v679.1);
14189
0
                                                        let v719 = Imm8Reg::Imm8 {
14190
0
                                                            imm: 0x1F,
14191
0
                                                        };
14192
0
                                                        let v720 = &C::imm8_reg_to_imm8_gpr(ctx, &v719);
14193
0
                                                        let v723 = constructor_x64_shr(ctx, I32, v707, v720);
14194
0
                                                        let v724 = constructor_output_gpr(ctx, v723);
14195
0
                                                        // Rule at src/isa/x64/lower.isle line 1557.
14196
0
                                                        return Some(v724);
14197
                                                    }
14198
                                                    I64 => {
14199
0
                                                        let v707 = constructor_put_in_gpr(ctx, v679.1);
14200
0
                                                        let v696 = Imm8Reg::Imm8 {
14201
0
                                                            imm: 0x3F,
14202
0
                                                        };
14203
0
                                                        let v697 = &C::imm8_reg_to_imm8_gpr(ctx, &v696);
14204
0
                                                        let v708 = constructor_x64_shr(ctx, I64, v707, v697);
14205
0
                                                        let v709 = constructor_output_gpr(ctx, v708);
14206
0
                                                        // Rule at src/isa/x64/lower.isle line 1541.
14207
0
                                                        return Some(v709);
14208
                                                    }
14209
0
                                                    _ => {}
14210
                                                }
14211
0
                                            }
14212
0
                                        }
14213
64
                                    }
14214
0
                                }
14215
0
                            }
14216
0
                        }
14217
64
                        let v679 = C::unpack_value_array_2(ctx, v677);
14218
64
                        let v682 = C::value_type(ctx, v679.0);
14219
64
                        let v730 = C::ty_vec128(ctx, v682);
14220
64
                        if let Some(
v7310
) = v730 {
14221
0
                            let v732 = constructor_put_in_xmm(ctx, v679.0);
14222
0
                            let v733 = &C::put_in_xmm_mem(ctx, v679.1);
14223
0
                            let v740 = constructor_x64_pcmpgt(ctx, v731, v732, v733);
14224
0
                            let v741 = constructor_output_xmm(ctx, v740);
14225
0
                            // Rule at src/isa/x64/lower.isle line 1585.
14226
0
                            return Some(v741);
14227
64
                        }
14228
                    }
14229
                    &IntCC::SignedGreaterThanOrEqual => {
14230
0
                        let v1 = C::first_result(ctx, arg0);
14231
0
                        if let Some(v2) = v1 {
14232
0
                            let v3 = C::value_type(ctx, v2);
14233
0
                            if v3 == I8 {
14234
0
                                let v679 = C::unpack_value_array_2(ctx, v677);
14235
0
                                let v682 = C::value_type(ctx, v679.0);
14236
0
                                match v682 {
14237
                                    I32 => {
14238
0
                                        let v688 = C::def_inst(ctx, v679.1);
14239
0
                                        if let Some(v689) = v688 {
14240
0
                                            let v690 = &C::inst_data(ctx, v689);
14241
                                            if let &InstructionData::UnaryImm {
14242
0
                                                opcode: ref v691,
14243
0
                                                imm: v692,
14244
0
                                            } = v690 {
14245
0
                                                if let &Opcode::Iconst = v691 {
14246
0
                                                    let v693 = C::u64_from_imm64(ctx, v692);
14247
0
                                                    if v693 == 0x0 {
14248
0
                                                        let v694 = constructor_put_in_gpr(ctx, v679.0);
14249
0
                                                        let v714 = constructor_x64_not(ctx, I64, v694);
14250
0
                                                        let v719 = Imm8Reg::Imm8 {
14251
0
                                                            imm: 0x1F,
14252
0
                                                        };
14253
0
                                                        let v725 = &C::imm8_reg_to_imm8_gpr(ctx, &v719);
14254
0
                                                        let v728 = constructor_x64_shr(ctx, I32, v714, v725);
14255
0
                                                        let v729 = constructor_output_gpr(ctx, v728);
14256
0
                                                        // Rule at src/isa/x64/lower.isle line 1565.
14257
0
                                                        return Some(v729);
14258
0
                                                    }
14259
0
                                                }
14260
0
                                            }
14261
0
                                        }
14262
                                    }
14263
                                    I64 => {
14264
0
                                        let v688 = C::def_inst(ctx, v679.1);
14265
0
                                        if let Some(v689) = v688 {
14266
0
                                            let v690 = &C::inst_data(ctx, v689);
14267
                                            if let &InstructionData::UnaryImm {
14268
0
                                                opcode: ref v691,
14269
0
                                                imm: v692,
14270
0
                                            } = v690 {
14271
0
                                                if let &Opcode::Iconst = v691 {
14272
0
                                                    let v693 = C::u64_from_imm64(ctx, v692);
14273
0
                                                    if v693 == 0x0 {
14274
0
                                                        let v694 = constructor_put_in_gpr(ctx, v679.0);
14275
0
                                                        let v714 = constructor_x64_not(ctx, I64, v694);
14276
0
                                                        let v696 = Imm8Reg::Imm8 {
14277
0
                                                            imm: 0x3F,
14278
0
                                                        };
14279
0
                                                        let v711 = &C::imm8_reg_to_imm8_gpr(ctx, &v696);
14280
0
                                                        let v715 = constructor_x64_shr(ctx, I64, v714, v711);
14281
0
                                                        let v716 = constructor_output_gpr(ctx, v715);
14282
0
                                                        // Rule at src/isa/x64/lower.isle line 1549.
14283
0
                                                        return Some(v716);
14284
0
                                                    }
14285
0
                                                }
14286
0
                                            }
14287
0
                                        }
14288
                                    }
14289
0
                                    _ => {}
14290
                                }
14291
0
                            }
14292
0
                        }
14293
0
                        let v679 = C::unpack_value_array_2(ctx, v677);
14294
0
                        let v682 = C::value_type(ctx, v679.0);
14295
0
                        let v730 = C::ty_vec128(ctx, v682);
14296
0
                        if let Some(v731) = v730 {
14297
0
                            let v774 = constructor_has_pmaxs(ctx, v731);
14298
0
                            if v774 == true {
14299
0
                                let v732 = constructor_put_in_xmm(ctx, v679.0);
14300
0
                                let v757 = constructor_put_in_xmm(ctx, v679.0);
14301
0
                                let v775 = &C::put_in_xmm_mem(ctx, v679.1);
14302
0
                                let v776 = constructor_x64_pmaxs(ctx, v731, v757, v775);
14303
0
                                let v777 = &C::xmm_to_xmm_mem(ctx, v776);
14304
0
                                let v778 = constructor_x64_pcmpeq(ctx, v731, v732, v777);
14305
0
                                let v779 = constructor_output_xmm(ctx, v778);
14306
0
                                // Rule at src/isa/x64/lower.isle line 1635.
14307
0
                                return Some(v779);
14308
0
                            }
14309
0
                            let v742 = constructor_put_in_xmm(ctx, v679.1);
14310
0
                            let v743 = &C::put_in_xmm_mem(ctx, v679.0);
14311
0
                            let v744 = constructor_x64_pcmpgt(ctx, v731, v742, v743);
14312
0
                            let v736 = constructor_vector_all_ones(ctx);
14313
0
                            let v737 = &C::xmm_to_xmm_mem(ctx, v736);
14314
0
                            let v780 = constructor_x64_pxor(ctx, v744, v737);
14315
0
                            let v781 = constructor_output_xmm(ctx, v780);
14316
0
                            // Rule at src/isa/x64/lower.isle line 1641.
14317
0
                            return Some(v781);
14318
0
                        }
14319
                    }
14320
                    &IntCC::SignedLessThan => {
14321
15
                        let v1 = C::first_result(ctx, arg0);
14322
15
                        if let Some(v2) = v1 {
14323
15
                            let v3 = C::value_type(ctx, v2);
14324
15
                            if v3 == I8 {
14325
15
                                let v679 = C::unpack_value_array_2(ctx, v677);
14326
15
                                let v682 = C::value_type(ctx, v679.0);
14327
15
                                match v682 {
14328
                                    I32 => {
14329
15
                                        let v688 = C::def_inst(ctx, v679.1);
14330
15
                                        if let Some(
v68914
) = v688 {
14331
14
                                            let v690 = &C::inst_data(ctx, v689);
14332
                                            if let &InstructionData::UnaryImm {
14333
8
                                                opcode: ref v691,
14334
8
                                                imm: v692,
14335
14
                                            } = v690 {
14336
8
                                                if let &Opcode::Iconst = v691 {
14337
8
                                                    let v693 = C::u64_from_imm64(ctx, v692);
14338
8
                                                    if v693 == 0x0 {
14339
8
                                                        let v694 = constructor_put_in_gpr(ctx, v679.0);
14340
8
                                                        let v719 = Imm8Reg::Imm8 {
14341
8
                                                            imm: 0x1F,
14342
8
                                                        };
14343
8
                                                        let v720 = &C::imm8_reg_to_imm8_gpr(ctx, &v719);
14344
8
                                                        let v721 = constructor_x64_shr(ctx, I32, v694, v720);
14345
8
                                                        let v722 = constructor_output_gpr(ctx, v721);
14346
8
                                                        // Rule at src/isa/x64/lower.isle line 1553.
14347
8
                                                        return Some(v722);
14348
0
                                                    }
14349
0
                                                }
14350
6
                                            }
14351
1
                                        }
14352
                                    }
14353
                                    I64 => {
14354
0
                                        let v688 = C::def_inst(ctx, v679.1);
14355
0
                                        if let Some(v689) = v688 {
14356
0
                                            let v690 = &C::inst_data(ctx, v689);
14357
                                            if let &InstructionData::UnaryImm {
14358
0
                                                opcode: ref v691,
14359
0
                                                imm: v692,
14360
0
                                            } = v690 {
14361
0
                                                if let &Opcode::Iconst = v691 {
14362
0
                                                    let v693 = C::u64_from_imm64(ctx, v692);
14363
0
                                                    if v693 == 0x0 {
14364
0
                                                        let v694 = constructor_put_in_gpr(ctx, v679.0);
14365
0
                                                        let v696 = Imm8Reg::Imm8 {
14366
0
                                                            imm: 0x3F,
14367
0
                                                        };
14368
0
                                                        let v697 = &C::imm8_reg_to_imm8_gpr(ctx, &v696);
14369
0
                                                        let v698 = constructor_x64_shr(ctx, I64, v694, v697);
14370
0
                                                        let v699 = constructor_output_gpr(ctx, v698);
14371
0
                                                        // Rule at src/isa/x64/lower.isle line 1537.
14372
0
                                                        return Some(v699);
14373
0
                                                    }
14374
0
                                                }
14375
0
                                            }
14376
0
                                        }
14377
                                    }
14378
0
                                    _ => {}
14379
                                }
14380
0
                            }
14381
0
                        }
14382
7
                        let v679 = C::unpack_value_array_2(ctx, v677);
14383
7
                        let v682 = C::value_type(ctx, v679.0);
14384
7
                        let v730 = C::ty_vec128(ctx, v682);
14385
7
                        if let Some(
v7310
) = v730 {
14386
0
                            let v742 = constructor_put_in_xmm(ctx, v679.1);
14387
0
                            let v743 = &C::put_in_xmm_mem(ctx, v679.0);
14388
0
                            let v744 = constructor_x64_pcmpgt(ctx, v731, v742, v743);
14389
0
                            let v745 = constructor_output_xmm(ctx, v744);
14390
0
                            // Rule at src/isa/x64/lower.isle line 1590.
14391
0
                            return Some(v745);
14392
7
                        }
14393
                    }
14394
                    &IntCC::SignedLessThanOrEqual => {
14395
0
                        let v1 = C::first_result(ctx, arg0);
14396
0
                        if let Some(v2) = v1 {
14397
0
                            let v3 = C::value_type(ctx, v2);
14398
0
                            if v3 == I8 {
14399
0
                                let v679 = C::unpack_value_array_2(ctx, v677);
14400
0
                                let v700 = C::def_inst(ctx, v679.0);
14401
0
                                if let Some(v701) = v700 {
14402
0
                                    let v702 = &C::inst_data(ctx, v701);
14403
                                    if let &InstructionData::UnaryImm {
14404
0
                                        opcode: ref v703,
14405
0
                                        imm: v704,
14406
0
                                    } = v702 {
14407
0
                                        if let &Opcode::Iconst = v703 {
14408
0
                                            let v705 = C::u64_from_imm64(ctx, v704);
14409
0
                                            if v705 == 0x0 {
14410
0
                                                let v706 = C::value_type(ctx, v679.1);
14411
0
                                                match v706 {
14412
                                                    I32 => {
14413
0
                                                        let v707 = constructor_put_in_gpr(ctx, v679.1);
14414
0
                                                        let v710 = constructor_x64_not(ctx, I64, v707);
14415
0
                                                        let v719 = Imm8Reg::Imm8 {
14416
0
                                                            imm: 0x1F,
14417
0
                                                        };
14418
0
                                                        let v725 = &C::imm8_reg_to_imm8_gpr(ctx, &v719);
14419
0
                                                        let v726 = constructor_x64_shr(ctx, I32, v710, v725);
14420
0
                                                        let v727 = constructor_output_gpr(ctx, v726);
14421
0
                                                        // Rule at src/isa/x64/lower.isle line 1561.
14422
0
                                                        return Some(v727);
14423
                                                    }
14424
                                                    I64 => {
14425
0
                                                        let v707 = constructor_put_in_gpr(ctx, v679.1);
14426
0
                                                        let v710 = constructor_x64_not(ctx, I64, v707);
14427
0
                                                        let v696 = Imm8Reg::Imm8 {
14428
0
                                                            imm: 0x3F,
14429
0
                                                        };
14430
0
                                                        let v711 = &C::imm8_reg_to_imm8_gpr(ctx, &v696);
14431
0
                                                        let v712 = constructor_x64_shr(ctx, I64, v710, v711);
14432
0
                                                        let v713 = constructor_output_gpr(ctx, v712);
14433
0
                                                        // Rule at src/isa/x64/lower.isle line 1545.
14434
0
                                                        return Some(v713);
14435
                                                    }
14436
0
                                                    _ => {}
14437
                                                }
14438
0
                                            }
14439
0
                                        }
14440
0
                                    }
14441
0
                                }
14442
0
                            }
14443
0
                        }
14444
0
                        let v679 = C::unpack_value_array_2(ctx, v677);
14445
0
                        let v682 = C::value_type(ctx, v679.0);
14446
0
                        let v730 = C::ty_vec128(ctx, v682);
14447
0
                        if let Some(v731) = v730 {
14448
0
                            let v782 = constructor_has_pmins(ctx, v731);
14449
0
                            if v782 == true {
14450
0
                                let v732 = constructor_put_in_xmm(ctx, v679.0);
14451
0
                                let v757 = constructor_put_in_xmm(ctx, v679.0);
14452
0
                                let v775 = &C::put_in_xmm_mem(ctx, v679.1);
14453
0
                                let v783 = constructor_x64_pmins(ctx, v731, v757, v775);
14454
0
                                let v784 = &C::xmm_to_xmm_mem(ctx, v783);
14455
0
                                let v785 = constructor_x64_pcmpeq(ctx, v731, v732, v784);
14456
0
                                let v786 = constructor_output_xmm(ctx, v785);
14457
0
                                // Rule at src/isa/x64/lower.isle line 1647.
14458
0
                                return Some(v786);
14459
0
                            }
14460
0
                            let v732 = constructor_put_in_xmm(ctx, v679.0);
14461
0
                            let v733 = &C::put_in_xmm_mem(ctx, v679.1);
14462
0
                            let v740 = constructor_x64_pcmpgt(ctx, v731, v732, v733);
14463
0
                            let v736 = constructor_vector_all_ones(ctx);
14464
0
                            let v737 = &C::xmm_to_xmm_mem(ctx, v736);
14465
0
                            let v787 = constructor_x64_pxor(ctx, v740, v737);
14466
0
                            let v788 = constructor_output_xmm(ctx, v787);
14467
0
                            // Rule at src/isa/x64/lower.isle line 1652.
14468
0
                            return Some(v788);
14469
0
                        }
14470
                    }
14471
                    &IntCC::UnsignedGreaterThan => {
14472
1.54k
                        let v679 = C::unpack_value_array_2(ctx, v677);
14473
1.54k
                        let v682 = C::value_type(ctx, v679.0);
14474
1.54k
                        let v730 = C::ty_vec128(ctx, v682);
14475
1.54k
                        if let Some(
v7310
) = v730 {
14476
0
                            let v746 = constructor_has_pmaxu(ctx, v731);
14477
0
                            if v746 == true {
14478
0
                                let v732 = constructor_put_in_xmm(ctx, v679.0);
14479
0
                                let v747 = constructor_put_in_xmm(ctx, v679.1);
14480
0
                                let v748 = &C::xmm_to_xmm_mem(ctx, v747);
14481
0
                                let v749 = constructor_x64_pmaxu(ctx, v731, v732, v748);
14482
0
                                let v750 = &C::xmm_to_xmm_mem(ctx, v747);
14483
0
                                let v751 = constructor_x64_pcmpeq(ctx, v731, v749, v750);
14484
0
                                let v752 = constructor_vector_all_ones(ctx);
14485
0
                                let v753 = &C::xmm_to_xmm_mem(ctx, v752);
14486
0
                                let v754 = constructor_x64_pxor(ctx, v751, v753);
14487
0
                                let v755 = constructor_output_xmm(ctx, v754);
14488
0
                                // Rule at src/isa/x64/lower.isle line 1597.
14489
0
                                return Some(v755);
14490
0
                            }
14491
0
                            let v756 = constructor_flip_high_bit_mask(ctx, v731);
14492
0
                            let v757 = constructor_put_in_xmm(ctx, v679.0);
14493
0
                            let v758 = &C::xmm_to_xmm_mem(ctx, v756);
14494
0
                            let v759 = constructor_x64_pxor(ctx, v757, v758);
14495
0
                            let v760 = constructor_put_in_xmm(ctx, v679.1);
14496
0
                            let v761 = &C::xmm_to_xmm_mem(ctx, v756);
14497
0
                            let v762 = constructor_x64_pxor(ctx, v760, v761);
14498
0
                            let v763 = &C::xmm_to_xmm_mem(ctx, v762);
14499
0
                            let v764 = constructor_x64_pcmpgt(ctx, v731, v759, v763);
14500
0
                            let v765 = constructor_output_xmm(ctx, v764);
14501
0
                            // Rule at src/isa/x64/lower.isle line 1607.
14502
0
                            return Some(v765);
14503
1.54k
                        }
14504
                    }
14505
                    &IntCC::UnsignedGreaterThanOrEqual => {
14506
213
                        let v679 = C::unpack_value_array_2(ctx, v677);
14507
213
                        let v682 = C::value_type(ctx, v679.0);
14508
213
                        let v730 = C::ty_vec128(ctx, v682);
14509
213
                        if let Some(
v7310
) = v730 {
14510
0
                            let v746 = constructor_has_pmaxu(ctx, v731);
14511
0
                            if v746 == true {
14512
0
                                let v732 = constructor_put_in_xmm(ctx, v679.0);
14513
0
                                let v757 = constructor_put_in_xmm(ctx, v679.0);
14514
0
                                let v775 = &C::put_in_xmm_mem(ctx, v679.1);
14515
0
                                let v789 = constructor_x64_pmaxu(ctx, v731, v757, v775);
14516
0
                                let v790 = &C::xmm_to_xmm_mem(ctx, v789);
14517
0
                                let v791 = constructor_x64_pcmpeq(ctx, v731, v732, v790);
14518
0
                                let v792 = constructor_output_xmm(ctx, v791);
14519
0
                                // Rule at src/isa/x64/lower.isle line 1657.
14520
0
                                return Some(v792);
14521
0
                            }
14522
213
                        }
14523
213
                        if v682 == I16X8 {
14524
0
                            let v742 = constructor_put_in_xmm(ctx, v679.1);
14525
0
                            let v743 = &C::put_in_xmm_mem(ctx, v679.0);
14526
0
                            let v793 = constructor_x64_psubusw(ctx, v742, v743);
14527
0
                            let v794 = constructor_xmm_zero(ctx, I16X8);
14528
0
                            let v795 = &C::xmm_to_xmm_mem(ctx, v794);
14529
0
                            let v796 = constructor_x64_pcmpeqw(ctx, v793, v795);
14530
0
                            let v797 = constructor_output_xmm(ctx, v796);
14531
0
                            // Rule at src/isa/x64/lower.isle line 1663.
14532
0
                            return Some(v797);
14533
213
                        }
14534
213
                        if let Some(
v7310
) = v730 {
14535
0
                            let v756 = constructor_flip_high_bit_mask(ctx, v731);
14536
0
                            let v757 = constructor_put_in_xmm(ctx, v679.0);
14537
0
                            let v758 = &C::xmm_to_xmm_mem(ctx, v756);
14538
0
                            let v759 = constructor_x64_pxor(ctx, v757, v758);
14539
0
                            let v760 = constructor_put_in_xmm(ctx, v679.1);
14540
0
                            let v761 = &C::xmm_to_xmm_mem(ctx, v756);
14541
0
                            let v762 = constructor_x64_pxor(ctx, v760, v761);
14542
0
                            let v771 = &C::xmm_to_xmm_mem(ctx, v759);
14543
0
                            let v772 = constructor_x64_pcmpgt(ctx, v731, v762, v771);
14544
0
                            let v798 = constructor_vector_all_ones(ctx);
14545
0
                            let v799 = &C::xmm_to_xmm_mem(ctx, v798);
14546
0
                            let v800 = constructor_x64_pxor(ctx, v772, v799);
14547
0
                            let v801 = constructor_output_xmm(ctx, v800);
14548
0
                            // Rule at src/isa/x64/lower.isle line 1669.
14549
0
                            return Some(v801);
14550
213
                        }
14551
                    }
14552
                    &IntCC::UnsignedLessThan => {
14553
4.53k
                        let v679 = C::unpack_value_array_2(ctx, v677);
14554
4.53k
                        let v682 = C::value_type(ctx, v679.0);
14555
4.53k
                        let v730 = C::ty_vec128(ctx, v682);
14556
4.53k
                        if let Some(
v7310
) = v730 {
14557
0
                            let v766 = constructor_has_pminu(ctx, v731);
14558
0
                            if v766 == true {
14559
0
                                let v732 = constructor_put_in_xmm(ctx, v679.0);
14560
0
                                let v747 = constructor_put_in_xmm(ctx, v679.1);
14561
0
                                let v748 = &C::xmm_to_xmm_mem(ctx, v747);
14562
0
                                let v767 = constructor_x64_pminu(ctx, v731, v732, v748);
14563
0
                                let v750 = &C::xmm_to_xmm_mem(ctx, v747);
14564
0
                                let v768 = constructor_x64_pcmpeq(ctx, v731, v767, v750);
14565
0
                                let v752 = constructor_vector_all_ones(ctx);
14566
0
                                let v753 = &C::xmm_to_xmm_mem(ctx, v752);
14567
0
                                let v769 = constructor_x64_pxor(ctx, v768, v753);
14568
0
                                let v770 = constructor_output_xmm(ctx, v769);
14569
0
                                // Rule at src/isa/x64/lower.isle line 1615.
14570
0
                                return Some(v770);
14571
0
                            }
14572
0
                            let v756 = constructor_flip_high_bit_mask(ctx, v731);
14573
0
                            let v757 = constructor_put_in_xmm(ctx, v679.0);
14574
0
                            let v758 = &C::xmm_to_xmm_mem(ctx, v756);
14575
0
                            let v759 = constructor_x64_pxor(ctx, v757, v758);
14576
0
                            let v760 = constructor_put_in_xmm(ctx, v679.1);
14577
0
                            let v761 = &C::xmm_to_xmm_mem(ctx, v756);
14578
0
                            let v762 = constructor_x64_pxor(ctx, v760, v761);
14579
0
                            let v771 = &C::xmm_to_xmm_mem(ctx, v759);
14580
0
                            let v772 = constructor_x64_pcmpgt(ctx, v731, v762, v771);
14581
0
                            let v773 = constructor_output_xmm(ctx, v772);
14582
0
                            // Rule at src/isa/x64/lower.isle line 1626.
14583
0
                            return Some(v773);
14584
4.53k
                        }
14585
                    }
14586
                    &IntCC::UnsignedLessThanOrEqual => {
14587
186
                        let v679 = C::unpack_value_array_2(ctx, v677);
14588
186
                        let v682 = C::value_type(ctx, v679.0);
14589
186
                        let v730 = C::ty_vec128(ctx, v682);
14590
186
                        if let Some(
v7310
) = v730 {
14591
0
                            let v766 = constructor_has_pminu(ctx, v731);
14592
0
                            if v766 == true {
14593
0
                                let v732 = constructor_put_in_xmm(ctx, v679.0);
14594
0
                                let v757 = constructor_put_in_xmm(ctx, v679.0);
14595
0
                                let v775 = &C::put_in_xmm_mem(ctx, v679.1);
14596
0
                                let v802 = constructor_x64_pminu(ctx, v731, v757, v775);
14597
0
                                let v803 = &C::xmm_to_xmm_mem(ctx, v802);
14598
0
                                let v804 = constructor_x64_pcmpeq(ctx, v731, v732, v803);
14599
0
                                let v805 = constructor_output_xmm(ctx, v804);
14600
0
                                // Rule at src/isa/x64/lower.isle line 1680.
14601
0
                                return Some(v805);
14602
0
                            }
14603
186
                        }
14604
186
                        if v682 == I16X8 {
14605
0
                            let v732 = constructor_put_in_xmm(ctx, v679.0);
14606
0
                            let v733 = &C::put_in_xmm_mem(ctx, v679.1);
14607
0
                            let v806 = constructor_x64_psubusw(ctx, v732, v733);
14608
0
                            let v807 = constructor_xmm_zero(ctx, I8X16);
14609
0
                            let v808 = &C::xmm_to_xmm_mem(ctx, v807);
14610
0
                            let v809 = constructor_x64_pcmpeqw(ctx, v806, v808);
14611
0
                            let v810 = constructor_output_xmm(ctx, v809);
14612
0
                            // Rule at src/isa/x64/lower.isle line 1687.
14613
0
                            return Some(v810);
14614
186
                        }
14615
186
                        if let Some(
v7310
) = v730 {
14616
0
                            let v756 = constructor_flip_high_bit_mask(ctx, v731);
14617
0
                            let v757 = constructor_put_in_xmm(ctx, v679.0);
14618
0
                            let v758 = &C::xmm_to_xmm_mem(ctx, v756);
14619
0
                            let v759 = constructor_x64_pxor(ctx, v757, v758);
14620
0
                            let v760 = constructor_put_in_xmm(ctx, v679.1);
14621
0
                            let v761 = &C::xmm_to_xmm_mem(ctx, v756);
14622
0
                            let v762 = constructor_x64_pxor(ctx, v760, v761);
14623
0
                            let v763 = &C::xmm_to_xmm_mem(ctx, v762);
14624
0
                            let v764 = constructor_x64_pcmpgt(ctx, v731, v759, v763);
14625
0
                            let v798 = constructor_vector_all_ones(ctx);
14626
0
                            let v799 = &C::xmm_to_xmm_mem(ctx, v798);
14627
0
                            let v811 = constructor_x64_pxor(ctx, v764, v799);
14628
0
                            let v812 = constructor_output_xmm(ctx, v811);
14629
0
                            // Rule at src/isa/x64/lower.isle line 1695.
14630
0
                            return Some(v812);
14631
186
                        }
14632
                    }
14633
0
                    _ => {}
14634
                }
14635
10.7k
                let v679 = C::unpack_value_array_2(ctx, v677);
14636
10.7k
                let v682 = C::value_type(ctx, v679.0);
14637
10.7k
                if v682 == I128 {
14638
0
                    let v685 = &constructor_emit_cmp(ctx, v678, v679.0, v679.1);
14639
0
                    let v686 = constructor_lower_icmp_bool(ctx, v685);
14640
0
                    let v687 = C::output(ctx, v686);
14641
0
                    // Rule at src/isa/x64/lower.isle line 1533.
14642
0
                    return Some(v687);
14643
10.7k
                }
14644
10.7k
                let v683 = C::fits_in_64(ctx, v682);
14645
10.7k
                if let Some(v684) = v683 {
14646
10.7k
                    let v685 = &constructor_emit_cmp(ctx, v678, v679.0, v679.1);
14647
10.7k
                    let v686 = constructor_lower_icmp_bool(ctx, v685);
14648
10.7k
                    let v687 = C::output(ctx, v686);
14649
10.7k
                    // Rule at src/isa/x64/lower.isle line 1530.
14650
10.7k
                    return Some(v687);
14651
0
                }
14652
0
            }
14653
        }
14654
        &InstructionData::Load {
14655
790k
            opcode: ref v1310,
14656
790k
            arg: v1311,
14657
790k
            flags: v1312,
14658
790k
            offset: v1313,
14659
790k
        } => {
14660
790k
            match v1310 {
14661
                &Opcode::Load => {
14662
747k
                    let v1 = C::first_result(ctx, arg0);
14663
747k
                    if let Some(v2) = v1 {
14664
747k
                        let v3 = C::value_type(ctx, v2);
14665
747k
                        match v3 {
14666
                            F32 => {
14667
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14668
0
                                let v1342 = &C::amode_to_synthetic_amode(ctx, v1323);
14669
0
                                let v1343 = constructor_x64_movss_load(ctx, v1342);
14670
0
                                let v1344 = constructor_output_xmm(ctx, v1343);
14671
0
                                // Rule at src/isa/x64/lower.isle line 2617.
14672
0
                                return Some(v1344);
14673
                            }
14674
                            F64 => {
14675
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14676
0
                                let v1342 = &C::amode_to_synthetic_amode(ctx, v1323);
14677
0
                                let v1345 = constructor_x64_movsd_load(ctx, v1342);
14678
0
                                let v1346 = constructor_output_xmm(ctx, v1345);
14679
0
                                // Rule at src/isa/x64/lower.isle line 2619.
14680
0
                                return Some(v1346);
14681
                            }
14682
                            F32X4 => {
14683
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14684
0
                                let v1342 = &C::amode_to_synthetic_amode(ctx, v1323);
14685
0
                                let v1347 = constructor_x64_movups_load(ctx, v1342);
14686
0
                                let v1348 = constructor_output_xmm(ctx, v1347);
14687
0
                                // Rule at src/isa/x64/lower.isle line 2621.
14688
0
                                return Some(v1348);
14689
                            }
14690
                            F64X2 => {
14691
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14692
0
                                let v1342 = &C::amode_to_synthetic_amode(ctx, v1323);
14693
0
                                let v1349 = constructor_x64_movupd_load(ctx, v1342);
14694
0
                                let v1350 = constructor_output_xmm(ctx, v1349);
14695
0
                                // Rule at src/isa/x64/lower.isle line 2623.
14696
0
                                return Some(v1350);
14697
                            }
14698
747k
                            _ => {}
14699
747k
                        }
14700
747k
                        let v1321 = C::ty_int_ref_64(ctx, v3);
14701
747k
                        if let Some(
v1322378k
) = v1321 {
14702
378k
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14703
378k
                            let v1324 = constructor_x64_mov(ctx, v1323);
14704
378k
                            let v1325 = constructor_output_reg(ctx, v1324);
14705
378k
                            // Rule at src/isa/x64/lower.isle line 2595.
14706
378k
                            return Some(v1325);
14707
369k
                        }
14708
369k
                        let v586 = C::ty_vec128(ctx, v3);
14709
369k
                        if let Some(
v5870
) = v586 {
14710
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14711
0
                            let v1351 = &constructor_amode_to_xmm_mem(ctx, v1323);
14712
0
                            let v1352 = constructor_x64_movdqu_load(ctx, v1351);
14713
0
                            let v1353 = constructor_output_xmm(ctx, v1352);
14714
0
                            // Rule at src/isa/x64/lower.isle line 2625.
14715
0
                            return Some(v1353);
14716
369k
                        }
14717
369k
                        if v3 == I128 {
14718
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14719
0
                            let v1355 = &C::amode_offset(ctx, v1323, 0x8);
14720
0
                            let v1356 = constructor_x64_mov(ctx, v1323);
14721
0
                            let v1357 = constructor_x64_mov(ctx, v1355);
14722
0
                            let v1358 = C::value_regs(ctx, v1356, v1357);
14723
0
                            let v1359 = C::output(ctx, v1358);
14724
0
                            // Rule at src/isa/x64/lower.isle line 2629.
14725
0
                            return Some(v1359);
14726
369k
                        }
14727
369k
                        let v1053 = C::fits_in_32(ctx, v3);
14728
369k
                        if let Some(v1054) = v1053 {
14729
369k
                            let v1307 = &C::type_register_class(ctx, v3);
14730
369k
                            if let Some(v1308) = v1307 {
14731
                                if let &RegisterClass::Gpr {
14732
369k
                                    single_register: v1309,
14733
369k
                                } = v1308 {
14734
369k
                                    let v1314 = C::ty_bits_u16(ctx, v1054);
14735
369k
                                    let v1316 = &C::ext_mode(ctx, v1314, 0x40);
14736
369k
                                    let v1317 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14737
369k
                                    let v1318 = &constructor_amode_to_gpr_mem(ctx, v1317);
14738
369k
                                    let v1319 = constructor_x64_movzx(ctx, v1316, v1318);
14739
369k
                                    let v1320 = constructor_output_gpr(ctx, v1319);
14740
369k
                                    // Rule at src/isa/x64/lower.isle line 2591.
14741
369k
                                    return Some(v1320);
14742
0
                                }
14743
0
                            }
14744
0
                        }
14745
0
                    }
14746
                }
14747
                &Opcode::Uload8 => {
14748
30.7k
                    let v1 = C::first_result(ctx, arg0);
14749
30.7k
                    if let Some(v2) = v1 {
14750
30.7k
                        let v3 = C::value_type(ctx, v2);
14751
30.7k
                        let v1307 = &C::type_register_class(ctx, v3);
14752
30.7k
                        if let Some(v1308) = v1307 {
14753
                            if let &RegisterClass::Gpr {
14754
30.7k
                                single_register: v1309,
14755
30.7k
                            } = v1308 {
14756
30.7k
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14757
30.7k
                                let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14758
30.7k
                                let v1328 = constructor_x64_movzx(ctx, &ExtMode::BQ, v1327);
14759
30.7k
                                let v1329 = constructor_output_gpr(ctx, v1328);
14760
30.7k
                                // Rule at src/isa/x64/lower.isle line 2600.
14761
30.7k
                                return Some(v1329);
14762
0
                            }
14763
0
                        }
14764
0
                    }
14765
                }
14766
                &Opcode::Sload8 => {
14767
176
                    let v1 = C::first_result(ctx, arg0);
14768
176
                    if let Some(v2) = v1 {
14769
176
                        let v3 = C::value_type(ctx, v2);
14770
176
                        let v1307 = &C::type_register_class(ctx, v3);
14771
176
                        if let Some(v1308) = v1307 {
14772
                            if let &RegisterClass::Gpr {
14773
176
                                single_register: v1309,
14774
176
                            } = v1308 {
14775
176
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14776
176
                                let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14777
176
                                let v1330 = constructor_x64_movsx(ctx, &ExtMode::BQ, v1327);
14778
176
                                let v1331 = constructor_output_gpr(ctx, v1330);
14779
176
                                // Rule at src/isa/x64/lower.isle line 2602.
14780
176
                                return Some(v1331);
14781
0
                            }
14782
0
                        }
14783
0
                    }
14784
                }
14785
                &Opcode::Uload16 => {
14786
10.7k
                    let v1 = C::first_result(ctx, arg0);
14787
10.7k
                    if let Some(v2) = v1 {
14788
10.7k
                        let v3 = C::value_type(ctx, v2);
14789
10.7k
                        let v1307 = &C::type_register_class(ctx, v3);
14790
10.7k
                        if let Some(v1308) = v1307 {
14791
                            if let &RegisterClass::Gpr {
14792
10.7k
                                single_register: v1309,
14793
10.7k
                            } = v1308 {
14794
10.7k
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14795
10.7k
                                let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14796
10.7k
                                let v1333 = constructor_x64_movzx(ctx, &ExtMode::WQ, v1327);
14797
10.7k
                                let v1334 = constructor_output_gpr(ctx, v1333);
14798
10.7k
                                // Rule at src/isa/x64/lower.isle line 2604.
14799
10.7k
                                return Some(v1334);
14800
0
                            }
14801
0
                        }
14802
0
                    }
14803
                }
14804
                &Opcode::Sload16 => {
14805
0
                    let v1 = C::first_result(ctx, arg0);
14806
0
                    if let Some(v2) = v1 {
14807
0
                        let v3 = C::value_type(ctx, v2);
14808
0
                        let v1307 = &C::type_register_class(ctx, v3);
14809
0
                        if let Some(v1308) = v1307 {
14810
                            if let &RegisterClass::Gpr {
14811
0
                                single_register: v1309,
14812
0
                            } = v1308 {
14813
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14814
0
                                let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14815
0
                                let v1335 = constructor_x64_movsx(ctx, &ExtMode::WQ, v1327);
14816
0
                                let v1336 = constructor_output_gpr(ctx, v1335);
14817
0
                                // Rule at src/isa/x64/lower.isle line 2606.
14818
0
                                return Some(v1336);
14819
0
                            }
14820
0
                        }
14821
0
                    }
14822
                }
14823
                &Opcode::Uload32 => {
14824
1.41k
                    let v1 = C::first_result(ctx, arg0);
14825
1.41k
                    if let Some(v2) = v1 {
14826
1.41k
                        let v3 = C::value_type(ctx, v2);
14827
1.41k
                        let v1307 = &C::type_register_class(ctx, v3);
14828
1.41k
                        if let Some(v1308) = v1307 {
14829
                            if let &RegisterClass::Gpr {
14830
1.41k
                                single_register: v1309,
14831
1.41k
                            } = v1308 {
14832
1.41k
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14833
1.41k
                                let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14834
1.41k
                                let v1338 = constructor_x64_movzx(ctx, &ExtMode::LQ, v1327);
14835
1.41k
                                let v1339 = constructor_output_gpr(ctx, v1338);
14836
1.41k
                                // Rule at src/isa/x64/lower.isle line 2608.
14837
1.41k
                                return Some(v1339);
14838
0
                            }
14839
0
                        }
14840
0
                    }
14841
                }
14842
                &Opcode::Sload32 => {
14843
0
                    let v1 = C::first_result(ctx, arg0);
14844
0
                    if let Some(v2) = v1 {
14845
0
                        let v3 = C::value_type(ctx, v2);
14846
0
                        let v1307 = &C::type_register_class(ctx, v3);
14847
0
                        if let Some(v1308) = v1307 {
14848
                            if let &RegisterClass::Gpr {
14849
0
                                single_register: v1309,
14850
0
                            } = v1308 {
14851
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14852
0
                                let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14853
0
                                let v1340 = constructor_x64_movsx(ctx, &ExtMode::LQ, v1327);
14854
0
                                let v1341 = constructor_output_gpr(ctx, v1340);
14855
0
                                // Rule at src/isa/x64/lower.isle line 2610.
14856
0
                                return Some(v1341);
14857
0
                            }
14858
0
                        }
14859
0
                    }
14860
                }
14861
                &Opcode::Uload8x8 => {
14862
0
                    let v1 = C::first_result(ctx, arg0);
14863
0
                    if let Some(v2) = v1 {
14864
0
                        let v3 = C::value_type(ctx, v2);
14865
0
                        if v3 == I16X8 {
14866
0
                            let v366 = C::use_sse41(ctx);
14867
0
                            if v366 == true {
14868
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14869
0
                                let v1351 = &constructor_amode_to_xmm_mem(ctx, v1323);
14870
0
                                let v1362 = constructor_x64_pmovzxbw(ctx, v1351);
14871
0
                                let v1363 = constructor_output_xmm(ctx, v1362);
14872
0
                                // Rule at src/isa/x64/lower.isle line 2642.
14873
0
                                return Some(v1363);
14874
0
                            }
14875
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14876
0
                            let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14877
0
                            let v1372 = constructor_x64_movq_to_xmm(ctx, v1327);
14878
0
                            let v1375 = constructor_lower_uwiden_low(ctx, I16X8, v1372);
14879
0
                            let v1376 = constructor_output_xmm(ctx, v1375);
14880
0
                            // Rule at src/isa/x64/lower.isle line 2660.
14881
0
                            return Some(v1376);
14882
0
                        }
14883
0
                    }
14884
                }
14885
                &Opcode::Sload8x8 => {
14886
0
                    let v1 = C::first_result(ctx, arg0);
14887
0
                    if let Some(v2) = v1 {
14888
0
                        let v3 = C::value_type(ctx, v2);
14889
0
                        if v3 == I16X8 {
14890
0
                            let v366 = C::use_sse41(ctx);
14891
0
                            if v366 == true {
14892
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14893
0
                                let v1351 = &constructor_amode_to_xmm_mem(ctx, v1323);
14894
0
                                let v1360 = constructor_x64_pmovsxbw(ctx, v1351);
14895
0
                                let v1361 = constructor_output_xmm(ctx, v1360);
14896
0
                                // Rule at src/isa/x64/lower.isle line 2639.
14897
0
                                return Some(v1361);
14898
0
                            }
14899
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14900
0
                            let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14901
0
                            let v1372 = constructor_x64_movq_to_xmm(ctx, v1327);
14902
0
                            let v1373 = constructor_lower_swiden_low(ctx, I16X8, v1372);
14903
0
                            let v1374 = constructor_output_xmm(ctx, v1373);
14904
0
                            // Rule at src/isa/x64/lower.isle line 2658.
14905
0
                            return Some(v1374);
14906
0
                        }
14907
0
                    }
14908
                }
14909
                &Opcode::Uload16x4 => {
14910
0
                    let v1 = C::first_result(ctx, arg0);
14911
0
                    if let Some(v2) = v1 {
14912
0
                        let v3 = C::value_type(ctx, v2);
14913
0
                        if v3 == I32X4 {
14914
0
                            let v366 = C::use_sse41(ctx);
14915
0
                            if v366 == true {
14916
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14917
0
                                let v1351 = &constructor_amode_to_xmm_mem(ctx, v1323);
14918
0
                                let v1366 = constructor_x64_pmovzxwd(ctx, v1351);
14919
0
                                let v1367 = constructor_output_xmm(ctx, v1366);
14920
0
                                // Rule at src/isa/x64/lower.isle line 2648.
14921
0
                                return Some(v1367);
14922
0
                            }
14923
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14924
0
                            let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14925
0
                            let v1372 = constructor_x64_movq_to_xmm(ctx, v1327);
14926
0
                            let v1379 = constructor_lower_uwiden_low(ctx, I32X4, v1372);
14927
0
                            let v1380 = constructor_output_xmm(ctx, v1379);
14928
0
                            // Rule at src/isa/x64/lower.isle line 2664.
14929
0
                            return Some(v1380);
14930
0
                        }
14931
0
                    }
14932
                }
14933
                &Opcode::Sload16x4 => {
14934
0
                    let v1 = C::first_result(ctx, arg0);
14935
0
                    if let Some(v2) = v1 {
14936
0
                        let v3 = C::value_type(ctx, v2);
14937
0
                        if v3 == I32X4 {
14938
0
                            let v366 = C::use_sse41(ctx);
14939
0
                            if v366 == true {
14940
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14941
0
                                let v1351 = &constructor_amode_to_xmm_mem(ctx, v1323);
14942
0
                                let v1364 = constructor_x64_pmovsxwd(ctx, v1351);
14943
0
                                let v1365 = constructor_output_xmm(ctx, v1364);
14944
0
                                // Rule at src/isa/x64/lower.isle line 2645.
14945
0
                                return Some(v1365);
14946
0
                            }
14947
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14948
0
                            let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14949
0
                            let v1372 = constructor_x64_movq_to_xmm(ctx, v1327);
14950
0
                            let v1377 = constructor_lower_swiden_low(ctx, I32X4, v1372);
14951
0
                            let v1378 = constructor_output_xmm(ctx, v1377);
14952
0
                            // Rule at src/isa/x64/lower.isle line 2662.
14953
0
                            return Some(v1378);
14954
0
                        }
14955
0
                    }
14956
                }
14957
                &Opcode::Uload32x2 => {
14958
0
                    let v1 = C::first_result(ctx, arg0);
14959
0
                    if let Some(v2) = v1 {
14960
0
                        let v3 = C::value_type(ctx, v2);
14961
0
                        if v3 == I64X2 {
14962
0
                            let v366 = C::use_sse41(ctx);
14963
0
                            if v366 == true {
14964
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14965
0
                                let v1351 = &constructor_amode_to_xmm_mem(ctx, v1323);
14966
0
                                let v1370 = constructor_x64_pmovzxdq(ctx, v1351);
14967
0
                                let v1371 = constructor_output_xmm(ctx, v1370);
14968
0
                                // Rule at src/isa/x64/lower.isle line 2654.
14969
0
                                return Some(v1371);
14970
0
                            }
14971
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14972
0
                            let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14973
0
                            let v1372 = constructor_x64_movq_to_xmm(ctx, v1327);
14974
0
                            let v1383 = constructor_lower_uwiden_low(ctx, I64X2, v1372);
14975
0
                            let v1384 = constructor_output_xmm(ctx, v1383);
14976
0
                            // Rule at src/isa/x64/lower.isle line 2668.
14977
0
                            return Some(v1384);
14978
0
                        }
14979
0
                    }
14980
                }
14981
                &Opcode::Sload32x2 => {
14982
0
                    let v1 = C::first_result(ctx, arg0);
14983
0
                    if let Some(v2) = v1 {
14984
0
                        let v3 = C::value_type(ctx, v2);
14985
0
                        if v3 == I64X2 {
14986
0
                            let v366 = C::use_sse41(ctx);
14987
0
                            if v366 == true {
14988
0
                                let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14989
0
                                let v1351 = &constructor_amode_to_xmm_mem(ctx, v1323);
14990
0
                                let v1368 = constructor_x64_pmovsxdq(ctx, v1351);
14991
0
                                let v1369 = constructor_output_xmm(ctx, v1368);
14992
0
                                // Rule at src/isa/x64/lower.isle line 2651.
14993
0
                                return Some(v1369);
14994
0
                            }
14995
0
                            let v1323 = &constructor_to_amode(ctx, v1312, v1311, v1313);
14996
0
                            let v1327 = &constructor_amode_to_gpr_mem(ctx, v1323);
14997
0
                            let v1372 = constructor_x64_movq_to_xmm(ctx, v1327);
14998
0
                            let v1381 = constructor_lower_swiden_low(ctx, I64X2, v1372);
14999
0
                            let v1382 = constructor_output_xmm(ctx, v1381);
15000
0
                            // Rule at src/isa/x64/lower.isle line 2666.
15001
0
                            return Some(v1382);
15002
0
                        }
15003
0
                    }
15004
                }
15005
0
                _ => {}
15006
            }
15007
        }
15008
        &InstructionData::LoadNoOffset {
15009
0
            opcode: ref v1523,
15010
0
            arg: v1524,
15011
0
            flags: v1525,
15012
0
        } => {
15013
0
            match v1523 {
15014
                &Opcode::Bitcast => {
15015
0
                    let v1 = C::first_result(ctx, arg0);
15016
0
                    if let Some(v2) = v1 {
15017
0
                        let v3 = C::value_type(ctx, v2);
15018
0
                        let v1307 = &C::type_register_class(ctx, v3);
15019
0
                        if let Some(v1308) = v1307 {
15020
0
                            match v1308 {
15021
                                &RegisterClass::Gpr {
15022
0
                                    single_register: v1309,
15023
0
                                } => {
15024
0
                                    let v1873 = C::value_type(ctx, v1524);
15025
0
                                    let v1884 = &C::type_register_class(ctx, v1873);
15026
0
                                    if let Some(v1885) = v1884 {
15027
                                        if let &RegisterClass::Gpr {
15028
0
                                            single_register: v1886,
15029
0
                                        } = v1885 {
15030
0
                                            let v1887 = constructor_output_value(ctx, v1524);
15031
0
                                            // Rule at src/isa/x64/lower.isle line 3527.
15032
0
                                            return Some(v1887);
15033
0
                                        }
15034
0
                                    }
15035
                                }
15036
                                &RegisterClass::Xmm => {
15037
0
                                    let v1873 = C::value_type(ctx, v1524);
15038
0
                                    let v1884 = &C::type_register_class(ctx, v1873);
15039
0
                                    if let Some(v1885) = v1884 {
15040
0
                                        if let &RegisterClass::Xmm = v1885 {
15041
0
                                            let v1887 = constructor_output_value(ctx, v1524);
15042
0
                                            // Rule at src/isa/x64/lower.isle line 3531.
15043
0
                                            return Some(v1887);
15044
0
                                        }
15045
0
                                    }
15046
                                }
15047
0
                                _ => {}
15048
                            }
15049
0
                        }
15050
0
                        match v3 {
15051
                            I32 => {
15052
0
                                let v1873 = C::value_type(ctx, v1524);
15053
0
                                if v1873 == F32 {
15054
0
                                    let v1874 = constructor_put_in_xmm(ctx, v1524);
15055
0
                                    let v1875 = constructor_bitcast_xmm_to_gpr(ctx, F32, v1874);
15056
0
                                    let v1876 = constructor_output_gpr(ctx, v1875);
15057
0
                                    // Rule at src/isa/x64/lower.isle line 3514.
15058
0
                                    return Some(v1876);
15059
0
                                }
15060
                            }
15061
                            I64 => {
15062
0
                                let v1873 = C::value_type(ctx, v1524);
15063
0
                                if v1873 == F64 {
15064
0
                                    let v1874 = constructor_put_in_xmm(ctx, v1524);
15065
0
                                    let v1880 = constructor_bitcast_xmm_to_gpr(ctx, F64, v1874);
15066
0
                                    let v1881 = constructor_output_gpr(ctx, v1880);
15067
0
                                    // Rule at src/isa/x64/lower.isle line 3520.
15068
0
                                    return Some(v1881);
15069
0
                                }
15070
                            }
15071
                            F32 => {
15072
0
                                let v1873 = C::value_type(ctx, v1524);
15073
0
                                if v1873 == I32 {
15074
0
                                    let v1877 = constructor_put_in_gpr(ctx, v1524);
15075
0
                                    let v1878 = constructor_bitcast_gpr_to_xmm(ctx, I32, v1877);
15076
0
                                    let v1879 = constructor_output_xmm(ctx, v1878);
15077
0
                                    // Rule at src/isa/x64/lower.isle line 3517.
15078
0
                                    return Some(v1879);
15079
0
                                }
15080
                            }
15081
                            F64 => {
15082
0
                                let v1873 = C::value_type(ctx, v1524);
15083
0
                                if v1873 == I64 {
15084
0
                                    let v1877 = constructor_put_in_gpr(ctx, v1524);
15085
0
                                    let v1882 = constructor_bitcast_gpr_to_xmm(ctx, I64, v1877);
15086
0
                                    let v1883 = constructor_output_xmm(ctx, v1882);
15087
0
                                    // Rule at src/isa/x64/lower.isle line 3523.
15088
0
                                    return Some(v1883);
15089
0
                                }
15090
                            }
15091
0
                            _ => {}
15092
                        }
15093
0
                    }
15094
                }
15095
                &Opcode::AtomicLoad => {
15096
0
                    let v1 = C::first_result(ctx, arg0);
15097
0
                    if let Some(v2) = v1 {
15098
0
                        let v3 = C::value_type(ctx, v2);
15099
0
                        if v3 == I64 {
15100
0
                            let v1526 = C::zero_offset(ctx);
15101
0
                            let v1527 = &constructor_to_amode(ctx, v1525, v1524, v1526);
15102
0
                            let v1528 = constructor_x64_mov(ctx, v1527);
15103
0
                            let v1529 = constructor_output_reg(ctx, v1528);
15104
0
                            // Rule at src/isa/x64/lower.isle line 2941.
15105
0
                            return Some(v1529);
15106
0
                        }
15107
0
                        let v1053 = C::fits_in_32(ctx, v3);
15108
0
                        if let Some(v1054) = v1053 {
15109
0
                            let v1530 = C::ty_int(ctx, v3);
15110
0
                            if let Some(v1531) = v1530 {
15111
0
                                let v1314 = C::ty_bits_u16(ctx, v1054);
15112
0
                                let v1316 = &C::ext_mode(ctx, v1314, 0x40);
15113
0
                                let v1532 = C::zero_offset(ctx);
15114
0
                                let v1533 = &constructor_to_amode(ctx, v1525, v1524, v1532);
15115
0
                                let v1534 = &constructor_amode_to_gpr_mem(ctx, v1533);
15116
0
                                let v1535 = constructor_x64_movzx(ctx, v1316, v1534);
15117
0
                                let v1536 = constructor_output_gpr(ctx, v1535);
15118
0
                                // Rule at src/isa/x64/lower.isle line 2943.
15119
0
                                return Some(v1536);
15120
0
                            }
15121
0
                        }
15122
0
                    }
15123
                }
15124
0
                _ => {}
15125
            }
15126
        }
15127
        &InstructionData::MultiAry {
15128
24.9k
            opcode: ref v670,
15129
24.9k
            args: v671,
15130
24.9k
        } => {
15131
24.9k
            if let &Opcode::Return = v670 {
15132
24.9k
                let v672 = C::value_list_slice(ctx, v671);
15133
24.9k
                let v673 = C::value_slice_len(ctx, v672);
15134
24.9k
                let v674 = C::range(ctx, 0x0, v673);
15135
24.9k
                let v675 = constructor_lower_return(ctx, v674, v672);
15136
24.9k
                // Rule at src/isa/x64/lower.isle line 1525.
15137
24.9k
                return Some(v675);
15138
0
            }
15139
        }
15140
        &InstructionData::NullAry {
15141
7.58k
            opcode: ref v31,
15142
7.58k
        } => {
15143
7.58k
            match v31 {
15144
                &Opcode::Debugtrap => {
15145
0
                    let v1067 = &constructor_x64_hlt(ctx);
15146
0
                    let v1068 = constructor_side_effect(ctx, v1067);
15147
0
                    // Rule at src/isa/x64/lower.isle line 2212.
15148
0
                    return Some(v1068);
15149
                }
15150
                &Opcode::GetPinnedReg => {
15151
0
                    let v1997 = constructor_read_pinned_gpr(ctx);
15152
0
                    let v1998 = constructor_output_gpr(ctx, v1997);
15153
0
                    // Rule at src/isa/x64/lower.isle line 3792.
15154
0
                    return Some(v1998);
15155
                }
15156
                &Opcode::GetFramePointer => {
15157
584
                    let v1600 = constructor_x64_rbp(ctx);
15158
584
                    let v1601 = constructor_output_reg(ctx, v1600);
15159
584
                    // Rule at src/isa/x64/lower.isle line 2990.
15160
584
                    return Some(v1601);
15161
                }
15162
                &Opcode::GetStackPointer => {
15163
6.41k
                    let v1602 = constructor_x64_rsp(ctx);
15164
6.41k
                    let v1603 = constructor_output_reg(ctx, v1602);
15165
6.41k
                    // Rule at src/isa/x64/lower.isle line 2993.
15166
6.41k
                    return Some(v1603);
15167
                }
15168
                &Opcode::GetReturnAddress => {
15169
584
                    let v1600 = constructor_x64_rbp(ctx);
15170
584
                    let v1604 = C::mem_flags_trusted(ctx);
15171
584
                    let v1605 = Amode::ImmReg {
15172
584
                        simm32: 0x8,
15173
584
                        base: v1600,
15174
584
                        flags: v1604,
15175
584
                    };
15176
584
                    let v1606 = &C::amode_to_synthetic_amode(ctx, &v1605);
15177
584
                    let v1607 = constructor_x64_load(ctx, I64, v1606, &ExtKind::None);
15178
584
                    let v1608 = constructor_output_reg(ctx, v1607);
15179
584
                    // Rule at src/isa/x64/lower.isle line 2996.
15180
584
                    return Some(v1608);
15181
                }
15182
                &Opcode::Null => {
15183
0
                    let v1 = C::first_result(ctx, arg0);
15184
0
                    if let Some(v2) = v1 {
15185
0
                        let v3 = C::value_type(ctx, v2);
15186
0
                        let v32 = constructor_imm(ctx, v3, 0x0);
15187
0
                        let v33 = constructor_output_reg(ctx, v32);
15188
0
                        // Rule at src/isa/x64/lower.isle line 37.
15189
0
                        return Some(v33);
15190
0
                    }
15191
                }
15192
                &Opcode::Nop => {
15193
0
                    let v2301 = C::invalid_reg(ctx);
15194
0
                    let v2302 = constructor_output_reg(ctx, v2301);
15195
0
                    // Rule at src/isa/x64/lower.isle line 4260.
15196
0
                    return Some(v2302);
15197
                }
15198
                &Opcode::Fence => {
15199
0
                    let v1503 = &constructor_x64_mfence(ctx);
15200
0
                    let v1504 = constructor_side_effect(ctx, v1503);
15201
0
                    // Rule at src/isa/x64/lower.isle line 2919.
15202
0
                    return Some(v1504);
15203
                }
15204
0
                _ => {}
15205
            }
15206
        }
15207
        &InstructionData::Shuffle {
15208
0
            opcode: ref v2006,
15209
0
            args: ref v2007,
15210
0
            imm: v2008,
15211
0
        } => {
15212
0
            if let &Opcode::Shuffle = v2006 {
15213
0
                let v366 = C::use_sse41(ctx);
15214
0
                if v366 == true {
15215
0
                    let v2012 = C::pblendw_imm(ctx, v2008);
15216
0
                    if let Some(v2013) = v2012 {
15217
0
                        let v2009 = C::unpack_value_array_2(ctx, v2007);
15218
0
                        let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15219
0
                        let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15220
0
                        let v2016 = constructor_x64_pblendw(ctx, v2014, v2015, v2013);
15221
0
                        let v2017 = constructor_output_xmm(ctx, v2016);
15222
0
                        // Rule at src/isa/x64/lower.isle line 3812.
15223
0
                        return Some(v2017);
15224
0
                    }
15225
0
                }
15226
0
                let v2018 = C::palignr_imm_from_immediate(ctx, v2008);
15227
0
                if let Some(v2019) = v2018 {
15228
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15229
0
                    let v2020 = constructor_put_in_xmm(ctx, v2009.1);
15230
0
                    let v2021 = &C::put_in_xmm_mem(ctx, v2009.0);
15231
0
                    let v2022 = constructor_x64_palignr(ctx, v2020, v2021, v2019);
15232
0
                    let v2023 = constructor_output_xmm(ctx, v2022);
15233
0
                    // Rule at src/isa/x64/lower.isle line 3823.
15234
0
                    return Some(v2023);
15235
0
                }
15236
0
                let v2024 = C::pshuflw_lhs_imm(ctx, v2008);
15237
0
                if let Some(v2025) = v2024 {
15238
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15239
0
                    let v2026 = &C::put_in_xmm_mem(ctx, v2009.0);
15240
0
                    let v2027 = constructor_x64_pshuflw(ctx, v2026, v2025);
15241
0
                    let v2028 = constructor_output_xmm(ctx, v2027);
15242
0
                    // Rule at src/isa/x64/lower.isle line 3834.
15243
0
                    return Some(v2028);
15244
0
                }
15245
0
                let v2029 = C::pshuflw_rhs_imm(ctx, v2008);
15246
0
                if let Some(v2030) = v2029 {
15247
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15248
0
                    let v2031 = &C::put_in_xmm_mem(ctx, v2009.1);
15249
0
                    let v2032 = constructor_x64_pshuflw(ctx, v2031, v2030);
15250
0
                    let v2033 = constructor_output_xmm(ctx, v2032);
15251
0
                    // Rule at src/isa/x64/lower.isle line 3836.
15252
0
                    return Some(v2033);
15253
0
                }
15254
0
                let v2034 = C::pshufhw_lhs_imm(ctx, v2008);
15255
0
                if let Some(v2035) = v2034 {
15256
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15257
0
                    let v2026 = &C::put_in_xmm_mem(ctx, v2009.0);
15258
0
                    let v2036 = constructor_x64_pshufhw(ctx, v2026, v2035);
15259
0
                    let v2037 = constructor_output_xmm(ctx, v2036);
15260
0
                    // Rule at src/isa/x64/lower.isle line 3838.
15261
0
                    return Some(v2037);
15262
0
                }
15263
0
                let v2038 = C::pshufhw_rhs_imm(ctx, v2008);
15264
0
                if let Some(v2039) = v2038 {
15265
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15266
0
                    let v2031 = &C::put_in_xmm_mem(ctx, v2009.1);
15267
0
                    let v2040 = constructor_x64_pshufhw(ctx, v2031, v2039);
15268
0
                    let v2041 = constructor_output_xmm(ctx, v2040);
15269
0
                    // Rule at src/isa/x64/lower.isle line 3840.
15270
0
                    return Some(v2041);
15271
0
                }
15272
0
                let v2042 = C::pshufd_lhs_imm(ctx, v2008);
15273
0
                if let Some(v2043) = v2042 {
15274
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15275
0
                    let v2026 = &C::put_in_xmm_mem(ctx, v2009.0);
15276
0
                    let v2044 = constructor_x64_pshufd(ctx, v2026, v2043);
15277
0
                    let v2045 = constructor_output_xmm(ctx, v2044);
15278
0
                    // Rule at src/isa/x64/lower.isle line 3857.
15279
0
                    return Some(v2045);
15280
0
                }
15281
0
                let v2046 = C::pshufd_rhs_imm(ctx, v2008);
15282
0
                if let Some(v2047) = v2046 {
15283
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15284
0
                    let v2031 = &C::put_in_xmm_mem(ctx, v2009.1);
15285
0
                    let v2048 = constructor_x64_pshufd(ctx, v2031, v2047);
15286
0
                    let v2049 = constructor_output_xmm(ctx, v2048);
15287
0
                    // Rule at src/isa/x64/lower.isle line 3859.
15288
0
                    return Some(v2049);
15289
0
                }
15290
0
                let v2050 = C::u128_from_immediate(ctx, v2008);
15291
0
                if let Some(v2051) = v2050 {
15292
0
                    match v2051 {
15293
                        0x0 => {
15294
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15295
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15296
0
                            let v1837 = constructor_xmm_zero(ctx, I8X16);
15297
0
                            let v1838 = &C::xmm_to_xmm_mem(ctx, v1837);
15298
0
                            let v2068 = constructor_x64_pshufb(ctx, v2014, v1838);
15299
0
                            let v2069 = constructor_output_xmm(ctx, v2068);
15300
0
                            // Rule at src/isa/x64/lower.isle line 3896.
15301
0
                            return Some(v2069);
15302
                        }
15303
                        0x17071606150514041303120211011000 => {
15304
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15305
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15306
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15307
0
                            let v2054 = constructor_x64_punpcklbw(ctx, v2014, v2015);
15308
0
                            let v2055 = constructor_output_xmm(ctx, v2054);
15309
0
                            // Rule at src/isa/x64/lower.isle line 3870.
15310
0
                            return Some(v2055);
15311
                        }
15312
                        0x17160706151405041312030211100100 => {
15313
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15314
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15315
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15316
0
                            let v2058 = constructor_x64_punpcklwd(ctx, v2014, v2015);
15317
0
                            let v2059 = constructor_output_xmm(ctx, v2058);
15318
0
                            // Rule at src/isa/x64/lower.isle line 3876.
15319
0
                            return Some(v2059);
15320
                        }
15321
                        0x17161514070605041312111003020100 => {
15322
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15323
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15324
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15325
0
                            let v2062 = constructor_x64_punpckldq(ctx, v2014, v2015);
15326
0
                            let v2063 = constructor_output_xmm(ctx, v2062);
15327
0
                            // Rule at src/isa/x64/lower.isle line 3882.
15328
0
                            return Some(v2063);
15329
                        }
15330
                        0x17161514131211100706050403020100 => {
15331
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15332
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15333
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15334
0
                            let v2066 = constructor_x64_punpcklqdq(ctx, v2014, v2015);
15335
0
                            let v2067 = constructor_output_xmm(ctx, v2066);
15336
0
                            // Rule at src/isa/x64/lower.isle line 3888.
15337
0
                            return Some(v2067);
15338
                        }
15339
                        0x1F0F1E0E1D0D1C0C1B0B1A0A19091808 => {
15340
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15341
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15342
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15343
0
                            let v2052 = constructor_x64_punpckhbw(ctx, v2014, v2015);
15344
0
                            let v2053 = constructor_output_xmm(ctx, v2052);
15345
0
                            // Rule at src/isa/x64/lower.isle line 3868.
15346
0
                            return Some(v2053);
15347
                        }
15348
                        0x1F1E0F0E1D1C0D0C1B1A0B0A19180908 => {
15349
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15350
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15351
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15352
0
                            let v2056 = constructor_x64_punpckhwd(ctx, v2014, v2015);
15353
0
                            let v2057 = constructor_output_xmm(ctx, v2056);
15354
0
                            // Rule at src/isa/x64/lower.isle line 3874.
15355
0
                            return Some(v2057);
15356
                        }
15357
                        0x1F1E1D1C0F0E0D0C1B1A19180B0A0908 => {
15358
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15359
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15360
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15361
0
                            let v2060 = constructor_x64_punpckhdq(ctx, v2014, v2015);
15362
0
                            let v2061 = constructor_output_xmm(ctx, v2060);
15363
0
                            // Rule at src/isa/x64/lower.isle line 3880.
15364
0
                            return Some(v2061);
15365
                        }
15366
                        0x1F1E1D1C1B1A19180F0E0D0C0B0A0908 => {
15367
0
                            let v2009 = C::unpack_value_array_2(ctx, v2007);
15368
0
                            let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15369
0
                            let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15370
0
                            let v2064 = constructor_x64_punpckhqdq(ctx, v2014, v2015);
15371
0
                            let v2065 = constructor_output_xmm(ctx, v2064);
15372
0
                            // Rule at src/isa/x64/lower.isle line 3886.
15373
0
                            return Some(v2065);
15374
                        }
15375
0
                        _ => {}
15376
                    }
15377
0
                }
15378
0
                let v2070 = C::shufps_imm(ctx, v2008);
15379
0
                if let Some(v2071) = v2070 {
15380
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15381
0
                    let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15382
0
                    let v2015 = &C::put_in_xmm_mem(ctx, v2009.1);
15383
0
                    let v2072 = constructor_x64_shufps(ctx, v2014, v2015, v2071);
15384
0
                    let v2073 = constructor_output_xmm(ctx, v2072);
15385
0
                    // Rule at src/isa/x64/lower.isle line 3909.
15386
0
                    return Some(v2073);
15387
0
                }
15388
0
                let v2074 = C::shufps_rev_imm(ctx, v2008);
15389
0
                if let Some(v2075) = v2074 {
15390
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15391
0
                    let v2020 = constructor_put_in_xmm(ctx, v2009.1);
15392
0
                    let v2021 = &C::put_in_xmm_mem(ctx, v2009.0);
15393
0
                    let v2076 = constructor_x64_shufps(ctx, v2020, v2021, v2075);
15394
0
                    let v2077 = constructor_output_xmm(ctx, v2076);
15395
0
                    // Rule at src/isa/x64/lower.isle line 3911.
15396
0
                    return Some(v2077);
15397
0
                }
15398
0
                let v2078 = &C::vec_mask_from_immediate(ctx, v2008);
15399
0
                if let Some(v2079) = v2078 {
15400
0
                    let v2009 = C::unpack_value_array_2(ctx, v2007);
15401
0
                    if v2009.0 == v2009.1 {
15402
0
                        let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15403
0
                        let v2080 = C::shuffle_0_31_mask(ctx, v2079);
15404
0
                        let v2081 = &constructor_const_to_xmm_mem(ctx, v2080);
15405
0
                        let v2082 = constructor_x64_pshufb(ctx, v2014, v2081);
15406
0
                        let v2083 = constructor_output_xmm(ctx, v2082);
15407
0
                        // Rule at src/isa/x64/lower.isle line 3924.
15408
0
                        return Some(v2083);
15409
0
                    }
15410
0
                    let v1 = C::first_result(ctx, arg0);
15411
0
                    if let Some(v2) = v1 {
15412
0
                        let v3 = C::value_type(ctx, v2);
15413
0
                        let v386 = C::avx512vl_enabled(ctx, v3);
15414
0
                        if v386 == true {
15415
0
                            let v2084 = C::avx512vbmi_enabled(ctx, v3);
15416
0
                            if v2084 == true {
15417
0
                                let v2085 = C::perm_from_mask_with_zeros(ctx, v2079);
15418
0
                                if let Some(v2086) = v2085 {
15419
0
                                    let v2020 = constructor_put_in_xmm(ctx, v2009.1);
15420
0
                                    let v2089 = constructor_put_in_xmm(ctx, v2009.0);
15421
0
                                    let v2090 = constructor_x64_xmm_load_const(ctx, I8X16, v2086.0);
15422
0
                                    let v2091 = constructor_x64_vpermi2b(ctx, v2020, v2089, v2090);
15423
0
                                    let v2092 = &constructor_const_to_xmm_mem(ctx, v2086.1);
15424
0
                                    let v2093 = constructor_x64_andps(ctx, v2091, v2092);
15425
0
                                    let v2094 = constructor_output_xmm(ctx, v2093);
15426
0
                                    // Rule at src/isa/x64/lower.isle line 3930.
15427
0
                                    return Some(v2094);
15428
0
                                }
15429
0
                                let v2020 = constructor_put_in_xmm(ctx, v2009.1);
15430
0
                                let v2089 = constructor_put_in_xmm(ctx, v2009.0);
15431
0
                                let v2095 = C::perm_from_mask(ctx, v2079);
15432
0
                                let v2096 = constructor_x64_xmm_load_const(ctx, I8X16, v2095);
15433
0
                                let v2097 = constructor_x64_vpermi2b(ctx, v2020, v2089, v2096);
15434
0
                                let v2098 = constructor_output_xmm(ctx, v2097);
15435
0
                                // Rule at src/isa/x64/lower.isle line 3937.
15436
0
                                return Some(v2098);
15437
0
                            }
15438
0
                        }
15439
0
                    }
15440
0
                    let v2014 = constructor_put_in_xmm(ctx, v2009.0);
15441
0
                    let v2099 = C::shuffle_0_15_mask(ctx, v2079);
15442
0
                    let v2100 = &constructor_const_to_xmm_mem(ctx, v2099);
15443
0
                    let v2101 = constructor_x64_pshufb(ctx, v2014, v2100);
15444
0
                    let v2102 = constructor_put_in_xmm(ctx, v2009.1);
15445
0
                    let v2103 = C::shuffle_16_31_mask(ctx, v2079);
15446
0
                    let v2104 = &constructor_const_to_xmm_mem(ctx, v2103);
15447
0
                    let v2105 = constructor_x64_pshufb(ctx, v2102, v2104);
15448
0
                    let v2106 = &C::xmm_to_xmm_mem(ctx, v2105);
15449
0
                    let v2107 = constructor_x64_por(ctx, v2101, v2106);
15450
0
                    let v2108 = constructor_output_xmm(ctx, v2107);
15451
0
                    // Rule at src/isa/x64/lower.isle line 3944.
15452
0
                    return Some(v2108);
15453
0
                }
15454
0
            }
15455
        }
15456
        &InstructionData::StackLoad {
15457
474
            opcode: ref v1916,
15458
474
            stack_slot: v1917,
15459
474
            offset: v1918,
15460
474
        } => {
15461
474
            if let &Opcode::StackAddr = v1916 {
15462
474
                let v1919 = constructor_stack_addr_impl(ctx, v1917, v1918);
15463
474
                let v1920 = constructor_output_gpr(ctx, v1919);
15464
474
                // Rule at src/isa/x64/lower.isle line 3623.
15465
474
                return Some(v1920);
15466
0
            }
15467
        }
15468
        &InstructionData::Store {
15469
524k
            opcode: ref v1385,
15470
524k
            args: ref v1386,
15471
524k
            flags: v1387,
15472
524k
            offset: v1388,
15473
524k
        } => {
15474
524k
            match v1385 {
15475
                &Opcode::Store => {
15476
470k
                    let v1389 = C::unpack_value_array_2(ctx, v1386);
15477
470k
                    let v1431 = C::def_inst(ctx, v1389.0);
15478
470k
                    if let Some(
v1432443k
) = v1431 {
15479
443k
                        let v1433 = C::first_result(ctx, v1432);
15480
443k
                        if let Some(v1434) = v1433 {
15481
443k
                            let v1436 = &C::inst_data(ctx, v1432);
15482
443k
                            match v1436 {
15483
                                &InstructionData::Binary {
15484
68.3k
                                    opcode: ref v1456,
15485
68.3k
                                    args: ref v1457,
15486
68.3k
                                } => {
15487
68.3k
                                    match v1456 {
15488
                                        &Opcode::Iadd => {
15489
54.7k
                                            let v1435 = C::value_type(ctx, v1434);
15490
54.7k
                                            let v1454 = C::ty_32_or_64(ctx, v1435);
15491
54.7k
                                            if let Some(v1455) = v1454 {
15492
54.7k
                                                let v1458 = C::unpack_value_array_2(ctx, v1457);
15493
54.7k
                                                let v1461 = &C::sinkable_load(ctx, v1458.0);
15494
54.7k
                                                if let Some(
v14621.92k
) = v1461 {
15495
1.92k
                                                    let v1463 = C::def_inst(ctx, v1458.0);
15496
1.92k
                                                    if let Some(v1464) = v1463 {
15497
1.92k
                                                        let v1465 = &C::inst_data(ctx, v1464);
15498
                                                        if let &InstructionData::Load {
15499
1.92k
                                                            opcode: ref v1466,
15500
1.92k
                                                            arg: v1467,
15501
1.92k
                                                            flags: v1468,
15502
1.92k
                                                            offset: v1469,
15503
1.92k
                                                        } = v1465 {
15504
1.92k
                                                            if let &Opcode::Load = v1466 {
15505
1.92k
                                                                if v1387 == v1468 {
15506
1.92k
                                                                    if v1388 == v1469 {
15507
1.92k
                                                                        if v1389.1 == v1467 {
15508
1.52k
                                                                            let v1470 = &constructor_sink_load_to_reg_mem_imm(ctx, v1462);
15509
1.52k
                                                                            let v1471 = &constructor_to_amode(ctx, v1468, v1467, v1469);
15510
1.52k
                                                                            let v1472 = constructor_put_in_gpr(ctx, v1458.1);
15511
1.52k
                                                                            let v1473 = &constructor_x64_add_mem(ctx, v1455, v1471, v1472);
15512
1.52k
                                                                            let v1474 = constructor_side_effect(ctx, v1473);
15513
1.52k
                                                                            // Rule at src/isa/x64/lower.isle line 2792.
15514
1.52k
                                                                            return Some(v1474);
15515
447
                                                                        }
15516
0
                                                                    }
15517
0
                                                                }
15518
0
                                                            }
15519
0
                                                        }
15520
0
                                                    }
15521
52.8k
                                                }
15522
53.2k
                                                let v1475 = &C::sinkable_load(ctx, v1458.1);
15523
53.2k
                                                if let Some(
v147632
) = v1475 {
15524
32
                                                    let v1477 = C::def_inst(ctx, v1458.1);
15525
32
                                                    if let Some(v1478) = v1477 {
15526
32
                                                        let v1479 = &C::inst_data(ctx, v1478);
15527
                                                        if let &InstructionData::Load {
15528
32
                                                            opcode: ref v1480,
15529
32
                                                            arg: v1481,
15530
32
                                                            flags: v1482,
15531
32
                                                            offset: v1483,
15532
32
                                                        } = v1479 {
15533
32
                                                            if let &Opcode::Load = v1480 {
15534
32
                                                                if v1387 == v1482 {
15535
32
                                                                    if v1388 == v1483 {
15536
32
                                                                        if v1389.1 == v1481 {
15537
9
                                                                            let v1484 = &constructor_sink_load_to_reg_mem_imm(ctx, v1476);
15538
9
                                                                            let v1485 = &constructor_to_amode(ctx, v1482, v1481, v1483);
15539
9
                                                                            let v1486 = constructor_put_in_gpr(ctx, v1458.0);
15540
9
                                                                            let v1487 = &constructor_x64_add_mem(ctx, v1455, v1485, v1486);
15541
9
                                                                            let v1488 = constructor_side_effect(ctx, v1487);
15542
9
                                                                            // Rule at src/isa/x64/lower.isle line 2806.
15543
9
                                                                            return Some(v1488);
15544
23
                                                                        }
15545
0
                                                                    }
15546
0
                                                                }
15547
0
                                                            }
15548
0
                                                        }
15549
0
                                                    }
15550
53.2k
                                                }
15551
0
                                            }
15552
                                        }
15553
                                        &Opcode::Isub => {
15554
10.0k
                                            let v1435 = C::value_type(ctx, v1434);
15555
10.0k
                                            let v1454 = C::ty_32_or_64(ctx, v1435);
15556
10.0k
                                            if let Some(v1455) = v1454 {
15557
10.0k
                                                let v1458 = C::unpack_value_array_2(ctx, v1457);
15558
10.0k
                                                let v1461 = &C::sinkable_load(ctx, v1458.0);
15559
10.0k
                                                if let Some(
v14627
) = v1461 {
15560
7
                                                    let v1463 = C::def_inst(ctx, v1458.0);
15561
7
                                                    if let Some(v1464) = v1463 {
15562
7
                                                        let v1465 = &C::inst_data(ctx, v1464);
15563
                                                        if let &InstructionData::Load {
15564
7
                                                            opcode: ref v1466,
15565
7
                                                            arg: v1467,
15566
7
                                                            flags: v1468,
15567
7
                                                            offset: v1469,
15568
7
                                                        } = v1465 {
15569
7
                                                            if let &Opcode::Load = v1466 {
15570
7
                                                                if v1387 == v1468 {
15571
7
                                                                    if v1388 == v1469 {
15572
7
                                                                        if v1389.1 == v1467 {
15573
7
                                                                            let v1470 = &constructor_sink_load_to_reg_mem_imm(ctx, v1462);
15574
7
                                                                            let v1471 = &constructor_to_amode(ctx, v1468, v1467, v1469);
15575
7
                                                                            let v1472 = constructor_put_in_gpr(ctx, v1458.1);
15576
7
                                                                            let v1489 = &constructor_x64_sub_mem(ctx, v1455, v1471, v1472);
15577
7
                                                                            let v1490 = constructor_side_effect(ctx, v1489);
15578
7
                                                                            // Rule at src/isa/x64/lower.isle line 2820.
15579
7
                                                                            return Some(v1490);
15580
0
                                                                        }
15581
0
                                                                    }
15582
0
                                                                }
15583
0
                                                            }
15584
0
                                                        }
15585
0
                                                    }
15586
10.0k
                                                }
15587
0
                                            }
15588
                                        }
15589
                                        &Opcode::Band => {
15590
566
                                            let v1435 = C::value_type(ctx, v1434);
15591
566
                                            let v1454 = C::ty_32_or_64(ctx, v1435);
15592
566
                                            if let Some(v1455) = v1454 {
15593
566
                                                let v1458 = C::unpack_value_array_2(ctx, v1457);
15594
566
                                                let v1461 = &C::sinkable_load(ctx, v1458.0);
15595
566
                                                if let Some(
v146218
) = v1461 {
15596
18
                                                    let v1463 = C::def_inst(ctx, v1458.0);
15597
18
                                                    if let Some(v1464) = v1463 {
15598
18
                                                        let v1465 = &C::inst_data(ctx, v1464);
15599
                                                        if let &InstructionData::Load {
15600
18
                                                            opcode: ref v1466,
15601
18
                                                            arg: v1467,
15602
18
                                                            flags: v1468,
15603
18
                                                            offset: v1469,
15604
18
                                                        } = v1465 {
15605
18
                                                            if let &Opcode::Load = v1466 {
15606
18
                                                                if v1387 == v1468 {
15607
18
                                                                    if v1388 == v1469 {
15608
18
                                                                        if v1389.1 == v1467 {
15609
0
                                                                            let v1470 = &constructor_sink_load_to_reg_mem_imm(ctx, v1462);
15610
0
                                                                            let v1471 = &constructor_to_amode(ctx, v1468, v1467, v1469);
15611
0
                                                                            let v1472 = constructor_put_in_gpr(ctx, v1458.1);
15612
0
                                                                            let v1491 = &constructor_x64_and_mem(ctx, v1455, v1471, v1472);
15613
0
                                                                            let v1492 = constructor_side_effect(ctx, v1491);
15614
0
                                                                            // Rule at src/isa/x64/lower.isle line 2834.
15615
0
                                                                            return Some(v1492);
15616
18
                                                                        }
15617
0
                                                                    }
15618
0
                                                                }
15619
0
                                                            }
15620
0
                                                        }
15621
0
                                                    }
15622
548
                                                }
15623
566
                                                let v1475 = &C::sinkable_load(ctx, v1458.1);
15624
566
                                                if let Some(
v14760
) = v1475 {
15625
0
                                                    let v1477 = C::def_inst(ctx, v1458.1);
15626
0
                                                    if let Some(v1478) = v1477 {
15627
0
                                                        let v1479 = &C::inst_data(ctx, v1478);
15628
                                                        if let &InstructionData::Load {
15629
0
                                                            opcode: ref v1480,
15630
0
                                                            arg: v1481,
15631
0
                                                            flags: v1482,
15632
0
                                                            offset: v1483,
15633
0
                                                        } = v1479 {
15634
0
                                                            if let &Opcode::Load = v1480 {
15635
0
                                                                if v1387 == v1482 {
15636
0
                                                                    if v1388 == v1483 {
15637
0
                                                                        if v1389.1 == v1481 {
15638
0
                                                                            let v1484 = &constructor_sink_load_to_reg_mem_imm(ctx, v1476);
15639
0
                                                                            let v1485 = &constructor_to_amode(ctx, v1482, v1481, v1483);
15640
0
                                                                            let v1486 = constructor_put_in_gpr(ctx, v1458.0);
15641
0
                                                                            let v1493 = &constructor_x64_and_mem(ctx, v1455, v1485, v1486);
15642
0
                                                                            let v1494 = constructor_side_effect(ctx, v1493);
15643
0
                                                                            // Rule at src/isa/x64/lower.isle line 2848.
15644
0
                                                                            return Some(v1494);
15645
0
                                                                        }
15646
0
                                                                    }
15647
0
                                                                }
15648
0
                                                            }
15649
0
                                                        }
15650
0
                                                    }
15651
566
                                                }
15652
0
                                            }
15653
                                        }
15654
                                        &Opcode::Bor => {
15655
975
                                            let v1435 = C::value_type(ctx, v1434);
15656
975
                                            let v1454 = C::ty_32_or_64(ctx, v1435);
15657
975
                                            if let Some(v1455) = v1454 {
15658
975
                                                let v1458 = C::unpack_value_array_2(ctx, v1457);
15659
975
                                                let v1461 = &C::sinkable_load(ctx, v1458.0);
15660
975
                                                if let Some(
v14620
) = v1461 {
15661
0
                                                    let v1463 = C::def_inst(ctx, v1458.0);
15662
0
                                                    if let Some(v1464) = v1463 {
15663
0
                                                        let v1465 = &C::inst_data(ctx, v1464);
15664
                                                        if let &InstructionData::Load {
15665
0
                                                            opcode: ref v1466,
15666
0
                                                            arg: v1467,
15667
0
                                                            flags: v1468,
15668
0
                                                            offset: v1469,
15669
0
                                                        } = v1465 {
15670
0
                                                            if let &Opcode::Load = v1466 {
15671
0
                                                                if v1387 == v1468 {
15672
0
                                                                    if v1388 == v1469 {
15673
0
                                                                        if v1389.1 == v1467 {
15674
0
                                                                            let v1470 = &constructor_sink_load_to_reg_mem_imm(ctx, v1462);
15675
0
                                                                            let v1471 = &constructor_to_amode(ctx, v1468, v1467, v1469);
15676
0
                                                                            let v1472 = constructor_put_in_gpr(ctx, v1458.1);
15677
0
                                                                            let v1495 = &constructor_x64_or_mem(ctx, v1455, v1471, v1472);
15678
0
                                                                            let v1496 = constructor_side_effect(ctx, v1495);
15679
0
                                                                            // Rule at src/isa/x64/lower.isle line 2862.
15680
0
                                                                            return Some(v1496);
15681
0
                                                                        }
15682
0
                                                                    }
15683
0
                                                                }
15684
0
                                                            }
15685
0
                                                        }
15686
0
                                                    }
15687
975
                                                }
15688
975
                                                let v1475 = &C::sinkable_load(ctx, v1458.1);
15689
975
                                                if let Some(
v14760
) = v1475 {
15690
0
                                                    let v1477 = C::def_inst(ctx, v1458.1);
15691
0
                                                    if let Some(v1478) = v1477 {
15692
0
                                                        let v1479 = &C::inst_data(ctx, v1478);
15693
                                                        if let &InstructionData::Load {
15694
0
                                                            opcode: ref v1480,
15695
0
                                                            arg: v1481,
15696
0
                                                            flags: v1482,
15697
0
                                                            offset: v1483,
15698
0
                                                        } = v1479 {
15699
0
                                                            if let &Opcode::Load = v1480 {
15700
0
                                                                if v1387 == v1482 {
15701
0
                                                                    if v1388 == v1483 {
15702
0
                                                                        if v1389.1 == v1481 {
15703
0
                                                                            let v1484 = &constructor_sink_load_to_reg_mem_imm(ctx, v1476);
15704
0
                                                                            let v1485 = &constructor_to_amode(ctx, v1482, v1481, v1483);
15705
0
                                                                            let v1486 = constructor_put_in_gpr(ctx, v1458.0);
15706
0
                                                                            let v1497 = &constructor_x64_or_mem(ctx, v1455, v1485, v1486);
15707
0
                                                                            let v1498 = constructor_side_effect(ctx, v1497);
15708
0
                                                                            // Rule at src/isa/x64/lower.isle line 2876.
15709
0
                                                                            return Some(v1498);
15710
0
                                                                        }
15711
0
                                                                    }
15712
0
                                                                }
15713
0
                                                            }
15714
0
                                                        }
15715
0
                                                    }
15716
975
                                                }
15717
0
                                            }
15718
                                        }
15719
                                        &Opcode::Bxor => {
15720
222
                                            let v1435 = C::value_type(ctx, v1434);
15721
222
                                            let v1454 = C::ty_32_or_64(ctx, v1435);
15722
222
                                            if let Some(v1455) = v1454 {
15723
222
                                                let v1458 = C::unpack_value_array_2(ctx, v1457);
15724
222
                                                let v1461 = &C::sinkable_load(ctx, v1458.0);
15725
222
                                                if let Some(
v14620
) = v1461 {
15726
0
                                                    let v1463 = C::def_inst(ctx, v1458.0);
15727
0
                                                    if let Some(v1464) = v1463 {
15728
0
                                                        let v1465 = &C::inst_data(ctx, v1464);
15729
                                                        if let &InstructionData::Load {
15730
0
                                                            opcode: ref v1466,
15731
0
                                                            arg: v1467,
15732
0
                                                            flags: v1468,
15733
0
                                                            offset: v1469,
15734
0
                                                        } = v1465 {
15735
0
                                                            if let &Opcode::Load = v1466 {
15736
0
                                                                if v1387 == v1468 {
15737
0
                                                                    if v1388 == v1469 {
15738
0
                                                                        if v1389.1 == v1467 {
15739
0
                                                                            let v1470 = &constructor_sink_load_to_reg_mem_imm(ctx, v1462);
15740
0
                                                                            let v1471 = &constructor_to_amode(ctx, v1468, v1467, v1469);
15741
0
                                                                            let v1472 = constructor_put_in_gpr(ctx, v1458.1);
15742
0
                                                                            let v1499 = &constructor_x64_xor_mem(ctx, v1455, v1471, v1472);
15743
0
                                                                            let v1500 = constructor_side_effect(ctx, v1499);
15744
0
                                                                            // Rule at src/isa/x64/lower.isle line 2890.
15745
0
                                                                            return Some(v1500);
15746
0
                                                                        }
15747
0
                                                                    }
15748
0
                                                                }
15749
0
                                                            }
15750
0
                                                        }
15751
0
                                                    }
15752
222
                                                }
15753
222
                                                let v1475 = &C::sinkable_load(ctx, v1458.1);
15754
222
                                                if let Some(
v14760
) = v1475 {
15755
0
                                                    let v1477 = C::def_inst(ctx, v1458.1);
15756
0
                                                    if let Some(v1478) = v1477 {
15757
0
                                                        let v1479 = &C::inst_data(ctx, v1478);
15758
                                                        if let &InstructionData::Load {
15759
0
                                                            opcode: ref v1480,
15760
0
                                                            arg: v1481,
15761
0
                                                            flags: v1482,
15762
0
                                                            offset: v1483,
15763
0
                                                        } = v1479 {
15764
0
                                                            if let &Opcode::Load = v1480 {
15765
0
                                                                if v1387 == v1482 {
15766
0
                                                                    if v1388 == v1483 {
15767
0
                                                                        if v1389.1 == v1481 {
15768
0
                                                                            let v1484 = &constructor_sink_load_to_reg_mem_imm(ctx, v1476);
15769
0
                                                                            let v1485 = &constructor_to_amode(ctx, v1482, v1481, v1483);
15770
0
                                                                            let v1486 = constructor_put_in_gpr(ctx, v1458.0);
15771
0
                                                                            let v1501 = &constructor_x64_xor_mem(ctx, v1455, v1485, v1486);
15772
0
                                                                            let v1502 = constructor_side_effect(ctx, v1501);
15773
0
                                                                            // Rule at src/isa/x64/lower.isle line 2904.
15774
0
                                                                            return Some(v1502);
15775
0
                                                                        }
15776
0
                                                                    }
15777
0
                                                                }
15778
0
                                                            }
15779
0
                                                        }
15780
0
                                                    }
15781
222
                                                }
15782
0
                                            }
15783
                                        }
15784
1.76k
                                        _ => {}
15785
                                    }
15786
                                }
15787
                                &InstructionData::BinaryImm8 {
15788
0
                                    opcode: ref v1437,
15789
0
                                    arg: v1438,
15790
0
                                    imm: v1439,
15791
0
                                } => {
15792
0
                                    if let &Opcode::Extractlane = v1437 {
15793
0
                                        let v1435 = C::value_type(ctx, v1434);
15794
0
                                        match v1435 {
15795
                                            I8 => {
15796
0
                                                let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15797
0
                                                let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15798
0
                                                let v1441 = constructor_put_in_xmm(ctx, v1438);
15799
0
                                                let v1440 = C::u8_from_uimm8(ctx, v1439);
15800
0
                                                let v1446 = &constructor_x64_pextrb_store(ctx, v1397, v1441, v1440);
15801
0
                                                let v1447 = constructor_side_effect(ctx, v1446);
15802
0
                                                // Rule at src/isa/x64/lower.isle line 2764.
15803
0
                                                return Some(v1447);
15804
                                            }
15805
                                            I16 => {
15806
0
                                                let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15807
0
                                                let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15808
0
                                                let v1441 = constructor_put_in_xmm(ctx, v1438);
15809
0
                                                let v1440 = C::u8_from_uimm8(ctx, v1439);
15810
0
                                                let v1448 = &constructor_x64_pextrw_store(ctx, v1397, v1441, v1440);
15811
0
                                                let v1449 = constructor_side_effect(ctx, v1448);
15812
0
                                                // Rule at src/isa/x64/lower.isle line 2770.
15813
0
                                                return Some(v1449);
15814
                                            }
15815
                                            I32 => {
15816
0
                                                let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15817
0
                                                let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15818
0
                                                let v1441 = constructor_put_in_xmm(ctx, v1438);
15819
0
                                                let v1440 = C::u8_from_uimm8(ctx, v1439);
15820
0
                                                let v1450 = &constructor_x64_pextrd_store(ctx, v1397, v1441, v1440);
15821
0
                                                let v1451 = constructor_side_effect(ctx, v1450);
15822
0
                                                // Rule at src/isa/x64/lower.isle line 2776.
15823
0
                                                return Some(v1451);
15824
                                            }
15825
                                            I64 => {
15826
0
                                                let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15827
0
                                                let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15828
0
                                                let v1441 = constructor_put_in_xmm(ctx, v1438);
15829
0
                                                let v1440 = C::u8_from_uimm8(ctx, v1439);
15830
0
                                                let v1452 = &constructor_x64_pextrq_store(ctx, v1397, v1441, v1440);
15831
0
                                                let v1453 = constructor_side_effect(ctx, v1452);
15832
0
                                                // Rule at src/isa/x64/lower.isle line 2782.
15833
0
                                                return Some(v1453);
15834
                                            }
15835
                                            F32 => {
15836
0
                                                let v1440 = C::u8_from_uimm8(ctx, v1439);
15837
0
                                                if v1440 == 0x0 {
15838
0
                                                    let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15839
0
                                                    let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15840
0
                                                    let v1441 = constructor_put_in_xmm(ctx, v1438);
15841
0
                                                    let v1442 = &constructor_x64_movss_store(ctx, v1397, v1441);
15842
0
                                                    let v1443 = constructor_side_effect(ctx, v1442);
15843
0
                                                    // Rule at src/isa/x64/lower.isle line 2752.
15844
0
                                                    return Some(v1443);
15845
0
                                                }
15846
                                            }
15847
                                            F64 => {
15848
0
                                                let v1440 = C::u8_from_uimm8(ctx, v1439);
15849
0
                                                if v1440 == 0x0 {
15850
0
                                                    let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15851
0
                                                    let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15852
0
                                                    let v1441 = constructor_put_in_xmm(ctx, v1438);
15853
0
                                                    let v1444 = &constructor_x64_movsd_store(ctx, v1397, v1441);
15854
0
                                                    let v1445 = constructor_side_effect(ctx, v1444);
15855
0
                                                    // Rule at src/isa/x64/lower.isle line 2758.
15856
0
                                                    return Some(v1445);
15857
0
                                                }
15858
                                            }
15859
0
                                            _ => {}
15860
                                        }
15861
0
                                    }
15862
                                }
15863
375k
                                _ => {}
15864
                            }
15865
0
                        }
15866
26.5k
                    }
15867
468k
                    let v1392 = C::value_type(ctx, v1389.0);
15868
468k
                    match v1392 {
15869
                        I128 => {
15870
0
                            let v1420 = C::put_in_regs(ctx, v1389.0);
15871
0
                            let v1421 = constructor_value_regs_get_gpr(ctx, v1420, 0x0);
15872
0
                            let v1422 = constructor_value_regs_get_gpr(ctx, v1420, 0x1);
15873
0
                            let v1423 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15874
0
                            let v1424 = &C::amode_offset(ctx, v1423, 0x8);
15875
0
                            let v1425 = &C::amode_to_synthetic_amode(ctx, v1423);
15876
0
                            let v1426 = &constructor_x64_movrm(ctx, I64, v1425, v1421);
15877
0
                            let v1427 = &C::amode_to_synthetic_amode(ctx, v1424);
15878
0
                            let v1428 = &constructor_x64_movrm(ctx, I64, v1427, v1422);
15879
0
                            let v1429 = &constructor_side_effect_concat(ctx, v1426, v1428);
15880
0
                            let v1430 = constructor_side_effect(ctx, v1429);
15881
0
                            // Rule at src/isa/x64/lower.isle line 2733.
15882
0
                            return Some(v1430);
15883
                        }
15884
                        F32 => {
15885
0
                            let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15886
0
                            let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15887
0
                            let v1407 = constructor_put_in_xmm(ctx, v1389.0);
15888
0
                            let v1408 = &constructor_x64_movss_store(ctx, v1397, v1407);
15889
0
                            let v1409 = constructor_side_effect(ctx, v1408);
15890
0
                            // Rule at src/isa/x64/lower.isle line 2693.
15891
0
                            return Some(v1409);
15892
                        }
15893
                        F64 => {
15894
1
                            let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15895
1
                            let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15896
1
                            let v1407 = constructor_put_in_xmm(ctx, v1389.0);
15897
1
                            let v1410 = &constructor_x64_movsd_store(ctx, v1397, v1407);
15898
1
                            let v1411 = constructor_side_effect(ctx, v1410);
15899
1
                            // Rule at src/isa/x64/lower.isle line 2701.
15900
1
                            return Some(v1411);
15901
                        }
15902
                        F32X4 => {
15903
0
                            let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15904
0
                            let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15905
0
                            let v1407 = constructor_put_in_xmm(ctx, v1389.0);
15906
0
                            let v1412 = &constructor_x64_movups_store(ctx, v1397, v1407);
15907
0
                            let v1413 = constructor_side_effect(ctx, v1412);
15908
0
                            // Rule at src/isa/x64/lower.isle line 2709.
15909
0
                            return Some(v1413);
15910
                        }
15911
                        F64X2 => {
15912
0
                            let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15913
0
                            let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15914
0
                            let v1407 = constructor_put_in_xmm(ctx, v1389.0);
15915
0
                            let v1414 = &constructor_x64_movupd_store(ctx, v1397, v1407);
15916
0
                            let v1415 = constructor_side_effect(ctx, v1414);
15917
0
                            // Rule at src/isa/x64/lower.isle line 2717.
15918
0
                            return Some(v1415);
15919
                        }
15920
468k
                        _ => {}
15921
468k
                    }
15922
468k
                    let v1416 = C::ty_vec128_int(ctx, v1392);
15923
468k
                    if let Some(
v14170
) = v1416 {
15924
0
                        let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15925
0
                        let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15926
0
                        let v1407 = constructor_put_in_xmm(ctx, v1389.0);
15927
0
                        let v1418 = &constructor_x64_movdqu_store(ctx, v1397, v1407);
15928
0
                        let v1419 = constructor_side_effect(ctx, v1418);
15929
0
                        // Rule at src/isa/x64/lower.isle line 2725.
15930
0
                        return Some(v1419);
15931
468k
                    }
15932
468k
                    let v1393 = &C::type_register_class(ctx, v1392);
15933
468k
                    if let Some(v1394) = v1393 {
15934
                        if let &RegisterClass::Gpr {
15935
468k
                            single_register: v1395,
15936
468k
                        } = v1394 {
15937
468k
                            let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15938
468k
                            let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15939
468k
                            let v1398 = constructor_put_in_gpr(ctx, v1389.0);
15940
468k
                            let v1399 = &constructor_x64_movrm(ctx, v1392, v1397, v1398);
15941
468k
                            let v1400 = constructor_side_effect(ctx, v1399);
15942
468k
                            // Rule at src/isa/x64/lower.isle line 2674.
15943
468k
                            return Some(v1400);
15944
0
                        }
15945
0
                    }
15946
                }
15947
                &Opcode::Istore8 => {
15948
42.0k
                    let v1389 = C::unpack_value_array_2(ctx, v1386);
15949
42.0k
                    let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15950
42.0k
                    let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15951
42.0k
                    let v1398 = constructor_put_in_gpr(ctx, v1389.0);
15952
42.0k
                    let v1401 = &constructor_x64_movrm(ctx, I8, v1397, v1398);
15953
42.0k
                    let v1402 = constructor_side_effect(ctx, v1401);
15954
42.0k
                    // Rule at src/isa/x64/lower.isle line 2682.
15955
42.0k
                    return Some(v1402);
15956
                }
15957
                &Opcode::Istore16 => {
15958
11.1k
                    let v1389 = C::unpack_value_array_2(ctx, v1386);
15959
11.1k
                    let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15960
11.1k
                    let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15961
11.1k
                    let v1398 = constructor_put_in_gpr(ctx, v1389.0);
15962
11.1k
                    let v1403 = &constructor_x64_movrm(ctx, I16, v1397, v1398);
15963
11.1k
                    let v1404 = constructor_side_effect(ctx, v1403);
15964
11.1k
                    // Rule at src/isa/x64/lower.isle line 2685.
15965
11.1k
                    return Some(v1404);
15966
                }
15967
                &Opcode::Istore32 => {
15968
962
                    let v1389 = C::unpack_value_array_2(ctx, v1386);
15969
962
                    let v1396 = &constructor_to_amode(ctx, v1387, v1389.1, v1388);
15970
962
                    let v1397 = &C::amode_to_synthetic_amode(ctx, v1396);
15971
962
                    let v1398 = constructor_put_in_gpr(ctx, v1389.0);
15972
962
                    let v1405 = &constructor_x64_movrm(ctx, I32, v1397, v1398);
15973
962
                    let v1406 = constructor_side_effect(ctx, v1405);
15974
962
                    // Rule at src/isa/x64/lower.isle line 2688.
15975
962
                    return Some(v1406);
15976
                }
15977
0
                _ => {}
15978
            }
15979
        }
15980
        &InstructionData::StoreNoOffset {
15981
0
            opcode: ref v1537,
15982
0
            args: ref v1538,
15983
0
            flags: v1539,
15984
0
        } => {
15985
0
            if let &Opcode::AtomicStore = v1537 {
15986
0
                let v1540 = C::unpack_value_array_2(ctx, v1538);
15987
0
                let v1543 = C::value_type(ctx, v1540.0);
15988
0
                let v1544 = C::fits_in_64(ctx, v1543);
15989
0
                if let Some(v1545) = v1544 {
15990
0
                    let v1546 = C::ty_int(ctx, v1543);
15991
0
                    if let Some(v1547) = v1546 {
15992
0
                        let v1526 = C::zero_offset(ctx);
15993
0
                        let v1548 = &constructor_to_amode(ctx, v1539, v1540.1, v1526);
15994
0
                        let v1549 = &C::amode_to_synthetic_amode(ctx, v1548);
15995
0
                        let v1550 = constructor_put_in_gpr(ctx, v1540.0);
15996
0
                        let v1551 = &constructor_x64_movrm(ctx, v1545, v1549, v1550);
15997
0
                        let v1552 = &constructor_x64_mfence(ctx);
15998
0
                        let v1553 = &constructor_side_effect_concat(ctx, v1551, v1552);
15999
0
                        let v1554 = constructor_side_effect(ctx, v1553);
16000
0
                        // Rule at src/isa/x64/lower.isle line 2951.
16001
0
                        return Some(v1554);
16002
0
                    }
16003
0
                }
16004
0
            }
16005
        }
16006
        &InstructionData::Ternary {
16007
39.7k
            opcode: ref v534,
16008
39.7k
            args: ref v535,
16009
39.7k
        } => {
16010
39.7k
            match v534 {
16011
                &Opcode::Select => {
16012
13.4k
                    let v1 = C::first_result(ctx, arg0);
16013
13.4k
                    if let Some(v2) = v1 {
16014
13.4k
                        let v536 = C::unpack_value_array_3(ctx, v535);
16015
13.4k
                        let v863 = C::maybe_uextend(ctx, v536.0);
16016
13.4k
                        if let Some(v864) = v863 {
16017
13.4k
                            let v865 = C::def_inst(ctx, v864);
16018
13.4k
                            if let Some(
v86612.8k
) = v865 {
16019
12.8k
                                let v867 = &C::inst_data(ctx, v866);
16020
12.8k
                                match v867 {
16021
                                    &InstructionData::FloatCompare {
16022
0
                                        opcode: ref v868,
16023
0
                                        args: ref v869,
16024
0
                                        cond: ref v870,
16025
0
                                    } => {
16026
0
                                        if let &Opcode::Fcmp = v868 {
16027
0
                                            if let &FloatCC::Equal = v870 {
16028
0
                                                let v871 = C::unpack_value_array_2(ctx, v869);
16029
0
                                                let v877 = &constructor_emit_fcmp(ctx, &FloatCC::NotEqual, v871.0, v871.1);
16030
0
                                                let v3 = C::value_type(ctx, v2);
16031
0
                                                let v878 = constructor_lower_select_fcmp(ctx, v3, v877, v536.2, v536.1);
16032
0
                                                // Rule at src/isa/x64/lower.isle line 1776.
16033
0
                                                return Some(v878);
16034
0
                                            }
16035
0
                                            let v871 = C::unpack_value_array_2(ctx, v869);
16036
0
                                            let v874 = &constructor_emit_fcmp(ctx, v870, v871.0, v871.1);
16037
0
                                            let v3 = C::value_type(ctx, v2);
16038
0
                                            let v875 = constructor_lower_select_fcmp(ctx, v3, v874, v536.1, v536.2);
16039
0
                                            // Rule at src/isa/x64/lower.isle line 1774.
16040
0
                                            return Some(v875);
16041
0
                                        }
16042
                                    }
16043
                                    &InstructionData::IntCompare {
16044
8.47k
                                        opcode: ref v879,
16045
8.47k
                                        args: ref v880,
16046
8.47k
                                        cond: ref v881,
16047
8.47k
                                    } => {
16048
8.47k
                                        if let &Opcode::Icmp = v879 {
16049
8.47k
                                            let v882 = C::unpack_value_array_2(ctx, v880);
16050
8.47k
                                            let v885 = C::value_type(ctx, v882.0);
16051
8.47k
                                            let v886 = C::fits_in_64(ctx, v885);
16052
8.47k
                                            if let Some(v887) = v886 {
16053
8.47k
                                                let v888 = &C::raw_operand_size_of_type(ctx, v887);
16054
8.47k
                                                let v889 = &constructor_put_in_gpr_mem_imm(ctx, v882.1);
16055
8.47k
                                                let v890 = constructor_put_in_gpr(ctx, v882.0);
16056
8.47k
                                                let v891 = &constructor_x64_cmp(ctx, v888, v889, v890);
16057
8.47k
                                                let v892 = &C::intcc_to_cc(ctx, v881);
16058
8.47k
                                                let v3 = C::value_type(ctx, v2);
16059
8.47k
                                                let v893 = &constructor_cmove_from_values(ctx, v3, v892, v536.1, v536.2);
16060
8.47k
                                                let v894 = constructor_with_flags(ctx, v891, v893);
16061
8.47k
                                                let v895 = C::output(ctx, v894);
16062
8.47k
                                                // Rule at src/isa/x64/lower.isle line 1790.
16063
8.47k
                                                return Some(v895);
16064
0
                                            }
16065
0
                                        }
16066
                                    }
16067
4.37k
                                    _ => {}
16068
                                }
16069
587
                            }
16070
0
                        }
16071
4.95k
                        let v896 = C::value_type(ctx, v536.0);
16072
4.95k
                        let v897 = C::fits_in_64(ctx, v896);
16073
4.95k
                        if let Some(v898) = v897 {
16074
4.95k
                            let v899 = &C::raw_operand_size_of_type(ctx, v898);
16075
4.95k
                            let v900 = constructor_put_in_gpr(ctx, v536.0);
16076
4.95k
                            let v901 = &C::gpr_to_gpr_mem_imm(ctx, v900);
16077
4.95k
                            let v902 = &constructor_x64_test(ctx, v899, v901, v900);
16078
4.95k
                            let v3 = C::value_type(ctx, v2);
16079
4.95k
                            let v904 = &constructor_cmove_from_values(ctx, v3, &CC::NZ, v536.1, v536.2);
16080
4.95k
                            let v905 = constructor_with_flags(ctx, v902, v904);
16081
4.95k
                            let v906 = C::output(ctx, v905);
16082
4.95k
                            // Rule at src/isa/x64/lower.isle line 1797.
16083
4.95k
                            return Some(v906);
16084
0
                        }
16085
0
                        if v896 == I128 {
16086
0
                            let v908 = C::put_in_regs(ctx, v536.0);
16087
0
                            let v909 = &constructor_cmp_zero_i128(ctx, &CC::Z, v908);
16088
0
                            let v910 = constructor_select_icmp(ctx, v909, v536.1, v536.2);
16089
0
                            let v911 = C::output(ctx, v910);
16090
0
                            // Rule at src/isa/x64/lower.isle line 1804.
16091
0
                            return Some(v911);
16092
0
                        }
16093
0
                    }
16094
                }
16095
                &Opcode::SelectSpectreGuard => {
16096
26.3k
                    let v536 = C::unpack_value_array_3(ctx, v535);
16097
26.3k
                    let v1609 = C::def_inst(ctx, v536.0);
16098
26.3k
                    if let Some(v1610) = v1609 {
16099
26.3k
                        let v1611 = &C::inst_data(ctx, v1610);
16100
                        if let &InstructionData::IntCompare {
16101
26.3k
                            opcode: ref v1612,
16102
26.3k
                            args: ref v1613,
16103
26.3k
                            cond: ref v1614,
16104
26.3k
                        } = v1611 {
16105
26.3k
                            if let &Opcode::Icmp = v1612 {
16106
26.3k
                                let v1615 = C::unpack_value_array_2(ctx, v1613);
16107
26.3k
                                let v1618 = &constructor_emit_cmp(ctx, v1614, v1615.0, v1615.1);
16108
26.3k
                                let v1619 = constructor_select_icmp(ctx, v1618, v536.1, v536.2);
16109
26.3k
                                let v1620 = C::output(ctx, v1619);
16110
26.3k
                                // Rule at src/isa/x64/lower.isle line 3062.
16111
26.3k
                                return Some(v1620);
16112
0
                            }
16113
0
                        }
16114
0
                    }
16115
0
                    let v1 = C::first_result(ctx, arg0);
16116
0
                    if let Some(v2) = v1 {
16117
0
                        let v896 = C::value_type(ctx, v536.0);
16118
0
                        let v897 = C::fits_in_64(ctx, v896);
16119
0
                        if let Some(v898) = v897 {
16120
0
                            let v899 = &C::raw_operand_size_of_type(ctx, v898);
16121
0
                            let v900 = constructor_put_in_gpr(ctx, v536.0);
16122
0
                            let v901 = &C::gpr_to_gpr_mem_imm(ctx, v900);
16123
0
                            let v902 = &constructor_x64_test(ctx, v899, v901, v900);
16124
0
                            let v3 = C::value_type(ctx, v2);
16125
0
                            let v904 = &constructor_cmove_from_values(ctx, v3, &CC::NZ, v536.1, v536.2);
16126
0
                            let v905 = constructor_with_flags(ctx, v902, v904);
16127
0
                            let v906 = C::output(ctx, v905);
16128
0
                            // Rule at src/isa/x64/lower.isle line 3065.
16129
0
                            return Some(v906);
16130
0
                        }
16131
0
                        if v896 == I128 {
16132
0
                            let v908 = C::put_in_regs(ctx, v536.0);
16133
0
                            let v909 = &constructor_cmp_zero_i128(ctx, &CC::Z, v908);
16134
0
                            let v910 = constructor_select_icmp(ctx, v909, v536.1, v536.2);
16135
0
                            let v911 = C::output(ctx, v910);
16136
0
                            // Rule at src/isa/x64/lower.isle line 3070.
16137
0
                            return Some(v911);
16138
0
                        }
16139
0
                    }
16140
                }
16141
                &Opcode::Bitselect => {
16142
0
                    let v1 = C::first_result(ctx, arg0);
16143
0
                    if let Some(v2) = v1 {
16144
0
                        let v3 = C::value_type(ctx, v2);
16145
0
                        let v53 = C::multi_lane(ctx, v3);
16146
0
                        if let Some(v54) = v53 {
16147
0
                            let v536 = C::unpack_value_array_3(ctx, v535);
16148
0
                            let v549 = constructor_all_ones_or_all_zeros(ctx, v536.0);
16149
0
                            if let Some(v550) = v549 {
16150
0
                                let v540 = constructor_put_in_xmm(ctx, v536.0);
16151
0
                                let v551 = &C::put_in_xmm_mem(ctx, v536.1);
16152
0
                                let v552 = constructor_put_in_xmm(ctx, v536.2);
16153
0
                                let v553 = constructor_x64_blend(ctx, v3, v540, v551, v552);
16154
0
                                let v554 = constructor_output_xmm(ctx, v553);
16155
0
                                // Rule at src/isa/x64/lower.isle line 1230.
16156
0
                                return Some(v554);
16157
0
                            }
16158
0
                            let v540 = constructor_put_in_xmm(ctx, v536.0);
16159
0
                            let v541 = constructor_put_in_xmm(ctx, v536.1);
16160
0
                            let v542 = &C::xmm_to_xmm_mem(ctx, v540);
16161
0
                            let v543 = constructor_sse_and(ctx, v3, v541, v542);
16162
0
                            let v544 = &C::put_in_xmm_mem(ctx, v536.2);
16163
0
                            let v545 = constructor_sse_and_not(ctx, v3, v540, v544);
16164
0
                            let v546 = &C::xmm_to_xmm_mem(ctx, v543);
16165
0
                            let v547 = constructor_sse_or(ctx, v3, v545, v546);
16166
0
                            let v548 = constructor_output_xmm(ctx, v547);
16167
0
                            // Rule at src/isa/x64/lower.isle line 1216.
16168
0
                            return Some(v548);
16169
0
                        }
16170
0
                    }
16171
                }
16172
                &Opcode::X86Blendv => {
16173
0
                    let v1 = C::first_result(ctx, arg0);
16174
0
                    if let Some(v2) = v1 {
16175
0
                        let v3 = C::value_type(ctx, v2);
16176
0
                        match v3 {
16177
                            I8X16 => {
16178
0
                                let v536 = C::unpack_value_array_3(ctx, v535);
16179
0
                                let v555 = constructor_put_in_xmm(ctx, v536.2);
16180
0
                                let v551 = &C::put_in_xmm_mem(ctx, v536.1);
16181
0
                                let v556 = constructor_put_in_xmm(ctx, v536.0);
16182
0
                                let v557 = constructor_x64_pblendvb(ctx, v555, v551, v556);
16183
0
                                let v558 = constructor_output_xmm(ctx, v557);
16184
0
                                // Rule at src/isa/x64/lower.isle line 1250.
16185
0
                                return Some(v558);
16186
                            }
16187
                            I32X4 => {
16188
0
                                let v536 = C::unpack_value_array_3(ctx, v535);
16189
0
                                let v555 = constructor_put_in_xmm(ctx, v536.2);
16190
0
                                let v551 = &C::put_in_xmm_mem(ctx, v536.1);
16191
0
                                let v556 = constructor_put_in_xmm(ctx, v536.0);
16192
0
                                let v559 = constructor_x64_blendvps(ctx, v555, v551, v556);
16193
0
                                let v560 = constructor_output_xmm(ctx, v559);
16194
0
                                // Rule at src/isa/x64/lower.isle line 1254.
16195
0
                                return Some(v560);
16196
                            }
16197
                            I64X2 => {
16198
0
                                let v536 = C::unpack_value_array_3(ctx, v535);
16199
0
                                let v555 = constructor_put_in_xmm(ctx, v536.2);
16200
0
                                let v551 = &C::put_in_xmm_mem(ctx, v536.1);
16201
0
                                let v556 = constructor_put_in_xmm(ctx, v536.0);
16202
0
                                let v561 = constructor_x64_blendvpd(ctx, v555, v551, v556);
16203
0
                                let v562 = constructor_output_xmm(ctx, v561);
16204
0
                                // Rule at src/isa/x64/lower.isle line 1258.
16205
0
                                return Some(v562);
16206
                            }
16207
0
                            _ => {}
16208
                        }
16209
0
                    }
16210
                }
16211
                &Opcode::Fma => {
16212
0
                    let v1 = C::first_result(ctx, arg0);
16213
0
                    if let Some(v2) = v1 {
16214
0
                        let v1304 = C::use_fma(ctx);
16215
0
                        if v1304 == true {
16216
0
                            let v3 = C::value_type(ctx, v2);
16217
0
                            let v536 = C::unpack_value_array_3(ctx, v535);
16218
0
                            let v1305 = constructor_fmadd(ctx, v3, v536.0, v536.1, v536.2);
16219
0
                            let v1306 = constructor_output_xmm(ctx, v1305);
16220
0
                            // Rule at src/isa/x64/lower.isle line 2553.
16221
0
                            return Some(v1306);
16222
0
                        }
16223
0
                        let v3 = C::value_type(ctx, v2);
16224
0
                        match v3 {
16225
                            F32 => {
16226
0
                                let v536 = C::unpack_value_array_3(ctx, v535);
16227
0
                                let v1225 = C::put_in_reg(ctx, v536.0);
16228
0
                                let v1226 = C::put_in_reg(ctx, v536.1);
16229
0
                                let v1227 = C::put_in_reg(ctx, v536.2);
16230
0
                                let v1228 = C::libcall_3(ctx, &LibCall::FmaF32, v1225, v1226, v1227);
16231
0
                                let v1229 = constructor_output_reg(ctx, v1228);
16232
0
                                // Rule at src/isa/x64/lower.isle line 2508.
16233
0
                                return Some(v1229);
16234
                            }
16235
                            F64 => {
16236
0
                                let v536 = C::unpack_value_array_3(ctx, v535);
16237
0
                                let v1225 = C::put_in_reg(ctx, v536.0);
16238
0
                                let v1226 = C::put_in_reg(ctx, v536.1);
16239
0
                                let v1227 = C::put_in_reg(ctx, v536.2);
16240
0
                                let v1231 = C::libcall_3(ctx, &LibCall::FmaF64, v1225, v1226, v1227);
16241
0
                                let v1232 = constructor_output_reg(ctx, v1231);
16242
0
                                // Rule at src/isa/x64/lower.isle line 2510.
16243
0
                                return Some(v1232);
16244
                            }
16245
                            F32X4 => {
16246
0
                                let v536 = C::unpack_value_array_3(ctx, v535);
16247
0
                                let v540 = constructor_put_in_xmm(ctx, v536.0);
16248
0
                                let v541 = constructor_put_in_xmm(ctx, v536.1);
16249
0
                                let v552 = constructor_put_in_xmm(ctx, v536.2);
16250
0
                                let v1233 = C::xmm_to_reg(ctx, v540);
16251
0
                                let v1234 = C::xmm_to_reg(ctx, v541);
16252
0
                                let v1235 = C::xmm_to_reg(ctx, v552);
16253
0
                                let v1236 = C::libcall_3(ctx, &LibCall::FmaF32, v1233, v1234, v1235);
16254
0
                                let v1237 = C::xmm_new(ctx, v1236);
16255
0
                                let v1238 = &C::xmm_to_xmm_mem(ctx, v540);
16256
0
                                let v1239 = constructor_x64_pshufd(ctx, v1238, 0x1);
16257
0
                                let v1240 = C::xmm_to_reg(ctx, v1239);
16258
0
                                let v1241 = &C::xmm_to_xmm_mem(ctx, v541);
16259
0
                                let v1242 = constructor_x64_pshufd(ctx, v1241, 0x1);
16260
0
                                let v1243 = C::xmm_to_reg(ctx, v1242);
16261
0
                                let v1244 = &C::xmm_to_xmm_mem(ctx, v552);
16262
0
                                let v1245 = constructor_x64_pshufd(ctx, v1244, 0x1);
16263
0
                                let v1246 = C::xmm_to_reg(ctx, v1245);
16264
0
                                let v1247 = C::libcall_3(ctx, &LibCall::FmaF32, v1240, v1243, v1246);
16265
0
                                let v1248 = C::xmm_new(ctx, v1247);
16266
0
                                let v1249 = &C::xmm_to_xmm_mem(ctx, v540);
16267
0
                                let v1251 = constructor_x64_pshufd(ctx, v1249, 0x2);
16268
0
                                let v1252 = C::xmm_to_reg(ctx, v1251);
16269
0
                                let v1253 = &C::xmm_to_xmm_mem(ctx, v541);
16270
0
                                let v1254 = constructor_x64_pshufd(ctx, v1253, 0x2);
16271
0
                                let v1255 = C::xmm_to_reg(ctx, v1254);
16272
0
                                let v1256 = &C::xmm_to_xmm_mem(ctx, v552);
16273
0
                                let v1257 = constructor_x64_pshufd(ctx, v1256, 0x2);
16274
0
                                let v1258 = C::xmm_to_reg(ctx, v1257);
16275
0
                                let v1259 = C::libcall_3(ctx, &LibCall::FmaF32, v1252, v1255, v1258);
16276
0
                                let v1260 = C::xmm_new(ctx, v1259);
16277
0
                                let v1261 = &C::xmm_to_xmm_mem(ctx, v540);
16278
0
                                let v1263 = constructor_x64_pshufd(ctx, v1261, 0x3);
16279
0
                                let v1264 = C::xmm_to_reg(ctx, v1263);
16280
0
                                let v1265 = &C::xmm_to_xmm_mem(ctx, v541);
16281
0
                                let v1266 = constructor_x64_pshufd(ctx, v1265, 0x3);
16282
0
                                let v1267 = C::xmm_to_reg(ctx, v1266);
16283
0
                                let v1268 = &C::xmm_to_xmm_mem(ctx, v552);
16284
0
                                let v1269 = constructor_x64_pshufd(ctx, v1268, 0x3);
16285
0
                                let v1270 = C::xmm_to_reg(ctx, v1269);
16286
0
                                let v1271 = C::libcall_3(ctx, &LibCall::FmaF32, v1264, v1267, v1270);
16287
0
                                let v1272 = C::xmm_new(ctx, v1271);
16288
0
                                let v1274 = C::xmm_to_reg(ctx, v1248);
16289
0
                                let v1275 = &constructor_xmm_to_reg_mem(ctx, v1274);
16290
0
                                let v1276 = &C::xmm_mem_to_reg_mem(ctx, v1275);
16291
0
                                let v1277 = constructor_vec_insert_lane(ctx, F32X4, v1237, v1276, 0x1);
16292
0
                                let v1278 = C::xmm_to_reg(ctx, v1260);
16293
0
                                let v1279 = &constructor_xmm_to_reg_mem(ctx, v1278);
16294
0
                                let v1280 = &C::xmm_mem_to_reg_mem(ctx, v1279);
16295
0
                                let v1281 = constructor_vec_insert_lane(ctx, F32X4, v1277, v1280, 0x2);
16296
0
                                let v1282 = C::xmm_to_reg(ctx, v1272);
16297
0
                                let v1283 = &constructor_xmm_to_reg_mem(ctx, v1282);
16298
0
                                let v1284 = &C::xmm_mem_to_reg_mem(ctx, v1283);
16299
0
                                let v1285 = constructor_vec_insert_lane(ctx, F32X4, v1281, v1284, 0x3);
16300
0
                                let v1286 = constructor_output_xmm(ctx, v1285);
16301
0
                                // Rule at src/isa/x64/lower.isle line 2513.
16302
0
                                return Some(v1286);
16303
                            }
16304
                            F64X2 => {
16305
0
                                let v536 = C::unpack_value_array_3(ctx, v535);
16306
0
                                let v540 = constructor_put_in_xmm(ctx, v536.0);
16307
0
                                let v541 = constructor_put_in_xmm(ctx, v536.1);
16308
0
                                let v552 = constructor_put_in_xmm(ctx, v536.2);
16309
0
                                let v1233 = C::xmm_to_reg(ctx, v540);
16310
0
                                let v1234 = C::xmm_to_reg(ctx, v541);
16311
0
                                let v1235 = C::xmm_to_reg(ctx, v552);
16312
0
                                let v1287 = C::libcall_3(ctx, &LibCall::FmaF64, v1233, v1234, v1235);
16313
0
                                let v1288 = C::xmm_new(ctx, v1287);
16314
0
                                let v1238 = &C::xmm_to_xmm_mem(ctx, v540);
16315
0
                                let v1290 = constructor_x64_pshufd(ctx, v1238, 0xEE);
16316
0
                                let v1291 = C::xmm_to_reg(ctx, v1290);
16317
0
                                let v1241 = &C::xmm_to_xmm_mem(ctx, v541);
16318
0
                                let v1292 = constructor_x64_pshufd(ctx, v1241, 0xEE);
16319
0
                                let v1293 = C::xmm_to_reg(ctx, v1292);
16320
0
                                let v1244 = &C::xmm_to_xmm_mem(ctx, v552);
16321
0
                                let v1294 = constructor_x64_pshufd(ctx, v1244, 0xEE);
16322
0
                                let v1295 = C::xmm_to_reg(ctx, v1294);
16323
0
                                let v1296 = C::libcall_3(ctx, &LibCall::FmaF64, v1291, v1293, v1295);
16324
0
                                let v1297 = C::xmm_new(ctx, v1296);
16325
0
                                let v1299 = C::xmm_to_reg(ctx, v1297);
16326
0
                                let v1300 = &constructor_xmm_to_reg_mem(ctx, v1299);
16327
0
                                let v1301 = &C::xmm_mem_to_reg_mem(ctx, v1300);
16328
0
                                let v1302 = constructor_vec_insert_lane(ctx, F64X2, v1288, v1301, 0x1);
16329
0
                                let v1303 = constructor_output_xmm(ctx, v1302);
16330
0
                                // Rule at src/isa/x64/lower.isle line 2537.
16331
0
                                return Some(v1303);
16332
                            }
16333
0
                            _ => {}
16334
                        }
16335
0
                    }
16336
                }
16337
0
                _ => {}
16338
            }
16339
        }
16340
        &InstructionData::TernaryImm8 {
16341
0
            opcode: ref v563,
16342
0
            args: ref v564,
16343
0
            imm: v565,
16344
0
        } => {
16345
0
            if let &Opcode::Insertlane = v563 {
16346
0
                let v566 = C::unpack_value_array_2(ctx, v564);
16347
0
                let v571 = constructor_put_in_xmm(ctx, v566.0);
16348
0
                let v572 = &C::put_in_reg_mem(ctx, v566.1);
16349
0
                let v569 = C::value_type(ctx, v566.0);
16350
0
                let v570 = C::u8_from_uimm8(ctx, v565);
16351
0
                let v573 = constructor_vec_insert_lane(ctx, v569, v571, v572, v570);
16352
0
                let v574 = constructor_output_xmm(ctx, v573);
16353
0
                // Rule at src/isa/x64/lower.isle line 1264.
16354
0
                return Some(v574);
16355
0
            }
16356
        }
16357
        &InstructionData::Trap {
16358
109k
            opcode: ref v641,
16359
109k
            code: ref v642,
16360
109k
        } => {
16361
109k
            match v641 {
16362
                &Opcode::Trap => {
16363
109k
                    let v643 = &constructor_x64_ud2(ctx, v642);
16364
109k
                    let v644 = constructor_side_effect(ctx, v643);
16365
109k
                    // Rule at src/isa/x64/lower.isle line 1492.
16366
109k
                    return Some(v644);
16367
                }
16368
                &Opcode::ResumableTrap => {
16369
0
                    let v643 = &constructor_x64_ud2(ctx, v642);
16370
0
                    let v644 = constructor_side_effect(ctx, v643);
16371
0
                    // Rule at src/isa/x64/lower.isle line 1519.
16372
0
                    return Some(v644);
16373
                }
16374
0
                _ => {}
16375
            }
16376
        }
16377
        &InstructionData::Unary {
16378
514k
            opcode: ref v305,
16379
514k
            arg: v306,
16380
514k
        } => {
16381
514k
            match v305 {
16382
                &Opcode::Splat => {
16383
18.4E
                    let v1 = C::first_result(ctx, arg0);
16384
18.4E
                    if let Some(v2) = v1 {
16385
18.4E
                        let v3 = C::value_type(ctx, v2);
16386
18.4E
                        let v53 = C::multi_lane(ctx, v3);
16387
18.4E
                        if let Some(v54) = v53 {
16388
18.4E
                            match v54.0 {
16389
                                0x20 => {
16390
18.4E
                                    if v54.1 == 0x4 {
16391
18.4E
                                        let v2146 = &C::sinkable_load(ctx, v306);
16392
18.4E
                                        if let Some(v2147) = v2146 {
16393
18.4E
                                            let v2202 = C::use_avx_simd(ctx);
16394
18.4E
                                            if v2202 == true {
16395
0
                                                let v2203 = &constructor_sink_load_to_xmm_mem(ctx, v2147);
16396
0
                                                let v2204 = constructor_x64_vbroadcastss(ctx, v2203);
16397
0
                                                let v2205 = constructor_output_xmm(ctx, v2204);
16398
0
                                                // Rule at src/isa/x64/lower.isle line 4097.
16399
0
                                                return Some(v2205);
16400
0
                                            }
16401
0
                                            let v2150 = &C::sink_load(ctx, v2147);
16402
0
                                            let v2151 = constructor_x64_movss_load(ctx, v2150);
16403
0
                                            let v2199 = &C::xmm_to_xmm_mem(ctx, v2151);
16404
0
                                            let v2200 = constructor_x64_shufps(ctx, v2151, v2199, 0x0);
16405
0
                                            let v2201 = constructor_output_xmm(ctx, v2200);
16406
0
                                            // Rule at src/isa/x64/lower.isle line 4094.
16407
0
                                            return Some(v2201);
16408
0
                                        }
16409
0
                                    }
16410
                                }
16411
                                0x40 => {
16412
0
                                    if v54.1 == 0x2 {
16413
0
                                        let v2146 = &C::sinkable_load(ctx, v306);
16414
0
                                        if let Some(v2147) = v2146 {
16415
0
                                            let v2203 = &constructor_sink_load_to_xmm_mem(ctx, v2147);
16416
0
                                            let v2212 = constructor_x64_movddup(ctx, v2203);
16417
0
                                            let v2213 = constructor_output_xmm(ctx, v2212);
16418
0
                                            // Rule at src/isa/x64/lower.isle line 4108.
16419
0
                                            return Some(v2213);
16420
0
                                        }
16421
0
                                    }
16422
                                }
16423
0
                                _ => {}
16424
                            }
16425
0
                        }
16426
0
                        match v3 {
16427
                            I8X16 => {
16428
0
                                let v2166 = &C::sinkable_load_exact(ctx, v306);
16429
0
                                if let Some(v2167) = v2166 {
16430
0
                                    let v2162 = C::use_avx2_simd(ctx);
16431
0
                                    if v2162 == true {
16432
0
                                        let v2173 = &constructor_sink_load_to_xmm_mem(ctx, v2167);
16433
0
                                        let v2174 = constructor_x64_vpbroadcastb(ctx, v2173);
16434
0
                                        let v2175 = constructor_output_xmm(ctx, v2174);
16435
0
                                        // Rule at src/isa/x64/lower.isle line 4045.
16436
0
                                        return Some(v2175);
16437
0
                                    }
16438
0
                                    let v2168 = constructor_xmm_uninit_value(ctx);
16439
0
                                    let v2169 = &constructor_sink_load_to_gpr_mem(ctx, v2167);
16440
0
                                    let v2170 = constructor_x64_pinsrb(ctx, v2168, v2169, 0x0);
16441
0
                                    let v807 = constructor_xmm_zero(ctx, I8X16);
16442
0
                                    let v808 = &C::xmm_to_xmm_mem(ctx, v807);
16443
0
                                    let v2171 = constructor_x64_pshufb(ctx, v2170, v808);
16444
0
                                    let v2172 = constructor_output_xmm(ctx, v2171);
16445
0
                                    // Rule at src/isa/x64/lower.isle line 4043.
16446
0
                                    return Some(v2172);
16447
0
                                }
16448
0
                                let v2162 = C::use_avx2_simd(ctx);
16449
0
                                if v2162 == true {
16450
0
                                    let v307 = constructor_put_in_gpr(ctx, v306);
16451
0
                                    let v2157 = constructor_bitcast_gpr_to_xmm(ctx, I32, v307);
16452
0
                                    let v2163 = &C::xmm_to_xmm_mem(ctx, v2157);
16453
0
                                    let v2164 = constructor_x64_vpbroadcastb(ctx, v2163);
16454
0
                                    let v2165 = constructor_output_xmm(ctx, v2164);
16455
0
                                    // Rule at src/isa/x64/lower.isle line 4040.
16456
0
                                    return Some(v2165);
16457
0
                                }
16458
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16459
0
                                let v2157 = constructor_bitcast_gpr_to_xmm(ctx, I32, v307);
16460
0
                                let v2158 = constructor_xmm_zero(ctx, I8X16);
16461
0
                                let v2159 = &C::xmm_to_xmm_mem(ctx, v2158);
16462
0
                                let v2160 = constructor_x64_pshufb(ctx, v2157, v2159);
16463
0
                                let v2161 = constructor_output_xmm(ctx, v2160);
16464
0
                                // Rule at src/isa/x64/lower.isle line 4038.
16465
0
                                return Some(v2161);
16466
                            }
16467
                            I16X8 => {
16468
0
                                let v2166 = &C::sinkable_load_exact(ctx, v306);
16469
0
                                if let Some(v2167) = v2166 {
16470
0
                                    let v2162 = C::use_avx2_simd(ctx);
16471
0
                                    if v2162 == true {
16472
0
                                        let v2173 = &constructor_sink_load_to_xmm_mem(ctx, v2167);
16473
0
                                        let v2188 = constructor_x64_vpbroadcastw(ctx, v2173);
16474
0
                                        let v2189 = constructor_output_xmm(ctx, v2188);
16475
0
                                        // Rule at src/isa/x64/lower.isle line 4061.
16476
0
                                        return Some(v2189);
16477
0
                                    }
16478
0
                                    let v2168 = constructor_xmm_uninit_value(ctx);
16479
0
                                    let v2169 = &constructor_sink_load_to_gpr_mem(ctx, v2167);
16480
0
                                    let v2182 = constructor_x64_pinsrw(ctx, v2168, v2169, 0x0);
16481
0
                                    let v2183 = &C::xmm_to_xmm_mem(ctx, v2182);
16482
0
                                    let v2184 = constructor_x64_pshuflw(ctx, v2183, 0x0);
16483
0
                                    let v2185 = &C::xmm_to_xmm_mem(ctx, v2184);
16484
0
                                    let v2186 = constructor_x64_pshufd(ctx, v2185, 0x0);
16485
0
                                    let v2187 = constructor_output_xmm(ctx, v2186);
16486
0
                                    // Rule at src/isa/x64/lower.isle line 4059.
16487
0
                                    return Some(v2187);
16488
0
                                }
16489
0
                                let v2162 = C::use_avx2_simd(ctx);
16490
0
                                if v2162 == true {
16491
0
                                    let v307 = constructor_put_in_gpr(ctx, v306);
16492
0
                                    let v2157 = constructor_bitcast_gpr_to_xmm(ctx, I32, v307);
16493
0
                                    let v2163 = &C::xmm_to_xmm_mem(ctx, v2157);
16494
0
                                    let v2180 = constructor_x64_vpbroadcastw(ctx, v2163);
16495
0
                                    let v2181 = constructor_output_xmm(ctx, v2180);
16496
0
                                    // Rule at src/isa/x64/lower.isle line 4056.
16497
0
                                    return Some(v2181);
16498
0
                                }
16499
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16500
0
                                let v2157 = constructor_bitcast_gpr_to_xmm(ctx, I32, v307);
16501
0
                                let v2163 = &C::xmm_to_xmm_mem(ctx, v2157);
16502
0
                                let v2176 = constructor_x64_pshuflw(ctx, v2163, 0x0);
16503
0
                                let v2177 = &C::xmm_to_xmm_mem(ctx, v2176);
16504
0
                                let v2178 = constructor_x64_pshufd(ctx, v2177, 0x0);
16505
0
                                let v2179 = constructor_output_xmm(ctx, v2178);
16506
0
                                // Rule at src/isa/x64/lower.isle line 4054.
16507
0
                                return Some(v2179);
16508
                            }
16509
                            I32X4 => {
16510
0
                                let v2162 = C::use_avx2_simd(ctx);
16511
0
                                if v2162 == true {
16512
0
                                    let v307 = constructor_put_in_gpr(ctx, v306);
16513
0
                                    let v2157 = constructor_bitcast_gpr_to_xmm(ctx, I32, v307);
16514
0
                                    let v2163 = &C::xmm_to_xmm_mem(ctx, v2157);
16515
0
                                    let v2192 = constructor_x64_vpbroadcastd(ctx, v2163);
16516
0
                                    let v2193 = constructor_output_xmm(ctx, v2192);
16517
0
                                    // Rule at src/isa/x64/lower.isle line 4071.
16518
0
                                    return Some(v2193);
16519
0
                                }
16520
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16521
0
                                let v2157 = constructor_bitcast_gpr_to_xmm(ctx, I32, v307);
16522
0
                                let v2163 = &C::xmm_to_xmm_mem(ctx, v2157);
16523
0
                                let v2190 = constructor_x64_pshufd(ctx, v2163, 0x0);
16524
0
                                let v2191 = constructor_output_xmm(ctx, v2190);
16525
0
                                // Rule at src/isa/x64/lower.isle line 4069.
16526
0
                                return Some(v2191);
16527
                            }
16528
                            I64X2 => {
16529
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16530
0
                                let v2206 = constructor_bitcast_gpr_to_xmm(ctx, I64, v307);
16531
0
                                let v2207 = &C::xmm_to_xmm_mem(ctx, v2206);
16532
0
                                let v2208 = constructor_x64_movddup(ctx, v2207);
16533
0
                                let v2209 = constructor_output_xmm(ctx, v2208);
16534
0
                                // Rule at src/isa/x64/lower.isle line 4104.
16535
0
                                return Some(v2209);
16536
                            }
16537
                            F32X4 => {
16538
0
                                let v2162 = C::use_avx2_simd(ctx);
16539
0
                                if v2162 == true {
16540
0
                                    let v452 = &C::put_in_xmm_mem(ctx, v306);
16541
0
                                    let v2197 = constructor_x64_vbroadcastss(ctx, v452);
16542
0
                                    let v2198 = constructor_output_xmm(ctx, v2197);
16543
0
                                    // Rule at src/isa/x64/lower.isle line 4081.
16544
0
                                    return Some(v2198);
16545
0
                                }
16546
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
16547
0
                                let v2194 = constructor_put_in_xmm(ctx, v306);
16548
0
                                let v322 = &C::put_in_xmm_mem(ctx, v306);
16549
0
                                let v2195 = constructor_x64_shufps(ctx, v2194, v322, 0x0);
16550
0
                                let v2196 = constructor_output_xmm(ctx, v2195);
16551
0
                                // Rule at src/isa/x64/lower.isle line 4078.
16552
0
                                return Some(v2196);
16553
                            }
16554
                            F64X2 => {
16555
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
16556
0
                                let v2210 = constructor_x64_movddup(ctx, v452);
16557
0
                                let v2211 = constructor_output_xmm(ctx, v2210);
16558
0
                                // Rule at src/isa/x64/lower.isle line 4106.
16559
0
                                return Some(v2211);
16560
                            }
16561
0
                            _ => {}
16562
                        }
16563
0
                    }
16564
                }
16565
                &Opcode::SetPinnedReg => {
16566
0
                    let v307 = constructor_put_in_gpr(ctx, v306);
16567
0
                    let v1999 = &constructor_write_pinned_gpr(ctx, v307);
16568
0
                    let v2000 = constructor_side_effect(ctx, v1999);
16569
0
                    // Rule at src/isa/x64/lower.isle line 3797.
16570
0
                    return Some(v2000);
16571
                }
16572
                &Opcode::VanyTrue => {
16573
0
                    let v366 = C::use_sse41(ctx);
16574
0
                    if v366 == true {
16575
0
                        let v462 = constructor_put_in_xmm(ctx, v306);
16576
0
                        let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
16577
0
                        let v2214 = &constructor_x64_ptest(ctx, v1131, v462);
16578
0
                        let v2215 = &constructor_x64_setcc(ctx, &CC::NZ);
16579
0
                        let v2216 = constructor_with_flags(ctx, v2214, v2215);
16580
0
                        let v2217 = C::output(ctx, v2216);
16581
0
                        // Rule at src/isa/x64/lower.isle line 4113.
16582
0
                        return Some(v2217);
16583
0
                    }
16584
0
                    let v462 = constructor_put_in_xmm(ctx, v306);
16585
0
                    let v1837 = constructor_xmm_zero(ctx, I8X16);
16586
0
                    let v1838 = &C::xmm_to_xmm_mem(ctx, v1837);
16587
0
                    let v2218 = constructor_x64_pcmpeqb(ctx, v462, v1838);
16588
0
                    let v2220 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2218);
16589
0
                    let v2222 = RegMemImm::Imm {
16590
0
                        simm32: 0xFFFF,
16591
0
                    };
16592
0
                    let v2223 = &C::gpr_mem_imm_new(ctx, &v2222);
16593
0
                    let v2224 = &constructor_x64_cmp(ctx, &OperandSize::Size32, v2223, v2220);
16594
0
                    let v2225 = &constructor_x64_setcc(ctx, &CC::NZ);
16595
0
                    let v2226 = constructor_with_flags(ctx, v2224, v2225);
16596
0
                    let v2227 = C::output(ctx, v2226);
16597
0
                    // Rule at src/isa/x64/lower.isle line 4122.
16598
0
                    return Some(v2227);
16599
                }
16600
                &Opcode::VallTrue => {
16601
0
                    let v366 = C::use_sse41(ctx);
16602
0
                    if v366 == true {
16603
0
                        let v462 = constructor_put_in_xmm(ctx, v306);
16604
0
                        let v522 = C::value_type(ctx, v306);
16605
0
                        let v2228 = constructor_xmm_zero(ctx, v522);
16606
0
                        let v2229 = constructor_vec_int_type(ctx, v522);
16607
0
                        let v2230 = &C::xmm_to_xmm_mem(ctx, v2228);
16608
0
                        let v2231 = constructor_x64_pcmpeq(ctx, v2229, v462, v2230);
16609
0
                        let v2232 = &C::xmm_to_xmm_mem(ctx, v2231);
16610
0
                        let v2233 = &constructor_x64_ptest(ctx, v2232, v2231);
16611
0
                        let v2234 = &constructor_x64_setcc(ctx, &CC::Z);
16612
0
                        let v2235 = constructor_with_flags(ctx, v2233, v2234);
16613
0
                        let v2236 = C::output(ctx, v2235);
16614
0
                        // Rule at src/isa/x64/lower.isle line 4132.
16615
0
                        return Some(v2236);
16616
0
                    }
16617
0
                    let v522 = C::value_type(ctx, v306);
16618
0
                    let v2237 = constructor_vec_int_type(ctx, v522);
16619
0
                    let v2194 = constructor_put_in_xmm(ctx, v306);
16620
0
                    let v2238 = constructor_xmm_zero(ctx, v522);
16621
0
                    let v2239 = &C::xmm_to_xmm_mem(ctx, v2238);
16622
0
                    let v2240 = constructor_x64_pcmpeq(ctx, v2237, v2194, v2239);
16623
0
                    let v2241 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2240);
16624
0
                    let v2242 = &C::gpr_to_gpr_mem_imm(ctx, v2241);
16625
0
                    let v2243 = &constructor_x64_test(ctx, &OperandSize::Size32, v2242, v2241);
16626
0
                    let v2244 = &constructor_x64_setcc(ctx, &CC::Z);
16627
0
                    let v2245 = constructor_with_flags(ctx, v2243, v2244);
16628
0
                    let v2246 = C::output(ctx, v2245);
16629
0
                    // Rule at src/isa/x64/lower.isle line 4142.
16630
0
                    return Some(v2246);
16631
                }
16632
                &Opcode::VhighBits => {
16633
0
                    let v522 = C::value_type(ctx, v306);
16634
0
                    let v2247 = C::multi_lane(ctx, v522);
16635
0
                    if let Some(v2248) = v2247 {
16636
0
                        match v2248.0 {
16637
                            0x8 => {
16638
0
                                if v2248.1 == 0x10 {
16639
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
16640
0
                                    let v2251 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v462);
16641
0
                                    let v2252 = constructor_output_gpr(ctx, v2251);
16642
0
                                    // Rule at src/isa/x64/lower.isle line 4159.
16643
0
                                    return Some(v2252);
16644
0
                                }
16645
                            }
16646
                            0x10 => {
16647
0
                                if v2248.1 == 0x8 {
16648
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
16649
0
                                    let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
16650
0
                                    let v2257 = constructor_x64_packsswb(ctx, v462, v1131);
16651
0
                                    let v2258 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2257);
16652
0
                                    let v1024 = Imm8Reg::Imm8 {
16653
0
                                        imm: 0x8,
16654
0
                                    };
16655
0
                                    let v1949 = &C::imm8_reg_to_imm8_gpr(ctx, &v1024);
16656
0
                                    let v2259 = constructor_x64_shr(ctx, I64, v2258, v1949);
16657
0
                                    let v2260 = constructor_output_gpr(ctx, v2259);
16658
0
                                    // Rule at src/isa/x64/lower.isle line 4174.
16659
0
                                    return Some(v2260);
16660
0
                                }
16661
                            }
16662
                            0x20 => {
16663
0
                                if v2248.1 == 0x4 {
16664
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
16665
0
                                    let v2253 = constructor_x64_movmskps(ctx, &OperandSize::Size32, v462);
16666
0
                                    let v2254 = constructor_output_gpr(ctx, v2253);
16667
0
                                    // Rule at src/isa/x64/lower.isle line 4162.
16668
0
                                    return Some(v2254);
16669
0
                                }
16670
                            }
16671
                            0x40 => {
16672
0
                                if v2248.1 == 0x2 {
16673
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
16674
0
                                    let v2255 = constructor_x64_movmskpd(ctx, &OperandSize::Size32, v462);
16675
0
                                    let v2256 = constructor_output_gpr(ctx, v2255);
16676
0
                                    // Rule at src/isa/x64/lower.isle line 4165.
16677
0
                                    return Some(v2256);
16678
0
                                }
16679
                            }
16680
0
                            _ => {}
16681
                        }
16682
0
                    }
16683
                }
16684
                &Opcode::Ineg => {
16685
1.25k
                    let v1 = C::first_result(ctx, arg0);
16686
1.25k
                    if let Some(v2) = v1 {
16687
1.25k
                        let v3 = C::value_type(ctx, v2);
16688
1.25k
                        match v3 {
16689
                            I8X16 => {
16690
0
                                let v320 = constructor_imm(ctx, I8X16, 0x0);
16691
0
                                let v321 = C::xmm_new(ctx, v320);
16692
0
                                let v322 = &C::put_in_xmm_mem(ctx, v306);
16693
0
                                let v323 = constructor_x64_psubb(ctx, v321, v322);
16694
0
                                let v324 = constructor_output_xmm(ctx, v323);
16695
0
                                // Rule at src/isa/x64/lower.isle line 821.
16696
0
                                return Some(v324);
16697
                            }
16698
                            I16X8 => {
16699
0
                                let v326 = constructor_imm(ctx, I16X8, 0x0);
16700
0
                                let v327 = C::xmm_new(ctx, v326);
16701
0
                                let v322 = &C::put_in_xmm_mem(ctx, v306);
16702
0
                                let v328 = constructor_x64_psubw(ctx, v327, v322);
16703
0
                                let v329 = constructor_output_xmm(ctx, v328);
16704
0
                                // Rule at src/isa/x64/lower.isle line 824.
16705
0
                                return Some(v329);
16706
                            }
16707
                            I32X4 => {
16708
0
                                let v331 = constructor_imm(ctx, I32X4, 0x0);
16709
0
                                let v332 = C::xmm_new(ctx, v331);
16710
0
                                let v322 = &C::put_in_xmm_mem(ctx, v306);
16711
0
                                let v333 = constructor_x64_psubd(ctx, v332, v322);
16712
0
                                let v334 = constructor_output_xmm(ctx, v333);
16713
0
                                // Rule at src/isa/x64/lower.isle line 827.
16714
0
                                return Some(v334);
16715
                            }
16716
                            I64X2 => {
16717
0
                                let v336 = constructor_imm(ctx, I64X2, 0x0);
16718
0
                                let v337 = C::xmm_new(ctx, v336);
16719
0
                                let v322 = &C::put_in_xmm_mem(ctx, v306);
16720
0
                                let v338 = constructor_x64_psubq(ctx, v337, v322);
16721
0
                                let v339 = constructor_output_xmm(ctx, v338);
16722
0
                                // Rule at src/isa/x64/lower.isle line 830.
16723
0
                                return Some(v339);
16724
                            }
16725
1.25k
                            _ => {}
16726
1.25k
                        }
16727
1.25k
                        let v4 = C::fits_in_64(ctx, v3);
16728
1.25k
                        if let Some(v5) = v4 {
16729
1.25k
                            let v307 = constructor_put_in_gpr(ctx, v306);
16730
1.25k
                            let v308 = constructor_x64_neg(ctx, v5, v307);
16731
1.25k
                            let v309 = constructor_output_gpr(ctx, v308);
16732
1.25k
                            // Rule at src/isa/x64/lower.isle line 807.
16733
1.25k
                            return Some(v309);
16734
0
                        }
16735
0
                        if v3 == I128 {
16736
0
                            let v310 = C::put_in_regs(ctx, v306);
16737
0
                            let v311 = constructor_value_regs_get_gpr(ctx, v310, 0x0);
16738
0
                            let v312 = constructor_value_regs_get_gpr(ctx, v310, 0x1);
16739
0
                            let v313 = &constructor_x64_neg_paired(ctx, I64, v311);
16740
0
                            let v314 = constructor_imm(ctx, I64, 0x0);
16741
0
                            let v315 = C::gpr_new(ctx, v314);
16742
0
                            let v316 = &C::gpr_to_gpr_mem_imm(ctx, v312);
16743
0
                            let v317 = &constructor_x64_sbb_paired(ctx, I64, v315, v316);
16744
0
                            let v318 = constructor_with_flags(ctx, v313, v317);
16745
0
                            let v319 = C::output(ctx, v318);
16746
0
                            // Rule at src/isa/x64/lower.isle line 810.
16747
0
                            return Some(v319);
16748
0
                        }
16749
0
                    }
16750
                }
16751
                &Opcode::Iabs => {
16752
0
                    let v1 = C::first_result(ctx, arg0);
16753
0
                    if let Some(v2) = v1 {
16754
0
                        let v3 = C::value_type(ctx, v2);
16755
0
                        match v3 {
16756
                            I8X16 => {
16757
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
16758
0
                                let v453 = constructor_x64_pabsb(ctx, v452);
16759
0
                                let v454 = constructor_output_xmm(ctx, v453);
16760
0
                                // Rule at src/isa/x64/lower.isle line 1065.
16761
0
                                return Some(v454);
16762
                            }
16763
                            I16X8 => {
16764
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
16765
0
                                let v455 = constructor_x64_pabsw(ctx, v452);
16766
0
                                let v456 = constructor_output_xmm(ctx, v455);
16767
0
                                // Rule at src/isa/x64/lower.isle line 1068.
16768
0
                                return Some(v456);
16769
                            }
16770
                            I32X4 => {
16771
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
16772
0
                                let v457 = constructor_x64_pabsd(ctx, v452);
16773
0
                                let v458 = constructor_output_xmm(ctx, v457);
16774
0
                                // Rule at src/isa/x64/lower.isle line 1071.
16775
0
                                return Some(v458);
16776
                            }
16777
                            I64X2 => {
16778
0
                                let v386 = C::avx512vl_enabled(ctx, v3);
16779
0
                                if v386 == true {
16780
0
                                    let v459 = C::avx512f_enabled(ctx, v3);
16781
0
                                    if v459 == true {
16782
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
16783
0
                                        let v460 = constructor_x64_vpabsq(ctx, v452);
16784
0
                                        let v461 = constructor_output_xmm(ctx, v460);
16785
0
                                        // Rule at src/isa/x64/lower.isle line 1075.
16786
0
                                        return Some(v461);
16787
0
                                    }
16788
0
                                }
16789
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
16790
0
                                let v463 = constructor_imm(ctx, I64X2, 0x0);
16791
0
                                let v464 = C::xmm_new(ctx, v463);
16792
0
                                let v465 = &C::xmm_to_xmm_mem(ctx, v462);
16793
0
                                let v466 = constructor_x64_psubq(ctx, v464, v465);
16794
0
                                let v467 = &C::xmm_to_xmm_mem(ctx, v462);
16795
0
                                let v468 = constructor_x64_blendvpd(ctx, v466, v467, v466);
16796
0
                                let v469 = constructor_output_xmm(ctx, v468);
16797
0
                                // Rule at src/isa/x64/lower.isle line 1085.
16798
0
                                return Some(v469);
16799
                            }
16800
0
                            _ => {}
16801
0
                        }
16802
0
                        let v4 = C::fits_in_64(ctx, v3);
16803
0
                        if let Some(v5) = v4 {
16804
0
                            let v307 = constructor_put_in_gpr(ctx, v306);
16805
0
                            let v470 = &constructor_x64_neg_paired(ctx, v5, v307);
16806
0
                            let v471 = constructor_produces_flags_get_reg(ctx, v470);
16807
0
                            let v472 = C::gpr_new(ctx, v471);
16808
0
                            let v474 = &C::gpr_to_gpr_mem(ctx, v307);
16809
0
                            let v475 = &constructor_cmove(ctx, v5, &CC::S, v474, v472);
16810
0
                            let v476 = &constructor_produces_flags_ignore(ctx, v470);
16811
0
                            let v477 = constructor_with_flags_reg(ctx, v476, v475);
16812
0
                            let v478 = constructor_output_reg(ctx, v477);
16813
0
                            // Rule at src/isa/x64/lower.isle line 1092.
16814
0
                            return Some(v478);
16815
0
                        }
16816
0
                    }
16817
                }
16818
                &Opcode::Bnot => {
16819
705
                    let v1 = C::first_result(ctx, arg0);
16820
705
                    if let Some(v2) = v1 {
16821
705
                        let v3 = C::value_type(ctx, v2);
16822
705
                        if v3 == I128 {
16823
0
                            let v527 = constructor_i128_not(ctx, v306);
16824
0
                            let v528 = C::output(ctx, v527);
16825
0
                            // Rule at src/isa/x64/lower.isle line 1201.
16826
0
                            return Some(v528);
16827
705
                        }
16828
705
                        let v53 = C::multi_lane(ctx, v3);
16829
705
                        if let Some(
v540
) = v53 {
16830
0
                            let v462 = constructor_put_in_xmm(ctx, v306);
16831
0
                            let v489 = constructor_vector_all_ones(ctx);
16832
0
                            let v529 = &C::xmm_to_xmm_mem(ctx, v489);
16833
0
                            let v532 = constructor_x64_xor_vector(ctx, v3, v462, v529);
16834
0
                            let v533 = constructor_output_xmm(ctx, v532);
16835
0
                            // Rule at src/isa/x64/lower.isle line 1211.
16836
0
                            return Some(v533);
16837
705
                        }
16838
705
                        let v141 = C::ty_int_ref_scalar_64(ctx, v3);
16839
705
                        if let Some(v142) = v141 {
16840
705
                            let v307 = constructor_put_in_gpr(ctx, v306);
16841
705
                            let v525 = constructor_x64_not(ctx, v3, v307);
16842
705
                            let v526 = constructor_output_gpr(ctx, v525);
16843
705
                            // Rule at src/isa/x64/lower.isle line 1186.
16844
705
                            return Some(v526);
16845
0
                        }
16846
0
                        let v149 = C::ty_scalar_float(ctx, v3);
16847
0
                        if let Some(v150) = v149 {
16848
0
                            let v462 = constructor_put_in_xmm(ctx, v306);
16849
0
                            let v489 = constructor_vector_all_ones(ctx);
16850
0
                            let v529 = &C::xmm_to_xmm_mem(ctx, v489);
16851
0
                            let v530 = constructor_x64_xor_vector(ctx, v150, v462, v529);
16852
0
                            let v531 = constructor_output_xmm(ctx, v530);
16853
0
                            // Rule at src/isa/x64/lower.isle line 1206.
16854
0
                            return Some(v531);
16855
0
                        }
16856
0
                    }
16857
                }
16858
                &Opcode::Bitrev => {
16859
0
                    let v1 = C::first_result(ctx, arg0);
16860
0
                    if let Some(v2) = v1 {
16861
0
                        let v3 = C::value_type(ctx, v2);
16862
0
                        match v3 {
16863
                            I8 => {
16864
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16865
0
                                let v1007 = constructor_do_bitrev8(ctx, I32, v307);
16866
0
                                let v1008 = constructor_output_gpr(ctx, v1007);
16867
0
                                // Rule at src/isa/x64/lower.isle line 2053.
16868
0
                                return Some(v1008);
16869
                            }
16870
                            I16 => {
16871
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16872
0
                                let v1009 = constructor_do_bitrev16(ctx, I32, v307);
16873
0
                                let v1010 = constructor_output_gpr(ctx, v1009);
16874
0
                                // Rule at src/isa/x64/lower.isle line 2056.
16875
0
                                return Some(v1010);
16876
                            }
16877
                            I32 => {
16878
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16879
0
                                let v1011 = constructor_do_bitrev32(ctx, I32, v307);
16880
0
                                let v1012 = constructor_output_gpr(ctx, v1011);
16881
0
                                // Rule at src/isa/x64/lower.isle line 2059.
16882
0
                                return Some(v1012);
16883
                            }
16884
                            I64 => {
16885
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
16886
0
                                let v1013 = constructor_do_bitrev64(ctx, I64, v307);
16887
0
                                let v1014 = constructor_output_gpr(ctx, v1013);
16888
0
                                // Rule at src/isa/x64/lower.isle line 2062.
16889
0
                                return Some(v1014);
16890
                            }
16891
                            I128 => {
16892
0
                                let v310 = C::put_in_regs(ctx, v306);
16893
0
                                let v924 = constructor_value_regs_get_gpr(ctx, v310, 0x1);
16894
0
                                let v1015 = constructor_do_bitrev64(ctx, I64, v924);
16895
0
                                let v1016 = C::gpr_to_reg(ctx, v1015);
16896
0
                                let v1017 = C::put_in_regs(ctx, v306);
16897
0
                                let v1018 = constructor_value_regs_get_gpr(ctx, v1017, 0x0);
16898
0
                                let v1019 = constructor_do_bitrev64(ctx, I64, v1018);
16899
0
                                let v1020 = C::gpr_to_reg(ctx, v1019);
16900
0
                                let v1021 = C::value_regs(ctx, v1016, v1020);
16901
0
                                let v1022 = C::output(ctx, v1021);
16902
0
                                // Rule at src/isa/x64/lower.isle line 2065.
16903
0
                                return Some(v1022);
16904
                            }
16905
0
                            _ => {}
16906
                        }
16907
0
                    }
16908
                }
16909
                &Opcode::Clz => {
16910
139
                    let v1 = C::first_result(ctx, arg0);
16911
139
                    if let Some(v2) = v1 {
16912
139
                        let v3 = C::value_type(ctx, v2);
16913
139
                        let v912 = C::ty_32_or_64(ctx, v3);
16914
139
                        if let Some(v913) = v912 {
16915
139
                            let v914 = C::use_lzcnt(ctx, v3);
16916
139
                            match v914 {
16917
                                true => {
16918
139
                                    let v307 = constructor_put_in_gpr(ctx, v306);
16919
139
                                    let v915 = constructor_x64_lzcnt(ctx, v913, v307);
16920
139
                                    let v916 = constructor_output_gpr(ctx, v915);
16921
139
                                    // Rule at src/isa/x64/lower.isle line 1814.
16922
139
                                    return Some(v916);
16923
                                }
16924
                                false => {
16925
0
                                    let v307 = constructor_put_in_gpr(ctx, v306);
16926
0
                                    let v917 = constructor_do_clz(ctx, v913, v913, v307);
16927
0
                                    let v918 = constructor_output_gpr(ctx, v917);
16928
0
                                    // Rule at src/isa/x64/lower.isle line 1821.
16929
0
                                    return Some(v918);
16930
                                }
16931
                                _ => {}
16932
                            }
16933
0
                        }
16934
0
                        let v919 = C::ty_8_or_16(ctx, v3);
16935
0
                        if let Some(v920) = v919 {
16936
0
                            let v921 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Zero);
16937
0
                            let v922 = constructor_do_clz(ctx, I32, v920, v921);
16938
0
                            let v923 = constructor_output_gpr(ctx, v922);
16939
0
                            // Rule at src/isa/x64/lower.isle line 1828.
16940
0
                            return Some(v923);
16941
0
                        }
16942
0
                        if v3 == I128 {
16943
0
                            let v310 = C::put_in_regs(ctx, v306);
16944
0
                            let v924 = constructor_value_regs_get_gpr(ctx, v310, 0x1);
16945
0
                            let v925 = constructor_do_clz(ctx, I64, I64, v924);
16946
0
                            let v926 = C::put_in_regs(ctx, v306);
16947
0
                            let v927 = constructor_value_regs_get_gpr(ctx, v926, 0x0);
16948
0
                            let v928 = constructor_do_clz(ctx, I64, I64, v927);
16949
0
                            let v930 = RegMemImm::Imm {
16950
0
                                simm32: 0x40,
16951
0
                            };
16952
0
                            let v931 = &C::gpr_mem_imm_new(ctx, &v930);
16953
0
                            let v932 = constructor_x64_add(ctx, I64, v928, v931);
16954
0
                            let v934 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v925);
16955
0
                            let v935 = &C::gpr_to_gpr_mem(ctx, v925);
16956
0
                            let v936 = &constructor_cmove(ctx, I64, &CC::NZ, v935, v932);
16957
0
                            let v937 = constructor_with_flags_reg(ctx, v934, v936);
16958
0
                            let v938 = C::gpr_new(ctx, v937);
16959
0
                            let v939 = C::gpr_to_reg(ctx, v938);
16960
0
                            let v940 = constructor_imm(ctx, I64, 0x0);
16961
0
                            let v941 = C::value_regs(ctx, v939, v940);
16962
0
                            let v942 = C::output(ctx, v941);
16963
0
                            // Rule at src/isa/x64/lower.isle line 1833.
16964
0
                            return Some(v942);
16965
0
                        }
16966
0
                    }
16967
                }
16968
                &Opcode::Ctz => {
16969
123
                    let v1 = C::first_result(ctx, arg0);
16970
123
                    if let Some(v2) = v1 {
16971
123
                        let v3 = C::value_type(ctx, v2);
16972
123
                        let v176 = C::use_bmi1(ctx, v3);
16973
123
                        match v176 {
16974
                            true => {
16975
123
                                let v912 = C::ty_32_or_64(ctx, v3);
16976
123
                                if let Some(v913) = v912 {
16977
123
                                    let v307 = constructor_put_in_gpr(ctx, v306);
16978
123
                                    let v943 = constructor_x64_tzcnt(ctx, v913, v307);
16979
123
                                    let v944 = constructor_output_gpr(ctx, v943);
16980
123
                                    // Rule at src/isa/x64/lower.isle line 1858.
16981
123
                                    return Some(v944);
16982
0
                                }
16983
                            }
16984
                            false => {
16985
0
                                let v912 = C::ty_32_or_64(ctx, v3);
16986
0
                                if let Some(v913) = v912 {
16987
0
                                    let v307 = constructor_put_in_gpr(ctx, v306);
16988
0
                                    let v945 = constructor_do_ctz(ctx, v913, v913, v307);
16989
0
                                    let v946 = constructor_output_gpr(ctx, v945);
16990
0
                                    // Rule at src/isa/x64/lower.isle line 1865.
16991
0
                                    return Some(v946);
16992
0
                                }
16993
                            }
16994
                            _ => {}
16995
                        }
16996
0
                        let v919 = C::ty_8_or_16(ctx, v3);
16997
0
                        if let Some(v920) = v919 {
16998
0
                            let v921 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Zero);
16999
0
                            let v947 = constructor_do_ctz(ctx, I32, v920, v921);
17000
0
                            let v948 = constructor_output_gpr(ctx, v947);
17001
0
                            // Rule at src/isa/x64/lower.isle line 1872.
17002
0
                            return Some(v948);
17003
0
                        }
17004
0
                        if v3 == I128 {
17005
0
                            let v310 = C::put_in_regs(ctx, v306);
17006
0
                            let v311 = constructor_value_regs_get_gpr(ctx, v310, 0x0);
17007
0
                            let v949 = constructor_do_ctz(ctx, I64, I64, v311);
17008
0
                            let v926 = C::put_in_regs(ctx, v306);
17009
0
                            let v950 = constructor_value_regs_get_gpr(ctx, v926, 0x1);
17010
0
                            let v951 = constructor_do_ctz(ctx, I64, I64, v950);
17011
0
                            let v930 = RegMemImm::Imm {
17012
0
                                simm32: 0x40,
17013
0
                            };
17014
0
                            let v931 = &C::gpr_mem_imm_new(ctx, &v930);
17015
0
                            let v952 = constructor_x64_add(ctx, I64, v951, v931);
17016
0
                            let v953 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v949);
17017
0
                            let v954 = &C::gpr_to_gpr_mem(ctx, v952);
17018
0
                            let v955 = &constructor_cmove(ctx, I64, &CC::Z, v954, v949);
17019
0
                            let v956 = constructor_with_flags_reg(ctx, v953, v955);
17020
0
                            let v957 = C::gpr_new(ctx, v956);
17021
0
                            let v958 = C::gpr_to_reg(ctx, v957);
17022
0
                            let v940 = constructor_imm(ctx, I64, 0x0);
17023
0
                            let v959 = C::value_regs(ctx, v958, v940);
17024
0
                            let v960 = C::output(ctx, v959);
17025
0
                            // Rule at src/isa/x64/lower.isle line 1877.
17026
0
                            return Some(v960);
17027
0
                        }
17028
0
                    }
17029
                }
17030
                &Opcode::Bswap => {
17031
0
                    let v1 = C::first_result(ctx, arg0);
17032
0
                    if let Some(v2) = v1 {
17033
0
                        let v3 = C::value_type(ctx, v2);
17034
0
                        match v3 {
17035
                            I16 => {
17036
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
17037
0
                                let v1024 = Imm8Reg::Imm8 {
17038
0
                                    imm: 0x8,
17039
0
                                };
17040
0
                                let v1025 = &C::imm8_reg_to_imm8_gpr(ctx, &v1024);
17041
0
                                let v1026 = constructor_x64_rotl(ctx, I16, v307, v1025);
17042
0
                                let v1027 = constructor_output_gpr(ctx, v1026);
17043
0
                                // Rule at src/isa/x64/lower.isle line 2132.
17044
0
                                return Some(v1027);
17045
                            }
17046
                            I32 => {
17047
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
17048
0
                                let v1028 = constructor_x64_bswap(ctx, I32, v307);
17049
0
                                let v1029 = constructor_output_gpr(ctx, v1028);
17050
0
                                // Rule at src/isa/x64/lower.isle line 2135.
17051
0
                                return Some(v1029);
17052
                            }
17053
                            I64 => {
17054
0
                                let v307 = constructor_put_in_gpr(ctx, v306);
17055
0
                                let v1030 = constructor_x64_bswap(ctx, I64, v307);
17056
0
                                let v1031 = constructor_output_gpr(ctx, v1030);
17057
0
                                // Rule at src/isa/x64/lower.isle line 2138.
17058
0
                                return Some(v1031);
17059
                            }
17060
                            I128 => {
17061
0
                                let v310 = C::put_in_regs(ctx, v306);
17062
0
                                let v924 = constructor_value_regs_get_gpr(ctx, v310, 0x1);
17063
0
                                let v1032 = constructor_x64_bswap(ctx, I64, v924);
17064
0
                                let v1033 = C::gpr_to_reg(ctx, v1032);
17065
0
                                let v1017 = C::put_in_regs(ctx, v306);
17066
0
                                let v1018 = constructor_value_regs_get_gpr(ctx, v1017, 0x0);
17067
0
                                let v1034 = constructor_x64_bswap(ctx, I64, v1018);
17068
0
                                let v1035 = C::gpr_to_reg(ctx, v1034);
17069
0
                                let v1036 = C::value_regs(ctx, v1033, v1035);
17070
0
                                let v1037 = C::output(ctx, v1036);
17071
0
                                // Rule at src/isa/x64/lower.isle line 2141.
17072
0
                                return Some(v1037);
17073
                            }
17074
0
                            _ => {}
17075
                        }
17076
0
                    }
17077
                }
17078
                &Opcode::Popcnt => {
17079
89
                    let v1 = C::first_result(ctx, arg0);
17080
89
                    if let Some(v2) = v1 {
17081
89
                        let v3 = C::value_type(ctx, v2);
17082
89
                        let v961 = C::use_popcnt(ctx, v3);
17083
89
                        if v961 == true {
17084
89
                            let v912 = C::ty_32_or_64(ctx, v3);
17085
89
                            if let Some(v913) = v912 {
17086
89
                                let v307 = constructor_put_in_gpr(ctx, v306);
17087
89
                                let v962 = constructor_x64_popcnt(ctx, v913, v307);
17088
89
                                let v963 = constructor_output_gpr(ctx, v962);
17089
89
                                // Rule at src/isa/x64/lower.isle line 1896.
17090
89
                                return Some(v963);
17091
0
                            }
17092
0
                            let v919 = C::ty_8_or_16(ctx, v3);
17093
0
                            if let Some(v920) = v919 {
17094
0
                                let v921 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Zero);
17095
0
                                let v964 = constructor_x64_popcnt(ctx, I32, v921);
17096
0
                                let v965 = constructor_output_gpr(ctx, v964);
17097
0
                                // Rule at src/isa/x64/lower.isle line 1903.
17098
0
                                return Some(v965);
17099
0
                            }
17100
0
                            if v3 == I128 {
17101
0
                                let v310 = C::put_in_regs(ctx, v306);
17102
0
                                let v311 = constructor_value_regs_get_gpr(ctx, v310, 0x0);
17103
0
                                let v966 = constructor_x64_popcnt(ctx, I64, v311);
17104
0
                                let v926 = C::put_in_regs(ctx, v306);
17105
0
                                let v950 = constructor_value_regs_get_gpr(ctx, v926, 0x1);
17106
0
                                let v967 = constructor_x64_popcnt(ctx, I64, v950);
17107
0
                                let v968 = &C::gpr_to_gpr_mem_imm(ctx, v967);
17108
0
                                let v969 = constructor_x64_add(ctx, I64, v966, v968);
17109
0
                                let v970 = C::gpr_to_reg(ctx, v969);
17110
0
                                let v971 = constructor_imm(ctx, I64, 0x0);
17111
0
                                let v972 = C::value_regs(ctx, v970, v971);
17112
0
                                let v973 = C::output(ctx, v972);
17113
0
                                // Rule at src/isa/x64/lower.isle line 1910.
17114
0
                                return Some(v973);
17115
0
                            }
17116
0
                        }
17117
0
                        match v3 {
17118
                            I128 => {
17119
0
                                let v310 = C::put_in_regs(ctx, v306);
17120
0
                                let v311 = constructor_value_regs_get_gpr(ctx, v310, 0x0);
17121
0
                                let v978 = constructor_do_popcnt(ctx, I64, v311);
17122
0
                                let v926 = C::put_in_regs(ctx, v306);
17123
0
                                let v950 = constructor_value_regs_get_gpr(ctx, v926, 0x1);
17124
0
                                let v979 = constructor_do_popcnt(ctx, I64, v950);
17125
0
                                let v980 = &C::gpr_to_gpr_mem_imm(ctx, v979);
17126
0
                                let v981 = constructor_x64_add(ctx, I64, v978, v980);
17127
0
                                let v982 = C::gpr_to_reg(ctx, v981);
17128
0
                                let v971 = constructor_imm(ctx, I64, 0x0);
17129
0
                                let v983 = C::value_regs(ctx, v982, v971);
17130
0
                                let v984 = C::output(ctx, v983);
17131
0
                                // Rule at src/isa/x64/lower.isle line 1929.
17132
0
                                return Some(v984);
17133
                            }
17134
                            I8X16 => {
17135
0
                                let v386 = C::avx512vl_enabled(ctx, v3);
17136
0
                                if v386 == true {
17137
0
                                    let v985 = C::avx512bitalg_enabled(ctx, v3);
17138
0
                                    if v985 == true {
17139
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17140
0
                                        let v986 = constructor_x64_vpopcntb(ctx, v452);
17141
0
                                        let v987 = constructor_output_xmm(ctx, v986);
17142
0
                                        // Rule at src/isa/x64/lower.isle line 2002.
17143
0
                                        return Some(v987);
17144
0
                                    }
17145
0
                                }
17146
0
                                let v988 = C::popcount_4bit_table(ctx);
17147
0
                                let v989 = C::popcount_low_mask(ctx);
17148
0
                                let v990 = &constructor_const_to_xmm_mem(ctx, v989);
17149
0
                                let v991 = constructor_put_in_xmm(ctx, v306);
17150
0
                                let v992 = constructor_sse_and(ctx, I8X16, v991, v990);
17151
0
                                let v993 = constructor_put_in_xmm(ctx, v306);
17152
0
                                let v995 = &C::xmi_imm(ctx, 0x4);
17153
0
                                let v996 = constructor_x64_psrlw(ctx, v993, v995);
17154
0
                                let v997 = constructor_sse_and(ctx, I8X16, v996, v990);
17155
0
                                let v998 = C::popcount_4bit_table(ctx);
17156
0
                                let v999 = constructor_x64_xmm_load_const(ctx, I8X16, v998);
17157
0
                                let v1000 = &C::xmm_to_xmm_mem(ctx, v992);
17158
0
                                let v1001 = constructor_x64_pshufb(ctx, v999, v1000);
17159
0
                                let v1002 = &C::xmm_to_xmm_mem(ctx, v997);
17160
0
                                let v1003 = constructor_x64_pshufb(ctx, v999, v1002);
17161
0
                                let v1004 = &C::xmm_to_xmm_mem(ctx, v1003);
17162
0
                                let v1005 = constructor_x64_paddb(ctx, v1001, v1004);
17163
0
                                let v1006 = constructor_output_xmm(ctx, v1005);
17164
0
                                // Rule at src/isa/x64/lower.isle line 2036.
17165
0
                                return Some(v1006);
17166
                            }
17167
0
                            _ => {}
17168
0
                        }
17169
0
                        let v912 = C::ty_32_or_64(ctx, v3);
17170
0
                        if let Some(v913) = v912 {
17171
0
                            let v307 = constructor_put_in_gpr(ctx, v306);
17172
0
                            let v974 = constructor_do_popcnt(ctx, v913, v307);
17173
0
                            let v975 = constructor_output_gpr(ctx, v974);
17174
0
                            // Rule at src/isa/x64/lower.isle line 1919.
17175
0
                            return Some(v975);
17176
0
                        }
17177
0
                        let v919 = C::ty_8_or_16(ctx, v3);
17178
0
                        if let Some(v920) = v919 {
17179
0
                            let v921 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Zero);
17180
0
                            let v976 = constructor_do_popcnt(ctx, I32, v921);
17181
0
                            let v977 = constructor_output_gpr(ctx, v976);
17182
0
                            // Rule at src/isa/x64/lower.isle line 1924.
17183
0
                            return Some(v977);
17184
0
                        }
17185
0
                    }
17186
                }
17187
                &Opcode::Sqrt => {
17188
0
                    let v1 = C::first_result(ctx, arg0);
17189
0
                    if let Some(v2) = v1 {
17190
0
                        let v3 = C::value_type(ctx, v2);
17191
0
                        match v3 {
17192
                            F32 => {
17193
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
17194
0
                                let v1121 = constructor_x64_sqrtss(ctx, v452);
17195
0
                                let v1122 = constructor_output_xmm(ctx, v1121);
17196
0
                                // Rule at src/isa/x64/lower.isle line 2287.
17197
0
                                return Some(v1122);
17198
                            }
17199
                            F64 => {
17200
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
17201
0
                                let v1123 = constructor_x64_sqrtsd(ctx, v452);
17202
0
                                let v1124 = constructor_output_xmm(ctx, v1123);
17203
0
                                // Rule at src/isa/x64/lower.isle line 2289.
17204
0
                                return Some(v1124);
17205
                            }
17206
                            F32X4 => {
17207
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
17208
0
                                let v1125 = constructor_x64_sqrtps(ctx, v452);
17209
0
                                let v1126 = constructor_output_xmm(ctx, v1125);
17210
0
                                // Rule at src/isa/x64/lower.isle line 2291.
17211
0
                                return Some(v1126);
17212
                            }
17213
                            F64X2 => {
17214
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
17215
0
                                let v1127 = constructor_x64_sqrtpd(ctx, v452);
17216
0
                                let v1128 = constructor_output_xmm(ctx, v1127);
17217
0
                                // Rule at src/isa/x64/lower.isle line 2293.
17218
0
                                return Some(v1128);
17219
                            }
17220
0
                            _ => {}
17221
                        }
17222
0
                    }
17223
                }
17224
                &Opcode::Fneg => {
17225
0
                    let v1 = C::first_result(ctx, arg0);
17226
0
                    if let Some(v2) = v1 {
17227
0
                        let v3 = C::value_type(ctx, v2);
17228
0
                        match v3 {
17229
                            F32 => {
17230
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17231
0
                                let v501 = constructor_imm(ctx, F32, 0x80000000);
17232
0
                                let v502 = &constructor_reg_to_xmm_mem(ctx, v501);
17233
0
                                let v503 = constructor_x64_xorps(ctx, v462, v502);
17234
0
                                let v504 = constructor_output_xmm(ctx, v503);
17235
0
                                // Rule at src/isa/x64/lower.isle line 1124.
17236
0
                                return Some(v504);
17237
                            }
17238
                            F64 => {
17239
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17240
0
                                let v506 = constructor_imm(ctx, F64, 0x8000000000000000);
17241
0
                                let v507 = &constructor_reg_to_xmm_mem(ctx, v506);
17242
0
                                let v508 = constructor_x64_xorpd(ctx, v462, v507);
17243
0
                                let v509 = constructor_output_xmm(ctx, v508);
17244
0
                                // Rule at src/isa/x64/lower.isle line 1127.
17245
0
                                return Some(v509);
17246
                            }
17247
                            F32X4 => {
17248
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17249
0
                                let v489 = constructor_vector_all_ones(ctx);
17250
0
                                let v511 = &C::xmi_imm(ctx, 0x1F);
17251
0
                                let v512 = constructor_x64_pslld(ctx, v489, v511);
17252
0
                                let v513 = &C::xmm_to_xmm_mem(ctx, v512);
17253
0
                                let v514 = constructor_x64_xorps(ctx, v462, v513);
17254
0
                                let v515 = constructor_output_xmm(ctx, v514);
17255
0
                                // Rule at src/isa/x64/lower.isle line 1130.
17256
0
                                return Some(v515);
17257
                            }
17258
                            F64X2 => {
17259
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17260
0
                                let v489 = constructor_vector_all_ones(ctx);
17261
0
                                let v517 = &C::xmi_imm(ctx, 0x3F);
17262
0
                                let v518 = constructor_x64_psllq(ctx, v489, v517);
17263
0
                                let v519 = &C::xmm_to_xmm_mem(ctx, v518);
17264
0
                                let v520 = constructor_x64_xorpd(ctx, v462, v519);
17265
0
                                let v521 = constructor_output_xmm(ctx, v520);
17266
0
                                // Rule at src/isa/x64/lower.isle line 1134.
17267
0
                                return Some(v521);
17268
                            }
17269
0
                            _ => {}
17270
                        }
17271
0
                    }
17272
                }
17273
                &Opcode::Fabs => {
17274
0
                    let v1 = C::first_result(ctx, arg0);
17275
0
                    if let Some(v2) = v1 {
17276
0
                        let v3 = C::value_type(ctx, v2);
17277
0
                        match v3 {
17278
                            F32 => {
17279
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17280
0
                                let v480 = constructor_imm(ctx, F32, 0x7FFFFFFF);
17281
0
                                let v481 = &constructor_reg_to_xmm_mem(ctx, v480);
17282
0
                                let v482 = constructor_x64_andps(ctx, v462, v481);
17283
0
                                let v483 = constructor_output_xmm(ctx, v482);
17284
0
                                // Rule at src/isa/x64/lower.isle line 1106.
17285
0
                                return Some(v483);
17286
                            }
17287
                            F64 => {
17288
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17289
0
                                let v485 = constructor_imm(ctx, F64, 0x7FFFFFFFFFFFFFFF);
17290
0
                                let v486 = &constructor_reg_to_xmm_mem(ctx, v485);
17291
0
                                let v487 = constructor_x64_andpd(ctx, v462, v486);
17292
0
                                let v488 = constructor_output_xmm(ctx, v487);
17293
0
                                // Rule at src/isa/x64/lower.isle line 1109.
17294
0
                                return Some(v488);
17295
                            }
17296
                            F32X4 => {
17297
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17298
0
                                let v489 = constructor_vector_all_ones(ctx);
17299
0
                                let v491 = &C::xmi_imm(ctx, 0x1);
17300
0
                                let v492 = constructor_x64_psrld(ctx, v489, v491);
17301
0
                                let v493 = &C::xmm_to_xmm_mem(ctx, v492);
17302
0
                                let v494 = constructor_x64_andps(ctx, v462, v493);
17303
0
                                let v495 = constructor_output_xmm(ctx, v494);
17304
0
                                // Rule at src/isa/x64/lower.isle line 1113.
17305
0
                                return Some(v495);
17306
                            }
17307
                            F64X2 => {
17308
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17309
0
                                let v489 = constructor_vector_all_ones(ctx);
17310
0
                                let v491 = &C::xmi_imm(ctx, 0x1);
17311
0
                                let v496 = constructor_x64_psrlq(ctx, v489, v491);
17312
0
                                let v497 = &C::xmm_to_xmm_mem(ctx, v496);
17313
0
                                let v498 = constructor_x64_andpd(ctx, v462, v497);
17314
0
                                let v499 = constructor_output_xmm(ctx, v498);
17315
0
                                // Rule at src/isa/x64/lower.isle line 1118.
17316
0
                                return Some(v499);
17317
                            }
17318
0
                            _ => {}
17319
                        }
17320
0
                    }
17321
                }
17322
                &Opcode::Ceil => {
17323
0
                    let v522 = C::value_type(ctx, v306);
17324
0
                    let v1905 = constructor_x64_round(ctx, v522, v306, &RoundImm::RoundUp);
17325
0
                    let v1906 = constructor_output_xmm(ctx, v1905);
17326
0
                    // Rule at src/isa/x64/lower.isle line 3603.
17327
0
                    return Some(v1906);
17328
                }
17329
                &Opcode::Floor => {
17330
0
                    let v522 = C::value_type(ctx, v306);
17331
0
                    let v1908 = constructor_x64_round(ctx, v522, v306, &RoundImm::RoundDown);
17332
0
                    let v1909 = constructor_output_xmm(ctx, v1908);
17333
0
                    // Rule at src/isa/x64/lower.isle line 3608.
17334
0
                    return Some(v1909);
17335
                }
17336
                &Opcode::Trunc => {
17337
0
                    let v522 = C::value_type(ctx, v306);
17338
0
                    let v1914 = constructor_x64_round(ctx, v522, v306, &RoundImm::RoundZero);
17339
0
                    let v1915 = constructor_output_xmm(ctx, v1914);
17340
0
                    // Rule at src/isa/x64/lower.isle line 3618.
17341
0
                    return Some(v1915);
17342
                }
17343
                &Opcode::Nearest => {
17344
0
                    let v522 = C::value_type(ctx, v306);
17345
0
                    let v1911 = constructor_x64_round(ctx, v522, v306, &RoundImm::RoundNearest);
17346
0
                    let v1912 = constructor_output_xmm(ctx, v1911);
17347
0
                    // Rule at src/isa/x64/lower.isle line 3613.
17348
0
                    return Some(v1912);
17349
                }
17350
                &Opcode::IsNull => {
17351
0
                    let v522 = C::value_type(ctx, v306);
17352
0
                    if v522 == R64 {
17353
0
                        let v307 = constructor_put_in_gpr(ctx, v306);
17354
0
                        let v1039 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x0, v307);
17355
0
                        let v1040 = &constructor_x64_setcc(ctx, &CC::Z);
17356
0
                        let v1041 = constructor_with_flags(ctx, v1039, v1040);
17357
0
                        let v1042 = C::output(ctx, v1041);
17358
0
                        // Rule at src/isa/x64/lower.isle line 2149.
17359
0
                        return Some(v1042);
17360
0
                    }
17361
                }
17362
                &Opcode::IsInvalid => {
17363
0
                    let v522 = C::value_type(ctx, v306);
17364
0
                    if v522 == R64 {
17365
0
                        let v307 = constructor_put_in_gpr(ctx, v306);
17366
0
                        let v1044 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0xFFFFFFFF, v307);
17367
0
                        let v1040 = &constructor_x64_setcc(ctx, &CC::Z);
17368
0
                        let v1045 = constructor_with_flags(ctx, v1044, v1040);
17369
0
                        let v1046 = C::output(ctx, v1045);
17370
0
                        // Rule at src/isa/x64/lower.isle line 2157.
17371
0
                        return Some(v1046);
17372
0
                    }
17373
                }
17374
                &Opcode::ScalarToVector => {
17375
0
                    let v2146 = &C::sinkable_load(ctx, v306);
17376
0
                    if let Some(v2147) = v2146 {
17377
0
                        let v522 = C::value_type(ctx, v306);
17378
0
                        let v2153 = C::ty_64(ctx, v522);
17379
0
                        if let Some(v2154) = v2153 {
17380
0
                            let v2150 = &C::sink_load(ctx, v2147);
17381
0
                            let v2155 = constructor_x64_movsd_load(ctx, v2150);
17382
0
                            let v2156 = constructor_output_xmm(ctx, v2155);
17383
0
                            // Rule at src/isa/x64/lower.isle line 4022.
17384
0
                            return Some(v2156);
17385
0
                        }
17386
0
                        let v2148 = C::ty_32(ctx, v522);
17387
0
                        if let Some(v2149) = v2148 {
17388
0
                            let v2150 = &C::sink_load(ctx, v2147);
17389
0
                            let v2151 = constructor_x64_movss_load(ctx, v2150);
17390
0
                            let v2152 = constructor_output_xmm(ctx, v2151);
17391
0
                            // Rule at src/isa/x64/lower.isle line 4020.
17392
0
                            return Some(v2152);
17393
0
                        }
17394
0
                    }
17395
0
                    let v522 = C::value_type(ctx, v306);
17396
0
                    let v1684 = C::ty_scalar_float(ctx, v522);
17397
0
                    if let Some(v1685) = v1684 {
17398
0
                        let v1065 = constructor_output_value(ctx, v306);
17399
0
                        // Rule at src/isa/x64/lower.isle line 4010.
17400
0
                        return Some(v1065);
17401
0
                    }
17402
0
                    let v307 = constructor_put_in_gpr(ctx, v306);
17403
0
                    let v2144 = constructor_bitcast_gpr_to_xmm(ctx, v522, v307);
17404
0
                    let v2145 = constructor_output_xmm(ctx, v2144);
17405
0
                    // Rule at src/isa/x64/lower.isle line 4015.
17406
0
                    return Some(v2145);
17407
                }
17408
                &Opcode::Bmask => {
17409
0
                    let v1 = C::first_result(ctx, arg0);
17410
0
                    if let Some(v2) = v1 {
17411
0
                        let v310 = C::put_in_regs(ctx, v306);
17412
0
                        let v3 = C::value_type(ctx, v2);
17413
0
                        let v522 = C::value_type(ctx, v306);
17414
0
                        let v523 = constructor_lower_bmask(ctx, v3, v522, v310);
17415
0
                        let v524 = C::output(ctx, v523);
17416
0
                        // Rule at src/isa/x64/lower.isle line 1179.
17417
0
                        return Some(v524);
17418
0
                    }
17419
                }
17420
                &Opcode::Ireduce => {
17421
9.57k
                    let v1 = C::first_result(ctx, arg0);
17422
9.57k
                    if let Some(v2) = v1 {
17423
9.57k
                        let v3 = C::value_type(ctx, v2);
17424
9.57k
                        let v4 = C::fits_in_64(ctx, v3);
17425
9.57k
                        if let Some(v5) = v4 {
17426
9.57k
                            let v310 = C::put_in_regs(ctx, v306);
17427
9.57k
                            let v311 = constructor_value_regs_get_gpr(ctx, v310, 0x0);
17428
9.57k
                            let v1066 = constructor_output_gpr(ctx, v311);
17429
9.57k
                            // Rule at src/isa/x64/lower.isle line 2207.
17430
9.57k
                            return Some(v1066);
17431
0
                        }
17432
0
                        let v522 = C::value_type(ctx, v306);
17433
0
                        if v3 == v522 {
17434
0
                            let v1065 = constructor_output_value(ctx, v306);
17435
0
                            // Rule at src/isa/x64/lower.isle line 2201.
17436
0
                            return Some(v1065);
17437
0
                        }
17438
0
                    }
17439
                }
17440
                &Opcode::SwidenLow => {
17441
0
                    let v1 = C::first_result(ctx, arg0);
17442
0
                    if let Some(v2) = v1 {
17443
0
                        let v3 = C::value_type(ctx, v2);
17444
0
                        match v3 {
17445
                            I16X8 => {
17446
0
                                let v366 = C::use_sse41(ctx);
17447
0
                                if v366 == true {
17448
0
                                    let v522 = C::value_type(ctx, v306);
17449
0
                                    if v522 == I8X16 {
17450
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17451
0
                                        let v1796 = constructor_x64_pmovsxbw(ctx, v452);
17452
0
                                        let v1797 = constructor_output_xmm(ctx, v1796);
17453
0
                                        // Rule at src/isa/x64/lower.isle line 3366.
17454
0
                                        return Some(v1797);
17455
0
                                    }
17456
0
                                }
17457
                            }
17458
                            I32X4 => {
17459
0
                                let v366 = C::use_sse41(ctx);
17460
0
                                if v366 == true {
17461
0
                                    let v522 = C::value_type(ctx, v306);
17462
0
                                    if v522 == I16X8 {
17463
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17464
0
                                        let v1798 = constructor_x64_pmovsxwd(ctx, v452);
17465
0
                                        let v1799 = constructor_output_xmm(ctx, v1798);
17466
0
                                        // Rule at src/isa/x64/lower.isle line 3369.
17467
0
                                        return Some(v1799);
17468
0
                                    }
17469
0
                                }
17470
                            }
17471
                            I64X2 => {
17472
0
                                let v366 = C::use_sse41(ctx);
17473
0
                                if v366 == true {
17474
0
                                    let v522 = C::value_type(ctx, v306);
17475
0
                                    if v522 == I32X4 {
17476
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17477
0
                                        let v1800 = constructor_x64_pmovsxdq(ctx, v452);
17478
0
                                        let v1801 = constructor_output_xmm(ctx, v1800);
17479
0
                                        // Rule at src/isa/x64/lower.isle line 3372.
17480
0
                                        return Some(v1801);
17481
0
                                    }
17482
0
                                }
17483
                            }
17484
0
                            _ => {}
17485
                        }
17486
0
                        let v462 = constructor_put_in_xmm(ctx, v306);
17487
0
                        let v1802 = constructor_lower_swiden_low(ctx, v3, v462);
17488
0
                        let v1803 = constructor_output_xmm(ctx, v1802);
17489
0
                        // Rule at src/isa/x64/lower.isle line 3376.
17490
0
                        return Some(v1803);
17491
0
                    }
17492
                }
17493
                &Opcode::SwidenHigh => {
17494
0
                    let v1 = C::first_result(ctx, arg0);
17495
0
                    if let Some(v2) = v1 {
17496
0
                        let v3 = C::value_type(ctx, v2);
17497
0
                        match v3 {
17498
                            I16X8 => {
17499
0
                                let v522 = C::value_type(ctx, v306);
17500
0
                                if v522 == I8X16 {
17501
0
                                    let v366 = C::use_sse41(ctx);
17502
0
                                    if v366 == true {
17503
0
                                        let v462 = constructor_put_in_xmm(ctx, v306);
17504
0
                                        let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
17505
0
                                        let v1804 = constructor_x64_palignr(ctx, v462, v1131, 0x8);
17506
0
                                        let v1805 = &C::xmm_to_xmm_mem(ctx, v1804);
17507
0
                                        let v1806 = constructor_x64_pmovsxbw(ctx, v1805);
17508
0
                                        let v1807 = constructor_output_xmm(ctx, v1806);
17509
0
                                        // Rule at src/isa/x64/lower.isle line 3399.
17510
0
                                        return Some(v1807);
17511
0
                                    }
17512
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
17513
0
                                    let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
17514
0
                                    let v1814 = constructor_x64_punpckhbw(ctx, v462, v1131);
17515
0
                                    let v1815 = &C::xmi_imm(ctx, 0x8);
17516
0
                                    let v1816 = constructor_x64_psraw(ctx, v1814, v1815);
17517
0
                                    let v1817 = constructor_output_xmm(ctx, v1816);
17518
0
                                    // Rule at src/isa/x64/lower.isle line 3413.
17519
0
                                    return Some(v1817);
17520
0
                                }
17521
                            }
17522
                            I32X4 => {
17523
0
                                let v522 = C::value_type(ctx, v306);
17524
0
                                if v522 == I16X8 {
17525
0
                                    let v366 = C::use_sse41(ctx);
17526
0
                                    if v366 == true {
17527
0
                                        let v462 = constructor_put_in_xmm(ctx, v306);
17528
0
                                        let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
17529
0
                                        let v1804 = constructor_x64_palignr(ctx, v462, v1131, 0x8);
17530
0
                                        let v1805 = &C::xmm_to_xmm_mem(ctx, v1804);
17531
0
                                        let v1808 = constructor_x64_pmovsxwd(ctx, v1805);
17532
0
                                        let v1809 = constructor_output_xmm(ctx, v1808);
17533
0
                                        // Rule at src/isa/x64/lower.isle line 3403.
17534
0
                                        return Some(v1809);
17535
0
                                    }
17536
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
17537
0
                                    let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
17538
0
                                    let v1818 = constructor_x64_punpckhwd(ctx, v462, v1131);
17539
0
                                    let v1669 = &C::xmi_imm(ctx, 0x10);
17540
0
                                    let v1819 = constructor_x64_psrad(ctx, v1818, v1669);
17541
0
                                    let v1820 = constructor_output_xmm(ctx, v1819);
17542
0
                                    // Rule at src/isa/x64/lower.isle line 3416.
17543
0
                                    return Some(v1820);
17544
0
                                }
17545
                            }
17546
                            I64X2 => {
17547
0
                                let v522 = C::value_type(ctx, v306);
17548
0
                                if v522 == I32X4 {
17549
0
                                    let v366 = C::use_sse41(ctx);
17550
0
                                    if v366 == true {
17551
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17552
0
                                        let v1810 = constructor_x64_pshufd(ctx, v452, 0xEE);
17553
0
                                        let v1811 = &C::xmm_to_xmm_mem(ctx, v1810);
17554
0
                                        let v1812 = constructor_x64_pmovsxdq(ctx, v1811);
17555
0
                                        let v1813 = constructor_output_xmm(ctx, v1812);
17556
0
                                        // Rule at src/isa/x64/lower.isle line 3407.
17557
0
                                        return Some(v1813);
17558
0
                                    }
17559
0
                                    let v452 = &C::put_in_xmm_mem(ctx, v306);
17560
0
                                    let v1822 = constructor_x64_pshufd(ctx, v452, 0xE);
17561
0
                                    let v1823 = constructor_xmm_zero(ctx, I32X4);
17562
0
                                    let v1824 = &C::xmm_to_xmm_mem(ctx, v1822);
17563
0
                                    let v1825 = constructor_x64_pcmpgtd(ctx, v1823, v1824);
17564
0
                                    let v1826 = &C::xmm_to_xmm_mem(ctx, v1825);
17565
0
                                    let v1827 = constructor_x64_punpckldq(ctx, v1822, v1826);
17566
0
                                    let v1828 = constructor_output_xmm(ctx, v1827);
17567
0
                                    // Rule at src/isa/x64/lower.isle line 3421.
17568
0
                                    return Some(v1828);
17569
0
                                }
17570
                            }
17571
0
                            _ => {}
17572
                        }
17573
0
                    }
17574
                }
17575
                &Opcode::UwidenLow => {
17576
0
                    let v1 = C::first_result(ctx, arg0);
17577
0
                    if let Some(v2) = v1 {
17578
0
                        let v3 = C::value_type(ctx, v2);
17579
0
                        match v3 {
17580
                            I16X8 => {
17581
0
                                let v366 = C::use_sse41(ctx);
17582
0
                                if v366 == true {
17583
0
                                    let v522 = C::value_type(ctx, v306);
17584
0
                                    if v522 == I8X16 {
17585
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17586
0
                                        let v1829 = constructor_x64_pmovzxbw(ctx, v452);
17587
0
                                        let v1830 = constructor_output_xmm(ctx, v1829);
17588
0
                                        // Rule at src/isa/x64/lower.isle line 3429.
17589
0
                                        return Some(v1830);
17590
0
                                    }
17591
0
                                }
17592
                            }
17593
                            I32X4 => {
17594
0
                                let v366 = C::use_sse41(ctx);
17595
0
                                if v366 == true {
17596
0
                                    let v522 = C::value_type(ctx, v306);
17597
0
                                    if v522 == I16X8 {
17598
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17599
0
                                        let v1831 = constructor_x64_pmovzxwd(ctx, v452);
17600
0
                                        let v1832 = constructor_output_xmm(ctx, v1831);
17601
0
                                        // Rule at src/isa/x64/lower.isle line 3432.
17602
0
                                        return Some(v1832);
17603
0
                                    }
17604
0
                                }
17605
                            }
17606
                            I64X2 => {
17607
0
                                let v366 = C::use_sse41(ctx);
17608
0
                                if v366 == true {
17609
0
                                    let v522 = C::value_type(ctx, v306);
17610
0
                                    if v522 == I32X4 {
17611
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17612
0
                                        let v1833 = constructor_x64_pmovzxdq(ctx, v452);
17613
0
                                        let v1834 = constructor_output_xmm(ctx, v1833);
17614
0
                                        // Rule at src/isa/x64/lower.isle line 3435.
17615
0
                                        return Some(v1834);
17616
0
                                    }
17617
0
                                }
17618
                            }
17619
0
                            _ => {}
17620
                        }
17621
0
                        let v462 = constructor_put_in_xmm(ctx, v306);
17622
0
                        let v1835 = constructor_lower_uwiden_low(ctx, v3, v462);
17623
0
                        let v1836 = constructor_output_xmm(ctx, v1835);
17624
0
                        // Rule at src/isa/x64/lower.isle line 3439.
17625
0
                        return Some(v1836);
17626
0
                    }
17627
                }
17628
                &Opcode::UwidenHigh => {
17629
0
                    let v1 = C::first_result(ctx, arg0);
17630
0
                    if let Some(v2) = v1 {
17631
0
                        let v3 = C::value_type(ctx, v2);
17632
0
                        match v3 {
17633
                            I16X8 => {
17634
0
                                let v522 = C::value_type(ctx, v306);
17635
0
                                if v522 == I8X16 {
17636
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
17637
0
                                    let v1837 = constructor_xmm_zero(ctx, I8X16);
17638
0
                                    let v1838 = &C::xmm_to_xmm_mem(ctx, v1837);
17639
0
                                    let v1839 = constructor_x64_punpckhbw(ctx, v462, v1838);
17640
0
                                    let v1840 = constructor_output_xmm(ctx, v1839);
17641
0
                                    // Rule at src/isa/x64/lower.isle line 3454.
17642
0
                                    return Some(v1840);
17643
0
                                }
17644
                            }
17645
                            I32X4 => {
17646
0
                                let v522 = C::value_type(ctx, v306);
17647
0
                                if v522 == I16X8 {
17648
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
17649
0
                                    let v1837 = constructor_xmm_zero(ctx, I8X16);
17650
0
                                    let v1838 = &C::xmm_to_xmm_mem(ctx, v1837);
17651
0
                                    let v1841 = constructor_x64_punpckhwd(ctx, v462, v1838);
17652
0
                                    let v1842 = constructor_output_xmm(ctx, v1841);
17653
0
                                    // Rule at src/isa/x64/lower.isle line 3456.
17654
0
                                    return Some(v1842);
17655
0
                                }
17656
                            }
17657
                            I64X2 => {
17658
0
                                let v522 = C::value_type(ctx, v306);
17659
0
                                if v522 == I32X4 {
17660
0
                                    let v462 = constructor_put_in_xmm(ctx, v306);
17661
0
                                    let v1708 = constructor_xmm_zero(ctx, F32X4);
17662
0
                                    let v1709 = &C::xmm_to_xmm_mem(ctx, v1708);
17663
0
                                    let v1843 = constructor_x64_unpckhps(ctx, v462, v1709);
17664
0
                                    let v1844 = constructor_output_xmm(ctx, v1843);
17665
0
                                    // Rule at src/isa/x64/lower.isle line 3458.
17666
0
                                    return Some(v1844);
17667
0
                                }
17668
                            }
17669
0
                            _ => {}
17670
                        }
17671
0
                    }
17672
                }
17673
                &Opcode::Uextend => {
17674
502k
                    let v1 = C::first_result(ctx, arg0);
17675
502k
                    if let Some(v2) = v1 {
17676
502k
                        let v3 = C::value_type(ctx, v2);
17677
502k
                        match v3 {
17678
                            I64 => {
17679
494k
                                let v1047 = constructor_extend_to_gpr(ctx, v306, I64, &ExtendKind::Zero);
17680
494k
                                let v1052 = constructor_output_gpr(ctx, v1047);
17681
494k
                                // Rule at src/isa/x64/lower.isle line 2170.
17682
494k
                                return Some(v1052);
17683
                            }
17684
                            I128 => {
17685
0
                                let v1047 = constructor_extend_to_gpr(ctx, v306, I64, &ExtendKind::Zero);
17686
0
                                let v1048 = C::gpr_to_reg(ctx, v1047);
17687
0
                                let v1049 = constructor_imm(ctx, I64, 0x0);
17688
0
                                let v1050 = C::value_regs(ctx, v1048, v1049);
17689
0
                                let v1051 = C::output(ctx, v1050);
17690
0
                                // Rule at src/isa/x64/lower.isle line 2166.
17691
0
                                return Some(v1051);
17692
                            }
17693
8.19k
                            _ => {}
17694
8.19k
                        }
17695
8.19k
                        let v1053 = C::fits_in_32(ctx, v3);
17696
8.19k
                        if let Some(
v10548.19k
) = v1053 {
17697
8.19k
                            let v921 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Zero);
17698
8.19k
                            let v1055 = constructor_output_gpr(ctx, v921);
17699
8.19k
                            // Rule at src/isa/x64/lower.isle line 2175.
17700
8.19k
                            return Some(v1055);
17701
0
                        }
17702
0
                    }
17703
                }
17704
                &Opcode::Sextend => {
17705
29
                    let v1 = C::first_result(ctx, arg0);
17706
29
                    if let Some(v2) = v1 {
17707
29
                        let v3 = C::value_type(ctx, v2);
17708
29
                        match v3 {
17709
                            I64 => {
17710
6
                                let v1056 = constructor_extend_to_gpr(ctx, v306, I64, &ExtendKind::Sign);
17711
6
                                let v1062 = constructor_output_gpr(ctx, v1056);
17712
6
                                // Rule at src/isa/x64/lower.isle line 2190.
17713
6
                                return Some(v1062);
17714
                            }
17715
                            I128 => {
17716
0
                                let v1056 = constructor_extend_to_gpr(ctx, v306, I64, &ExtendKind::Sign);
17717
0
                                let v696 = Imm8Reg::Imm8 {
17718
0
                                    imm: 0x3F,
17719
0
                                };
17720
0
                                let v697 = &C::imm8_reg_to_imm8_gpr(ctx, &v696);
17721
0
                                let v1057 = constructor_x64_sar(ctx, I64, v1056, v697);
17722
0
                                let v1058 = C::gpr_to_reg(ctx, v1056);
17723
0
                                let v1059 = C::gpr_to_reg(ctx, v1057);
17724
0
                                let v1060 = C::value_regs(ctx, v1058, v1059);
17725
0
                                let v1061 = C::output(ctx, v1060);
17726
0
                                // Rule at src/isa/x64/lower.isle line 2184.
17727
0
                                return Some(v1061);
17728
                            }
17729
23
                            _ => {}
17730
23
                        }
17731
23
                        let v1053 = C::fits_in_32(ctx, v3);
17732
23
                        if let Some(v1054) = v1053 {
17733
23
                            let v1063 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Sign);
17734
23
                            let v1064 = constructor_output_gpr(ctx, v1063);
17735
23
                            // Rule at src/isa/x64/lower.isle line 2195.
17736
23
                            return Some(v1064);
17737
0
                        }
17738
0
                    }
17739
                }
17740
                &Opcode::Fpromote => {
17741
0
                    let v1 = C::first_result(ctx, arg0);
17742
0
                    if let Some(v2) = v1 {
17743
0
                        let v3 = C::value_type(ctx, v2);
17744
0
                        if v3 == F64 {
17745
0
                            let v452 = &C::put_in_xmm_mem(ctx, v306);
17746
0
                            let v1129 = constructor_x64_cvtss2sd(ctx, v452);
17747
0
                            let v1130 = constructor_output_xmm(ctx, v1129);
17748
0
                            // Rule at src/isa/x64/lower.isle line 2297.
17749
0
                            return Some(v1130);
17750
0
                        }
17751
0
                    }
17752
                }
17753
                &Opcode::Fdemote => {
17754
0
                    let v1 = C::first_result(ctx, arg0);
17755
0
                    if let Some(v2) = v1 {
17756
0
                        let v3 = C::value_type(ctx, v2);
17757
0
                        if v3 == F32 {
17758
0
                            let v452 = &C::put_in_xmm_mem(ctx, v306);
17759
0
                            let v1134 = constructor_x64_cvtsd2ss(ctx, v452);
17760
0
                            let v1135 = constructor_output_xmm(ctx, v1134);
17761
0
                            // Rule at src/isa/x64/lower.isle line 2305.
17762
0
                            return Some(v1135);
17763
0
                        }
17764
0
                    }
17765
                }
17766
                &Opcode::Fvdemote => {
17767
0
                    let v1 = C::first_result(ctx, arg0);
17768
0
                    if let Some(v2) = v1 {
17769
0
                        let v3 = C::value_type(ctx, v2);
17770
0
                        if v3 == F32X4 {
17771
0
                            let v452 = &C::put_in_xmm_mem(ctx, v306);
17772
0
                            let v1136 = constructor_x64_cvtpd2ps(ctx, v452);
17773
0
                            let v1137 = constructor_output_xmm(ctx, v1136);
17774
0
                            // Rule at src/isa/x64/lower.isle line 2309.
17775
0
                            return Some(v1137);
17776
0
                        }
17777
0
                    }
17778
                }
17779
                &Opcode::FvpromoteLow => {
17780
0
                    let v1 = C::first_result(ctx, arg0);
17781
0
                    if let Some(v2) = v1 {
17782
0
                        let v3 = C::value_type(ctx, v2);
17783
0
                        if v3 == F64X2 {
17784
0
                            let v462 = constructor_put_in_xmm(ctx, v306);
17785
0
                            let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
17786
0
                            let v1132 = constructor_x64_cvtps2pd(ctx, v1131);
17787
0
                            let v1133 = constructor_output_xmm(ctx, v1132);
17788
0
                            // Rule at src/isa/x64/lower.isle line 2301.
17789
0
                            return Some(v1133);
17790
0
                        }
17791
0
                    }
17792
                }
17793
                &Opcode::FcvtToUint => {
17794
0
                    let v1 = C::first_result(ctx, arg0);
17795
0
                    if let Some(v2) = v1 {
17796
0
                        let v522 = C::value_type(ctx, v306);
17797
0
                        let v1684 = C::ty_scalar_float(ctx, v522);
17798
0
                        if let Some(v1685) = v1684 {
17799
0
                            let v3 = C::value_type(ctx, v2);
17800
0
                            let v1686 = constructor_cvt_float_to_uint_seq(ctx, v3, v306, false);
17801
0
                            let v1687 = constructor_output_gpr(ctx, v1686);
17802
0
                            // Rule at src/isa/x64/lower.isle line 3176.
17803
0
                            return Some(v1687);
17804
0
                        }
17805
0
                    }
17806
                }
17807
                &Opcode::FcvtToSint => {
17808
0
                    let v1 = C::first_result(ctx, arg0);
17809
0
                    if let Some(v2) = v1 {
17810
0
                        let v522 = C::value_type(ctx, v306);
17811
0
                        let v1684 = C::ty_scalar_float(ctx, v522);
17812
0
                        if let Some(v1685) = v1684 {
17813
0
                            let v3 = C::value_type(ctx, v2);
17814
0
                            let v1690 = constructor_cvt_float_to_sint_seq(ctx, v3, v306, false);
17815
0
                            let v1691 = constructor_output_gpr(ctx, v1690);
17816
0
                            // Rule at src/isa/x64/lower.isle line 3182.
17817
0
                            return Some(v1691);
17818
0
                        }
17819
0
                    }
17820
                }
17821
                &Opcode::FcvtToUintSat => {
17822
0
                    let v1 = C::first_result(ctx, arg0);
17823
0
                    if let Some(v2) = v1 {
17824
0
                        let v3 = C::value_type(ctx, v2);
17825
0
                        if v3 == I32X4 {
17826
0
                            let v522 = C::value_type(ctx, v306);
17827
0
                            if v522 == F32X4 {
17828
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17829
0
                                let v1708 = constructor_xmm_zero(ctx, F32X4);
17830
0
                                let v1709 = &C::xmm_to_xmm_mem(ctx, v1708);
17831
0
                                let v1710 = constructor_x64_maxps(ctx, v462, v1709);
17832
0
                                let v1711 = &C::xmm_to_xmm_mem(ctx, v1708);
17833
0
                                let v1712 = constructor_x64_pcmpeqd(ctx, v1708, v1711);
17834
0
                                let v1713 = &C::xmi_imm(ctx, 0x1);
17835
0
                                let v1714 = constructor_x64_psrld(ctx, v1712, v1713);
17836
0
                                let v1715 = &C::xmm_to_xmm_mem(ctx, v1714);
17837
0
                                let v1716 = constructor_x64_cvtdq2ps(ctx, v1715);
17838
0
                                let v1717 = &C::xmm_to_xmm_mem(ctx, v1710);
17839
0
                                let v1718 = constructor_x64_cvttps2dq(ctx, v1717);
17840
0
                                let v1719 = &C::xmm_to_xmm_mem(ctx, v1716);
17841
0
                                let v1720 = constructor_x64_subps(ctx, v1710, v1719);
17842
0
                                let v1721 = &C::xmm_to_xmm_mem(ctx, v1720);
17843
0
                                let v1722 = constructor_x64_cmpps(ctx, v1716, v1721, &FcmpImm::LessThanOrEqual);
17844
0
                                let v1723 = &C::xmm_to_xmm_mem(ctx, v1720);
17845
0
                                let v1724 = constructor_x64_cvttps2dq(ctx, v1723);
17846
0
                                let v1725 = &C::xmm_to_xmm_mem(ctx, v1722);
17847
0
                                let v1726 = constructor_x64_pxor(ctx, v1724, v1725);
17848
0
                                let v1727 = constructor_xmm_zero(ctx, I32X4);
17849
0
                                let v1728 = &C::xmm_to_xmm_mem(ctx, v1727);
17850
0
                                let v1729 = constructor_x64_pmaxsd(ctx, v1726, v1728);
17851
0
                                let v1730 = &C::xmm_to_xmm_mem(ctx, v1718);
17852
0
                                let v1731 = constructor_x64_paddd(ctx, v1729, v1730);
17853
0
                                let v1732 = constructor_output_xmm(ctx, v1731);
17854
0
                                // Rule at src/isa/x64/lower.isle line 3260.
17855
0
                                return Some(v1732);
17856
0
                            }
17857
0
                        }
17858
0
                        let v522 = C::value_type(ctx, v306);
17859
0
                        let v1684 = C::ty_scalar_float(ctx, v522);
17860
0
                        if let Some(v1685) = v1684 {
17861
0
                            let v1688 = constructor_cvt_float_to_uint_seq(ctx, v3, v306, true);
17862
0
                            let v1689 = constructor_output_gpr(ctx, v1688);
17863
0
                            // Rule at src/isa/x64/lower.isle line 3179.
17864
0
                            return Some(v1689);
17865
0
                        }
17866
0
                    }
17867
                }
17868
                &Opcode::FcvtToSintSat => {
17869
0
                    let v1 = C::first_result(ctx, arg0);
17870
0
                    if let Some(v2) = v1 {
17871
0
                        let v3 = C::value_type(ctx, v2);
17872
0
                        if v3 == I32X4 {
17873
0
                            let v522 = C::value_type(ctx, v306);
17874
0
                            if v522 == F32X4 {
17875
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17876
0
                                let v1131 = &C::xmm_to_xmm_mem(ctx, v462);
17877
0
                                let v1694 = constructor_x64_cmpps(ctx, v462, v1131, &FcmpImm::Equal);
17878
0
                                let v1695 = &C::xmm_to_xmm_mem(ctx, v1694);
17879
0
                                let v1696 = constructor_x64_andps(ctx, v462, v1695);
17880
0
                                let v1697 = &C::xmm_to_xmm_mem(ctx, v1696);
17881
0
                                let v1698 = constructor_x64_pxor(ctx, v1694, v1697);
17882
0
                                let v1699 = &C::xmm_to_xmm_mem(ctx, v1696);
17883
0
                                let v1700 = constructor_x64_cvttps2dq(ctx, v1699);
17884
0
                                let v1701 = &C::xmm_to_xmm_mem(ctx, v1698);
17885
0
                                let v1702 = constructor_x64_pand(ctx, v1700, v1701);
17886
0
                                let v1703 = &C::xmi_imm(ctx, 0x1F);
17887
0
                                let v1704 = constructor_x64_psrad(ctx, v1702, v1703);
17888
0
                                let v1705 = &C::xmm_to_xmm_mem(ctx, v1700);
17889
0
                                let v1706 = constructor_x64_pxor(ctx, v1704, v1705);
17890
0
                                let v1707 = constructor_output_xmm(ctx, v1706);
17891
0
                                // Rule at src/isa/x64/lower.isle line 3189.
17892
0
                                return Some(v1707);
17893
0
                            }
17894
0
                        }
17895
0
                        let v522 = C::value_type(ctx, v306);
17896
0
                        let v1684 = C::ty_scalar_float(ctx, v522);
17897
0
                        if let Some(v1685) = v1684 {
17898
0
                            let v1692 = constructor_cvt_float_to_sint_seq(ctx, v3, v306, true);
17899
0
                            let v1693 = constructor_output_gpr(ctx, v1692);
17900
0
                            // Rule at src/isa/x64/lower.isle line 3185.
17901
0
                            return Some(v1693);
17902
0
                        }
17903
0
                    }
17904
                }
17905
                &Opcode::X86Cvtt2dq => {
17906
0
                    let v1 = C::first_result(ctx, arg0);
17907
0
                    if let Some(v2) = v1 {
17908
0
                        let v3 = C::value_type(ctx, v2);
17909
0
                        if v3 == I32X4 {
17910
0
                            let v522 = C::value_type(ctx, v306);
17911
0
                            if v522 == F32X4 {
17912
0
                                let v452 = &C::put_in_xmm_mem(ctx, v306);
17913
0
                                let v1733 = constructor_x64_cvttps2dq(ctx, v452);
17914
0
                                let v1734 = constructor_output_xmm(ctx, v1733);
17915
0
                                // Rule at src/isa/x64/lower.isle line 3307.
17916
0
                                return Some(v1734);
17917
0
                            }
17918
0
                        }
17919
0
                    }
17920
                }
17921
                &Opcode::FcvtFromUint => {
17922
0
                    let v1 = C::first_result(ctx, arg0);
17923
0
                    if let Some(v2) = v1 {
17924
0
                        let v3 = C::value_type(ctx, v2);
17925
0
                        match v3 {
17926
                            F32 => {
17927
0
                                let v522 = C::value_type(ctx, v306);
17928
0
                                let v1639 = C::fits_in_32(ctx, v522);
17929
0
                                if let Some(v1640) = v1639 {
17930
0
                                    let v1641 = C::ty_int(ctx, v1640);
17931
0
                                    if let Some(v1642) = v1641 {
17932
0
                                        let v1047 = constructor_extend_to_gpr(ctx, v306, I64, &ExtendKind::Zero);
17933
0
                                        let v1643 = &C::gpr_to_gpr_mem(ctx, v1047);
17934
0
                                        let v1644 = constructor_x64_cvtsi2ss(ctx, I64, v1643);
17935
0
                                        let v1645 = constructor_output_xmm(ctx, v1644);
17936
0
                                        // Rule at src/isa/x64/lower.isle line 3104.
17937
0
                                        return Some(v1645);
17938
0
                                    }
17939
0
                                }
17940
                            }
17941
                            F64 => {
17942
0
                                let v522 = C::value_type(ctx, v306);
17943
0
                                let v1639 = C::fits_in_32(ctx, v522);
17944
0
                                if let Some(v1640) = v1639 {
17945
0
                                    let v1641 = C::ty_int(ctx, v1640);
17946
0
                                    if let Some(v1642) = v1641 {
17947
0
                                        let v1047 = constructor_extend_to_gpr(ctx, v306, I64, &ExtendKind::Zero);
17948
0
                                        let v1643 = &C::gpr_to_gpr_mem(ctx, v1047);
17949
0
                                        let v1646 = constructor_x64_cvtsi2sd(ctx, I64, v1643);
17950
0
                                        let v1647 = constructor_output_xmm(ctx, v1646);
17951
0
                                        // Rule at src/isa/x64/lower.isle line 3107.
17952
0
                                        return Some(v1647);
17953
0
                                    }
17954
0
                                }
17955
                            }
17956
                            F32X4 => {
17957
0
                                let v386 = C::avx512vl_enabled(ctx, v3);
17958
0
                                if v386 == true {
17959
0
                                    let v459 = C::avx512f_enabled(ctx, v3);
17960
0
                                    if v459 == true {
17961
0
                                        let v452 = &C::put_in_xmm_mem(ctx, v306);
17962
0
                                        let v1664 = constructor_x64_vcvtudq2ps(ctx, v452);
17963
0
                                        let v1665 = constructor_output_xmm(ctx, v1664);
17964
0
                                        // Rule at src/isa/x64/lower.isle line 3125.
17965
0
                                        return Some(v1665);
17966
0
                                    }
17967
0
                                }
17968
0
                                let v462 = constructor_put_in_xmm(ctx, v306);
17969
0
                                let v1667 = &C::xmi_imm(ctx, 0x10);
17970
0
                                let v1668 = constructor_x64_pslld(ctx, v462, v1667);
17971
0
                                let v1669 = &C::xmi_imm(ctx, 0x10);
17972
0
                                let v1670 = constructor_x64_psrld(ctx, v1668, v1669);
17973
0
                                let v1671 = &C::xmm_to_xmm_mem(ctx, v1670);
17974
0
                                let v1672 = constructor_x64_psubd(ctx, v462, v1671);
17975
0
                                let v1673 = &C::xmm_to_xmm_mem(ctx, v1670);
17976
0
                                let v1674 = constructor_x64_cvtdq2ps(ctx, v1673);
17977
0
                                let v1675 = &C::xmi_imm(ctx, 0x1);
17978
0
                                let v1676 = constructor_x64_psrld(ctx, v1672, v1675);
17979
0
                                let v1677 = &C::xmm_to_xmm_mem(ctx, v1676);
17980
0
                                let v1678 = constructor_x64_cvtdq2ps(ctx, v1677);
17981
0
                                let v1679 = &C::xmm_to_xmm_mem(ctx, v1678);
17982
0
                                let v1680 = constructor_x64_addps(ctx, v1678, v1679);
17983
0
                                let v1681 = &C::xmm_to_xmm_mem(ctx, v1674);
17984
0
                                let v1682 = constructor_x64_addps(ctx, v1680, v1681);
17985
0
                                let v1683 = constructor_output_xmm(ctx, v1682);
17986
0
                                // Rule at src/isa/x64/lower.isle line 3152.
17987
0
                                return Some(v1683);
17988
                            }
17989
                            F64X2 => {
17990
0
                                let v1650 = C::def_inst(ctx, v306);
17991
0
                                if let Some(v1651) = v1650 {
17992
0
                                    let v1652 = &C::inst_data(ctx, v1651);
17993
                                    if let &InstructionData::Unary {
17994
0
                                        opcode: ref v1653,
17995
0
                                        arg: v1654,
17996
0
                                    } = v1652 {
17997
0
                                        if let &Opcode::UwidenLow = v1653 {
17998
0
                                            let v1655 = C::value_type(ctx, v1654);
17999
0
                                            if v1655 == I32X4 {
18000
0
                                                let v1656 = C::fcvt_uint_mask_const(ctx);
18001
0
                                                let v1657 = &constructor_const_to_xmm_mem(ctx, v1656);
18002
0
                                                let v1658 = constructor_put_in_xmm(ctx, v1654);
18003
0
                                                let v1659 = constructor_x64_unpcklps(ctx, v1658, v1657);
18004
0
                                                let v1660 = C::fcvt_uint_mask_high_const(ctx);
18005
0
                                                let v1661 = &constructor_const_to_xmm_mem(ctx, v1660);
18006
0
                                                let v1662 = constructor_x64_subpd(ctx, v1659, v1661);
18007
0
                                                let v1663 = constructor_output_xmm(ctx, v1662);
18008
0
                                                // Rule at src/isa/x64/lower.isle line 3117.
18009
0
                                                return Some(v1663);
18010
0
                                            }
18011
0
                                        }
18012
0
                                    }
18013
0
                                }
18014
                            }
18015
0
                            _ => {}
18016
                        }
18017
0
                        let v522 = C::value_type(ctx, v306);
18018
0
                        if v522 == I64 {
18019
0
                            let v307 = constructor_put_in_gpr(ctx, v306);
18020
0
                            let v1648 = constructor_cvt_u64_to_float_seq(ctx, v3, v307);
18021
0
                            let v1649 = constructor_output_xmm(ctx, v1648);
18022
0
                            // Rule at src/isa/x64/lower.isle line 3110.
18023
0
                            return Some(v1649);
18024
0
                        }
18025
0
                    }
18026
                }
18027
                &Opcode::FcvtFromSint => {
18028
0
                    let v1 = C::first_result(ctx, arg0);
18029
0
                    if let Some(v2) = v1 {
18030
0
                        let v3 = C::value_type(ctx, v2);
18031
0
                        match v3 {
18032
                            F32 => {
18033
0
                                let v522 = C::value_type(ctx, v306);
18034
0
                                match v522 {
18035
                                    I8 => {
18036
0
                                        let v1063 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Sign);
18037
0
                                        let v1621 = &C::gpr_to_gpr_mem(ctx, v1063);
18038
0
                                        let v1622 = constructor_x64_cvtsi2ss(ctx, I32, v1621);
18039
0
                                        let v1623 = constructor_output_xmm(ctx, v1622);
18040
0
                                        // Rule at src/isa/x64/lower.isle line 3076.
18041
0
                                        return Some(v1623);
18042
                                    }
18043
                                    I16 => {
18044
0
                                        let v1063 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Sign);
18045
0
                                        let v1621 = &C::gpr_to_gpr_mem(ctx, v1063);
18046
0
                                        let v1622 = constructor_x64_cvtsi2ss(ctx, I32, v1621);
18047
0
                                        let v1623 = constructor_output_xmm(ctx, v1622);
18048
0
                                        // Rule at src/isa/x64/lower.isle line 3079.
18049
0
                                        return Some(v1623);
18050
                                    }
18051
0
                                    _ => {}
18052
0
                                }
18053
0
                                let v1624 = C::ty_int(ctx, v522);
18054
0
                                if let Some(v1625) = v1624 {
18055
0
                                    let v1626 = C::fits_in_64(ctx, v1625);
18056
0
                                    if let Some(v1627) = v1626 {
18057
0
                                        let v1628 = &constructor_put_in_gpr_mem(ctx, v306);
18058
0
                                        let v1629 = constructor_x64_cvtsi2ss(ctx, v1627, v1628);
18059
0
                                        let v1630 = constructor_output_xmm(ctx, v1629);
18060
0
                                        // Rule at src/isa/x64/lower.isle line 3082.
18061
0
                                        return Some(v1630);
18062
0
                                    }
18063
0
                                }
18064
                            }
18065
                            F64 => {
18066
0
                                let v522 = C::value_type(ctx, v306);
18067
0
                                match v522 {
18068
                                    I8 => {
18069
0
                                        let v1063 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Sign);
18070
0
                                        let v1621 = &C::gpr_to_gpr_mem(ctx, v1063);
18071
0
                                        let v1631 = constructor_x64_cvtsi2sd(ctx, I32, v1621);
18072
0
                                        let v1632 = constructor_output_xmm(ctx, v1631);
18073
0
                                        // Rule at src/isa/x64/lower.isle line 3085.
18074
0
                                        return Some(v1632);
18075
                                    }
18076
                                    I16 => {
18077
0
                                        let v1063 = constructor_extend_to_gpr(ctx, v306, I32, &ExtendKind::Sign);
18078
0
                                        let v1621 = &C::gpr_to_gpr_mem(ctx, v1063);
18079
0
                                        let v1631 = constructor_x64_cvtsi2sd(ctx, I32, v1621);
18080
0
                                        let v1632 = constructor_output_xmm(ctx, v1631);
18081
0
                                        // Rule at src/isa/x64/lower.isle line 3088.
18082
0
                                        return Some(v1632);
18083
                                    }
18084
0
                                    _ => {}
18085
0
                                }
18086
0
                                let v1624 = C::ty_int(ctx, v522);
18087
0
                                if let Some(v1625) = v1624 {
18088
0
                                    let v1626 = C::fits_in_64(ctx, v1625);
18089
0
                                    if let Some(v1627) = v1626 {
18090
0
                                        let v1628 = &constructor_put_in_gpr_mem(ctx, v306);
18091
0
                                        let v1633 = constructor_x64_cvtsi2sd(ctx, v1627, v1628);
18092
0
                                        let v1634 = constructor_output_xmm(ctx, v1633);
18093
0
                                        // Rule at src/isa/x64/lower.isle line 3091.
18094
0
                                        return Some(v1634);
18095
0
                                    }
18096
0
                                }
18097
                            }
18098
0
                            _ => {}
18099
                        }
18100
0
                    }
18101
0
                    let v522 = C::value_type(ctx, v306);
18102
0
                    if v522 == I32X4 {
18103
0
                        let v452 = &C::put_in_xmm_mem(ctx, v306);
18104
0
                        let v1635 = constructor_x64_cvtdq2ps(ctx, v452);
18105
0
                        let v1636 = constructor_output_xmm(ctx, v1635);
18106
0
                        // Rule at src/isa/x64/lower.isle line 3094.
18107
0
                        return Some(v1636);
18108
0
                    }
18109
                }
18110
                &Opcode::FcvtLowFromSint => {
18111
0
                    let v452 = &C::put_in_xmm_mem(ctx, v306);
18112
0
                    let v1637 = constructor_x64_cvtdq2pd(ctx, v452);
18113
0
                    let v1638 = constructor_output_xmm(ctx, v1637);
18114
0
                    // Rule at src/isa/x64/lower.isle line 3099.
18115
0
                    return Some(v1638);
18116
                }
18117
                &Opcode::Isplit => {
18118
0
                    let v522 = C::value_type(ctx, v306);
18119
0
                    if v522 == I128 {
18120
0
                        let v310 = C::put_in_regs(ctx, v306);
18121
0
                        let v2265 = C::value_regs_get(ctx, v310, 0x0);
18122
0
                        let v2266 = C::value_regs_get(ctx, v310, 0x1);
18123
0
                        let v2267 = C::value_reg(ctx, v2265);
18124
0
                        let v2268 = C::value_reg(ctx, v2266);
18125
0
                        let v2269 = C::output_pair(ctx, v2267, v2268);
18126
0
                        // Rule at src/isa/x64/lower.isle line 4187.
18127
0
                        return Some(v2269);
18128
0
                    }
18129
                }
18130
0
                _ => {}
18131
            }
18132
        }
18133
        &InstructionData::UnaryConst {
18134
0
            opcode: ref v2001,
18135
0
            constant_handle: v2002,
18136
0
        } => {
18137
0
            if let &Opcode::Vconst = v2001 {
18138
0
                let v1 = C::first_result(ctx, arg0);
18139
0
                if let Some(v2) = v1 {
18140
0
                    let v2003 = C::const_to_vconst(ctx, v2002);
18141
0
                    let v3 = C::value_type(ctx, v2);
18142
0
                    let v2004 = constructor_x64_xmm_load_const(ctx, v3, v2003);
18143
0
                    let v2005 = constructor_output_xmm(ctx, v2004);
18144
0
                    // Rule at src/isa/x64/lower.isle line 3802.
18145
0
                    return Some(v2005);
18146
0
                }
18147
0
            }
18148
        }
18149
        &InstructionData::UnaryGlobalValue {
18150
0
            opcode: ref v1514,
18151
0
            global_value: v1515,
18152
0
        } => {
18153
0
            match v1514 {
18154
                &Opcode::SymbolValue => {
18155
0
                    let v1516 = C::symbol_value_data(ctx, v1515);
18156
0
                    if let Some(v1517) = v1516 {
18157
0
                        let v1521 = constructor_load_ext_name(ctx, v1517.0, v1517.2);
18158
0
                        let v1522 = constructor_output_reg(ctx, v1521);
18159
0
                        // Rule at src/isa/x64/lower.isle line 2929.
18160
0
                        return Some(v1522);
18161
0
                    }
18162
                }
18163
                &Opcode::TlsValue => {
18164
0
                    let v1 = C::first_result(ctx, arg0);
18165
0
                    if let Some(v2) = v1 {
18166
0
                        let v1516 = C::symbol_value_data(ctx, v1515);
18167
0
                        if let Some(v1517) = v1516 {
18168
0
                            let v3 = C::value_type(ctx, v2);
18169
0
                            let v2270 = &C::tls_model(ctx, v3);
18170
0
                            match v2270 {
18171
                                &TlsModel::ElfGd => {
18172
0
                                    let v2271 = constructor_elf_tls_get_addr(ctx, v1517.0);
18173
0
                                    let v2272 = constructor_output_gpr(ctx, v2271);
18174
0
                                    // Rule at src/isa/x64/lower.isle line 4195.
18175
0
                                    return Some(v2272);
18176
                                }
18177
                                &TlsModel::Macho => {
18178
0
                                    let v2273 = constructor_macho_tls_get_addr(ctx, v1517.0);
18179
0
                                    let v2274 = constructor_output_gpr(ctx, v2273);
18180
0
                                    // Rule at src/isa/x64/lower.isle line 4198.
18181
0
                                    return Some(v2274);
18182
                                }
18183
                                &TlsModel::Coff => {
18184
0
                                    let v2275 = constructor_coff_tls_get_addr(ctx, v1517.0);
18185
0
                                    let v2276 = constructor_output_gpr(ctx, v2275);
18186
0
                                    // Rule at src/isa/x64/lower.isle line 4201.
18187
0
                                    return Some(v2276);
18188
                                }
18189
0
                                _ => {}
18190
                            }
18191
0
                        }
18192
0
                    }
18193
                }
18194
0
                _ => {}
18195
            }
18196
        }
18197
        &InstructionData::UnaryIeee32 {
18198
0
            opcode: ref v18,
18199
0
            imm: v19,
18200
0
        } => {
18201
0
            if let &Opcode::F32const = v18 {
18202
0
                let v20 = C::u32_from_ieee32(ctx, v19);
18203
0
                let v22 = C::u32_as_u64(ctx, v20);
18204
0
                let v23 = constructor_imm(ctx, F32, v22);
18205
0
                let v24 = constructor_output_reg(ctx, v23);
18206
0
                // Rule at src/isa/x64/lower.isle line 27.
18207
0
                return Some(v24);
18208
0
            }
18209
        }
18210
        &InstructionData::UnaryIeee64 {
18211
0
            opcode: ref v25,
18212
0
            imm: v26,
18213
0
        } => {
18214
0
            if let &Opcode::F64const = v25 {
18215
0
                let v27 = C::u64_from_ieee64(ctx, v26);
18216
0
                let v29 = constructor_imm(ctx, F64, v27);
18217
0
                let v30 = constructor_output_reg(ctx, v29);
18218
0
                // Rule at src/isa/x64/lower.isle line 32.
18219
0
                return Some(v30);
18220
0
            }
18221
        }
18222
        &InstructionData::UnaryImm {
18223
324k
            opcode: ref v7,
18224
324k
            imm: v8,
18225
324k
        } => {
18226
324k
            if let &Opcode::Iconst = v7 {
18227
324k
                let v1 = C::first_result(ctx, arg0);
18228
324k
                if let Some(v2) = v1 {
18229
324k
                    let v3 = C::value_type(ctx, v2);
18230
324k
                    if v3 == I128 {
18231
0
                        let v9 = C::u64_from_imm64(ctx, v8);
18232
0
                        let v13 = constructor_imm(ctx, I64, v9);
18233
0
                        let v15 = constructor_imm(ctx, I64, 0x0);
18234
0
                        let v16 = C::value_regs(ctx, v13, v15);
18235
0
                        let v17 = C::output(ctx, v16);
18236
0
                        // Rule at src/isa/x64/lower.isle line 20.
18237
0
                        return Some(v17);
18238
324k
                    }
18239
324k
                    let v4 = C::fits_in_64(ctx, v3);
18240
324k
                    if let Some(
v5324k
) = v4 {
18241
324k
                        let v9 = C::u64_from_imm64(ctx, v8);
18242
324k
                        let v10 = constructor_imm(ctx, v5, v9);
18243
324k
                        let v11 = constructor_output_reg(ctx, v10);
18244
324k
                        // Rule at src/isa/x64/lower.isle line 15.
18245
324k
                        return Some(v11);
18246
0
                    }
18247
0
                }
18248
0
            }
18249
        }
18250
0
        _ => {}
18251
    }
18252
0
    None
18253
3.39M
}
18254
18255
// Generated as internal constructor for term lower_branch.
18256
503k
pub fn constructor_lower_branch<C: Context>(
18257
503k
    ctx: &mut C,
18258
503k
    arg0: Inst,
18259
503k
    arg1: &MachLabelSlice,
18260
503k
) -> Option<Unit> {
18261
503k
    let v1 = &C::inst_data(ctx, arg0);
18262
503k
    match v1 {
18263
        &InstructionData::BranchTable {
18264
8.97k
            opcode: ref v55,
18265
8.97k
            arg: v56,
18266
8.97k
            table: v57,
18267
8.97k
        } => {
18268
8.97k
            if let &Opcode::BrTable = v55 {
18269
8.97k
                let v59 = C::jump_table_targets(ctx, arg1);
18270
9.01k
                if let Some(v60) = 
v598.97k
{
18271
9.01k
                    let v58 = C::value_type(ctx, v56);
18272
9.01k
                    let v63 = &C::raw_operand_size_of_type(ctx, v58);
18273
9.01k
                    let v64 = C::jump_table_size(ctx, &v60.1);
18274
9.01k
                    let v65 = C::u32_as_u64(ctx, v64);
18275
9.01k
                    let v66 = constructor_imm(ctx, v58, v65);
18276
9.01k
                    let v69 = constructor_extend_to_gpr(ctx, v56, I64, &ExtendKind::Zero);
18277
9.01k
                    let v70 = &constructor_reg_to_gpr_mem_imm(ctx, v66);
18278
9.01k
                    let v71 = &constructor_x64_cmp(ctx, v63, v70, v69);
18279
9.01k
                    let v73 = &C::gpr_to_gpr_mem(ctx, v69);
18280
9.01k
                    let v74 = C::gpr_new(ctx, v66);
18281
9.01k
                    let v75 = &constructor_cmove(ctx, v58, &CC::B, v73, v74);
18282
9.01k
                    let v76 = constructor_with_flags_reg(ctx, v71, v75);
18283
9.01k
                    let v77 = C::gpr_new(ctx, v76);
18284
9.01k
                    let v78 = &constructor_jmp_table_seq(ctx, v58, v77, v60.0, &v60.1);
18285
9.01k
                    let v79 = constructor_emit_side_effect(ctx, v78);
18286
9.01k
                    // Rule at src/isa/x64/lower.isle line 3050.
18287
9.01k
                    return Some(v79);
18288
0
                }
18289
0
            }
18290
        }
18291
        &InstructionData::Brif {
18292
296k
            opcode: ref v9,
18293
296k
            arg: v10,
18294
296k
            blocks: ref v11,
18295
296k
        } => {
18296
296k
            if let &Opcode::Brif = v9 {
18297
296k
                let v26 = C::two_targets(ctx, arg1);
18298
296k
                if let Some(v27) = v26 {
18299
296k
                    let v12 = C::maybe_uextend(ctx, v10);
18300
296k
                    if let Some(v13) = v12 {
18301
296k
                        let v14 = C::def_inst(ctx, v13);
18302
296k
                        if let Some(
v15268k
) = v14 {
18303
268k
                            let v16 = &C::inst_data(ctx, v15);
18304
268k
                            match v16 {
18305
                                &InstructionData::FloatCompare {
18306
18.4E
                                    opcode: ref v33,
18307
18.4E
                                    args: ref v34,
18308
18.4E
                                    cond: ref v35,
18309
18.4E
                                } => {
18310
18.4E
                                    if let &Opcode::Fcmp = v33 {
18311
0
                                        let v36 = C::unpack_value_array_2(ctx, v34);
18312
0
                                        let v39 = &constructor_emit_fcmp(ctx, v35, v36.0, v36.1);
18313
0
                                        let v40 = &constructor_jmp_cond_fcmp(ctx, v39, v27.0, v27.1);
18314
0
                                        let v41 = constructor_emit_side_effect(ctx, v40);
18315
0
                                        // Rule at src/isa/x64/lower.isle line 3011.
18316
0
                                        return Some(v41);
18317
0
                                    }
18318
                                }
18319
                                &InstructionData::IntCompare {
18320
212k
                                    opcode: ref v17,
18321
212k
                                    args: ref v18,
18322
212k
                                    cond: ref v19,
18323
212k
                                } => {
18324
212k
                                    if let &Opcode::Icmp = v17 {
18325
212k
                                        let v20 = C::unpack_value_array_2(ctx, v18);
18326
212k
                                        let v30 = &constructor_emit_cmp(ctx, v19, v20.0, v20.1);
18327
212k
                                        let v31 = &constructor_jmp_cond_icmp(ctx, v30, v27.0, v27.1);
18328
212k
                                        let v32 = constructor_emit_side_effect(ctx, v31);
18329
212k
                                        // Rule at src/isa/x64/lower.isle line 3008.
18330
212k
                                        return Some(v32);
18331
0
                                    }
18332
                                }
18333
55.9k
                                _ => {}
18334
                            }
18335
27.9k
                        }
18336
0
                    }
18337
83.8k
                    let v42 = C::value_type(ctx, v10);
18338
83.8k
                    if v42 == I128 {
18339
0
                        let v44 = C::put_in_regs(ctx, v10);
18340
0
                        let v45 = &constructor_cmp_zero_i128(ctx, &CC::Z, v44);
18341
0
                        let v46 = &constructor_jmp_cond_icmp(ctx, v45, v27.0, v27.1);
18342
0
                        let v47 = constructor_emit_side_effect(ctx, v46);
18343
0
                        // Rule at src/isa/x64/lower.isle line 3014.
18344
0
                        return Some(v47);
18345
83.8k
                    }
18346
83.8k
                    let v48 = C::ty_int_bool_or_ref(ctx, v42);
18347
83.8k
                    if let Some(
v4983.8k
) = v48 {
18348
83.8k
                        let v50 = &constructor_cmp_zero_int_bool_ref(ctx, v10);
18349
83.8k
                        let v52 = &constructor_jmp_cond(ctx, &CC::NZ, v27.0, v27.1);
18350
83.8k
                        let v53 = &constructor_with_flags_side_effect(ctx, v50, v52);
18351
83.8k
                        let v54 = constructor_emit_side_effect(ctx, v53);
18352
83.8k
                        // Rule at src/isa/x64/lower.isle line 3018.
18353
83.8k
                        return Some(v54);
18354
0
                    }
18355
0
                }
18356
0
            }
18357
        }
18358
        &InstructionData::Jump {
18359
197k
            opcode: ref v2,
18360
197k
            destination: v3,
18361
197k
        } => {
18362
197k
            if let &Opcode::Jump = v2 {
18363
197k
                let v5 = C::single_target(ctx, arg1);
18364
197k
                if let Some(v6) = v5 {
18365
197k
                    let v7 = &constructor_jmp_known(ctx, v6);
18366
197k
                    let v8 = constructor_emit_side_effect(ctx, v7);
18367
197k
                    // Rule at src/isa/x64/lower.isle line 3003.
18368
197k
                    return Some(v8);
18369
0
                }
18370
0
            }
18371
        }
18372
0
        _ => {}
18373
    }
18374
0
    None
18375
503k
}
18376
18377
// Generated as internal constructor for term construct_overflow_op.
18378
0
pub fn constructor_construct_overflow_op<C: Context>(
18379
0
    ctx: &mut C,
18380
0
    arg0: &CC,
18381
0
    arg1: &ProducesFlags,
18382
0
) -> InstOutput {
18383
0
    let v2 = &constructor_x64_setcc_paired(ctx, arg0);
18384
0
    let v3 = constructor_with_flags(ctx, arg1, v2);
18385
0
    let v5 = C::value_regs_get(ctx, v3, 0x0);
18386
0
    let v6 = C::value_reg(ctx, v5);
18387
0
    let v8 = C::value_regs_get(ctx, v3, 0x1);
18388
0
    let v9 = C::value_reg(ctx, v8);
18389
0
    let v10 = C::output_pair(ctx, v6, v9);
18390
0
    // Rule at src/isa/x64/lower.isle line 94.
18391
0
    return v10;
18392
0
}
18393
18394
// Generated as internal constructor for term construct_overflow_op_alu.
18395
0
pub fn constructor_construct_overflow_op_alu<C: Context>(
18396
0
    ctx: &mut C,
18397
0
    arg0: Type,
18398
0
    arg1: &CC,
18399
0
    arg2: &AluRmiROpcode,
18400
0
    arg3: Gpr,
18401
0
    arg4: &GprMemImm,
18402
0
) -> InstOutput {
18403
0
    let v5 = &constructor_x64_alurmi_with_flags_paired(ctx, arg2, arg0, arg3, arg4);
18404
0
    let v6 = constructor_construct_overflow_op(ctx, arg1, v5);
18405
0
    // Rule at src/isa/x64/lower.isle line 101.
18406
0
    return v6;
18407
0
}
18408
18409
// Generated as internal constructor for term construct_overflow_op_alu_128.
18410
0
pub fn constructor_construct_overflow_op_alu_128<C: Context>(
18411
0
    ctx: &mut C,
18412
0
    arg0: &CC,
18413
0
    arg1: &AluRmiROpcode,
18414
0
    arg2: &AluRmiROpcode,
18415
0
    arg3: Value,
18416
0
    arg4: Value,
18417
0
) -> InstOutput {
18418
0
    let v5 = C::put_in_regs(ctx, arg3);
18419
0
    let v7 = constructor_value_regs_get_gpr(ctx, v5, 0x0);
18420
0
    let v9 = constructor_value_regs_get_gpr(ctx, v5, 0x1);
18421
0
    let v10 = C::put_in_regs(ctx, arg4);
18422
0
    let v11 = constructor_value_regs_get_gpr(ctx, v10, 0x0);
18423
0
    let v12 = constructor_value_regs_get_gpr(ctx, v10, 0x1);
18424
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
18425
0
    let v15 = &constructor_x64_alurmi_with_flags_paired(ctx, arg1, I64, v7, v14);
18426
0
    let v16 = &C::gpr_to_gpr_mem_imm(ctx, v12);
18427
0
    let v17 = &constructor_x64_alurmi_with_flags_chained(ctx, arg2, I64, v9, v16);
18428
0
    let v18 = &constructor_x64_setcc_paired(ctx, arg0);
18429
0
    let v19 = &constructor_with_flags_chained(ctx, v15, v17, v18);
18430
0
    let v20 = constructor_multi_reg_to_pair_and_single(ctx, v19);
18431
0
    // Rule at src/isa/x64/lower.isle line 109.
18432
0
    return v20;
18433
0
}
18434
18435
// Generated as internal constructor for term sse_and.
18436
0
pub fn constructor_sse_and<C: Context>(
18437
0
    ctx: &mut C,
18438
0
    arg0: Type,
18439
0
    arg1: Xmm,
18440
0
    arg2: &XmmMem,
18441
0
) -> Xmm {
18442
0
    match arg0 {
18443
        F32 => {
18444
0
            let v3 = constructor_x64_andps(ctx, arg1, arg2);
18445
0
            // Rule at src/isa/x64/lower.isle line 283.
18446
0
            return v3;
18447
        }
18448
        F64 => {
18449
0
            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
18450
0
            // Rule at src/isa/x64/lower.isle line 284.
18451
0
            return v4;
18452
        }
18453
        F32X4 => {
18454
0
            let v3 = constructor_x64_andps(ctx, arg1, arg2);
18455
0
            // Rule at src/isa/x64/lower.isle line 281.
18456
0
            return v3;
18457
        }
18458
        F64X2 => {
18459
0
            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
18460
0
            // Rule at src/isa/x64/lower.isle line 282.
18461
0
            return v4;
18462
        }
18463
0
        _ => {}
18464
0
    }
18465
0
    let v5 = C::multi_lane(ctx, arg0);
18466
0
    if let Some(v6) = v5 {
18467
0
        let v9 = constructor_x64_pand(ctx, arg1, arg2);
18468
0
        // Rule at src/isa/x64/lower.isle line 285.
18469
0
        return v9;
18470
0
    }
18471
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_and", "src/isa/x64/lower.isle line 280")
18472
0
}
18473
18474
// Generated as internal constructor for term sse_and_not.
18475
0
pub fn constructor_sse_and_not<C: Context>(
18476
0
    ctx: &mut C,
18477
0
    arg0: Type,
18478
0
    arg1: Xmm,
18479
0
    arg2: &XmmMem,
18480
0
) -> Xmm {
18481
0
    match arg0 {
18482
        F32X4 => {
18483
0
            let v3 = constructor_x64_andnps(ctx, arg1, arg2);
18484
0
            // Rule at src/isa/x64/lower.isle line 308.
18485
0
            return v3;
18486
        }
18487
        F64X2 => {
18488
0
            let v4 = constructor_x64_andnpd(ctx, arg1, arg2);
18489
0
            // Rule at src/isa/x64/lower.isle line 309.
18490
0
            return v4;
18491
        }
18492
0
        _ => {}
18493
0
    }
18494
0
    let v5 = C::multi_lane(ctx, arg0);
18495
0
    if let Some(v6) = v5 {
18496
0
        let v9 = constructor_x64_pandn(ctx, arg1, arg2);
18497
0
        // Rule at src/isa/x64/lower.isle line 310.
18498
0
        return v9;
18499
0
    }
18500
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_and_not", "src/isa/x64/lower.isle line 307")
18501
0
}
18502
18503
// Generated as internal constructor for term sse_or.
18504
0
pub fn constructor_sse_or<C: Context>(
18505
0
    ctx: &mut C,
18506
0
    arg0: Type,
18507
0
    arg1: Xmm,
18508
0
    arg2: &XmmMem,
18509
0
) -> Xmm {
18510
0
    match arg0 {
18511
        F32 => {
18512
0
            let v3 = constructor_x64_orps(ctx, arg1, arg2);
18513
0
            // Rule at src/isa/x64/lower.isle line 363.
18514
0
            return v3;
18515
        }
18516
        F64 => {
18517
0
            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
18518
0
            // Rule at src/isa/x64/lower.isle line 364.
18519
0
            return v4;
18520
        }
18521
        F32X4 => {
18522
0
            let v3 = constructor_x64_orps(ctx, arg1, arg2);
18523
0
            // Rule at src/isa/x64/lower.isle line 361.
18524
0
            return v3;
18525
        }
18526
        F64X2 => {
18527
0
            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
18528
0
            // Rule at src/isa/x64/lower.isle line 362.
18529
0
            return v4;
18530
        }
18531
0
        _ => {}
18532
0
    }
18533
0
    let v5 = C::multi_lane(ctx, arg0);
18534
0
    if let Some(v6) = v5 {
18535
0
        let v9 = constructor_x64_por(ctx, arg1, arg2);
18536
0
        // Rule at src/isa/x64/lower.isle line 365.
18537
0
        return v9;
18538
0
    }
18539
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_or", "src/isa/x64/lower.isle line 360")
18540
0
}
18541
18542
// Generated as internal constructor for term or_i128.
18543
0
pub fn constructor_or_i128<C: Context>(
18544
0
    ctx: &mut C,
18545
0
    arg0: ValueRegs,
18546
0
    arg1: ValueRegs,
18547
0
) -> ValueRegs {
18548
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
18549
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
18550
0
    let v6 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
18551
0
    let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
18552
0
    let v9 = &C::gpr_to_gpr_mem_imm(ctx, v6);
18553
0
    let v10 = constructor_x64_or(ctx, I64, v3, v9);
18554
0
    let v11 = &C::gpr_to_gpr_mem_imm(ctx, v7);
18555
0
    let v12 = constructor_x64_or(ctx, I64, v5, v11);
18556
0
    let v13 = constructor_value_gprs(ctx, v10, v12);
18557
0
    // Rule at src/isa/x64/lower.isle line 374.
18558
0
    return v13;
18559
0
}
18560
18561
// Generated as internal constructor for term shl_i128.
18562
0
pub fn constructor_shl_i128<C: Context>(
18563
0
    ctx: &mut C,
18564
0
    arg0: ValueRegs,
18565
0
    arg1: Gpr,
18566
0
) -> ValueRegs {
18567
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
18568
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
18569
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
18570
0
    let v8 = constructor_x64_shl(ctx, I64, v3, v7);
18571
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
18572
0
    let v10 = constructor_x64_shl(ctx, I64, v5, v9);
18573
0
    let v12 = constructor_imm(ctx, I64, 0x40);
18574
0
    let v13 = C::gpr_new(ctx, v12);
18575
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
18576
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
18577
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
18578
0
    let v17 = constructor_x64_shr(ctx, I64, v3, v16);
18579
0
    let v19 = constructor_imm(ctx, I64, 0x0);
18580
0
    let v20 = C::gpr_new(ctx, v19);
18581
0
    let v23 = RegMemImm::Imm {
18582
0
        simm32: 0x7F,
18583
0
    };
18584
0
    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
18585
0
    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
18586
0
    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
18587
0
    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
18588
0
    let v29 = constructor_with_flags_reg(ctx, v25, v28);
18589
0
    let v30 = C::gpr_new(ctx, v29);
18590
0
    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v10);
18591
0
    let v32 = constructor_x64_or(ctx, I64, v30, v31);
18592
0
    let v34 = RegMemImm::Imm {
18593
0
        simm32: 0x40,
18594
0
    };
18595
0
    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
18596
0
    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
18597
0
    let v37 = &C::gpr_to_gpr_mem(ctx, v8);
18598
0
    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v20);
18599
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v32);
18600
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v8);
18601
0
    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
18602
0
    let v42 = constructor_with_flags(ctx, v36, v41);
18603
0
    // Rule at src/isa/x64/lower.isle line 437.
18604
0
    return v42;
18605
0
}
18606
18607
// Generated as internal constructor for term ishl_i8x16_mask.
18608
0
pub fn constructor_ishl_i8x16_mask<C: Context>(
18609
0
    ctx: &mut C,
18610
0
    arg0: &RegMemImm,
18611
0
) -> SyntheticAmode {
18612
0
    match arg0 {
18613
        &RegMemImm::Reg {
18614
0
            reg: v3,
18615
0
        } => {
18616
0
            let v4 = &C::ishl_i8x16_mask_table(ctx);
18617
0
            let v5 = constructor_x64_lea(ctx, v4);
18618
0
            let v7 = C::gpr_new(ctx, v3);
18619
0
            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
18620
0
            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
18621
0
            let v13 = &C::amode_imm_reg_reg_shift(ctx, 0x0, v5, v10, 0x0);
18622
0
            let v14 = &C::amode_to_synthetic_amode(ctx, v13);
18623
0
            // Rule at src/isa/x64/lower.isle line 511.
18624
0
            return v14.clone();
18625
        }
18626
        &RegMemImm::Mem {
18627
0
            addr: ref v15,
18628
0
        } => {
18629
0
            let v17 = constructor_x64_load(ctx, I64, v15, &ExtKind::None);
18630
0
            let v18 = RegMemImm::Reg {
18631
0
                reg: v17,
18632
0
            };
18633
0
            let v19 = &constructor_ishl_i8x16_mask(ctx, &v18);
18634
0
            // Rule at src/isa/x64/lower.isle line 521.
18635
0
            return v19.clone();
18636
        }
18637
        &RegMemImm::Imm {
18638
0
            simm32: v1,
18639
0
        } => {
18640
0
            let v2 = &C::ishl_i8x16_mask_for_const(ctx, v1);
18641
0
            // Rule at src/isa/x64/lower.isle line 502.
18642
0
            return v2.clone();
18643
        }
18644
0
        _ => {}
18645
0
    }
18646
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "ishl_i8x16_mask", "src/isa/x64/lower.isle line 496")
18647
0
}
18648
18649
// Generated as internal constructor for term shr_i128.
18650
0
pub fn constructor_shr_i128<C: Context>(
18651
0
    ctx: &mut C,
18652
0
    arg0: ValueRegs,
18653
0
    arg1: Gpr,
18654
0
) -> ValueRegs {
18655
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
18656
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
18657
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
18658
0
    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
18659
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
18660
0
    let v10 = constructor_x64_shr(ctx, I64, v5, v9);
18661
0
    let v12 = constructor_imm(ctx, I64, 0x40);
18662
0
    let v13 = C::gpr_new(ctx, v12);
18663
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
18664
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
18665
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
18666
0
    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
18667
0
    let v19 = constructor_imm(ctx, I64, 0x0);
18668
0
    let v20 = C::gpr_new(ctx, v19);
18669
0
    let v23 = RegMemImm::Imm {
18670
0
        simm32: 0x7F,
18671
0
    };
18672
0
    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
18673
0
    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
18674
0
    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
18675
0
    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
18676
0
    let v29 = constructor_with_flags_reg(ctx, v25, v28);
18677
0
    let v30 = C::gpr_new(ctx, v29);
18678
0
    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v8);
18679
0
    let v32 = constructor_x64_or(ctx, I64, v30, v31);
18680
0
    let v34 = RegMemImm::Imm {
18681
0
        simm32: 0x40,
18682
0
    };
18683
0
    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
18684
0
    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
18685
0
    let v37 = &C::gpr_to_gpr_mem(ctx, v32);
18686
0
    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v10);
18687
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v10);
18688
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v20);
18689
0
    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
18690
0
    let v42 = constructor_with_flags(ctx, v36, v41);
18691
0
    // Rule at src/isa/x64/lower.isle line 546.
18692
0
    return v42;
18693
0
}
18694
18695
// Generated as internal constructor for term ushr_i8x16_mask.
18696
0
pub fn constructor_ushr_i8x16_mask<C: Context>(
18697
0
    ctx: &mut C,
18698
0
    arg0: &RegMemImm,
18699
0
) -> SyntheticAmode {
18700
0
    match arg0 {
18701
        &RegMemImm::Reg {
18702
0
            reg: v3,
18703
0
        } => {
18704
0
            let v4 = &C::ushr_i8x16_mask_table(ctx);
18705
0
            let v5 = constructor_x64_lea(ctx, v4);
18706
0
            let v7 = C::gpr_new(ctx, v3);
18707
0
            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
18708
0
            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
18709
0
            let v13 = &C::amode_imm_reg_reg_shift(ctx, 0x0, v5, v10, 0x0);
18710
0
            let v14 = &C::amode_to_synthetic_amode(ctx, v13);
18711
0
            // Rule at src/isa/x64/lower.isle line 615.
18712
0
            return v14.clone();
18713
        }
18714
        &RegMemImm::Mem {
18715
0
            addr: ref v15,
18716
0
        } => {
18717
0
            let v17 = constructor_x64_load(ctx, I64, v15, &ExtKind::None);
18718
0
            let v18 = RegMemImm::Reg {
18719
0
                reg: v17,
18720
0
            };
18721
0
            let v19 = &constructor_ushr_i8x16_mask(ctx, &v18);
18722
0
            // Rule at src/isa/x64/lower.isle line 626.
18723
0
            return v19.clone();
18724
        }
18725
        &RegMemImm::Imm {
18726
0
            simm32: v1,
18727
0
        } => {
18728
0
            let v2 = &C::ushr_i8x16_mask_for_const(ctx, v1);
18729
0
            // Rule at src/isa/x64/lower.isle line 606.
18730
0
            return v2.clone();
18731
        }
18732
0
        _ => {}
18733
0
    }
18734
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "ushr_i8x16_mask", "src/isa/x64/lower.isle line 600")
18735
0
}
18736
18737
// Generated as internal constructor for term mask_xmm_shift.
18738
0
pub fn constructor_mask_xmm_shift<C: Context>(
18739
0
    ctx: &mut C,
18740
0
    arg0: Type,
18741
0
    arg1: Value,
18742
0
) -> RegMemImm {
18743
0
    let v10 = C::def_inst(ctx, arg1);
18744
0
    if let Some(v11) = v10 {
18745
0
        let v12 = &C::inst_data(ctx, v11);
18746
        if let &InstructionData::UnaryImm {
18747
0
            opcode: ref v13,
18748
0
            imm: v14,
18749
0
        } = v12 {
18750
0
            if let &Opcode::Iconst = v13 {
18751
0
                let v15 = C::shift_amount_masked(ctx, arg0, v14);
18752
0
                let v16 = RegMemImm::Imm {
18753
0
                    simm32: v15,
18754
0
                };
18755
0
                // Rule at src/isa/x64/lower.isle line 643.
18756
0
                return v16;
18757
0
            }
18758
0
        }
18759
0
    }
18760
0
    let v3 = constructor_put_in_gpr(ctx, arg1);
18761
0
    let v4 = C::shift_mask(ctx, arg0);
18762
0
    let v5 = RegMemImm::Imm {
18763
0
        simm32: v4,
18764
0
    };
18765
0
    let v6 = &C::gpr_mem_imm_new(ctx, &v5);
18766
0
    let v7 = constructor_x64_and(ctx, I64, v3, v6);
18767
0
    let v8 = C::gpr_to_reg(ctx, v7);
18768
0
    let v9 = &C::reg_to_reg_mem_imm(ctx, v8);
18769
0
    // Rule at src/isa/x64/lower.isle line 641.
18770
0
    return v9.clone();
18771
0
}
18772
18773
// Generated as internal constructor for term sar_i128.
18774
0
pub fn constructor_sar_i128<C: Context>(
18775
0
    ctx: &mut C,
18776
0
    arg0: ValueRegs,
18777
0
    arg1: Gpr,
18778
0
) -> ValueRegs {
18779
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
18780
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
18781
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
18782
0
    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
18783
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
18784
0
    let v10 = constructor_x64_sar(ctx, I64, v5, v9);
18785
0
    let v12 = constructor_imm(ctx, I64, 0x40);
18786
0
    let v13 = C::gpr_new(ctx, v12);
18787
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
18788
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
18789
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
18790
0
    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
18791
0
    let v20 = RegMemImm::Imm {
18792
0
        simm32: 0x7F,
18793
0
    };
18794
0
    let v21 = &C::gpr_mem_imm_new(ctx, &v20);
18795
0
    let v22 = &constructor_x64_test(ctx, &OperandSize::Size64, v21, arg1);
18796
0
    let v25 = constructor_imm(ctx, I64, 0x0);
18797
0
    let v26 = &C::reg_to_gpr_mem(ctx, v25);
18798
0
    let v27 = &constructor_cmove(ctx, I64, &CC::Z, v26, v17);
18799
0
    let v28 = constructor_with_flags_reg(ctx, v22, v27);
18800
0
    let v29 = C::gpr_new(ctx, v28);
18801
0
    let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
18802
0
    let v31 = constructor_x64_or(ctx, I64, v8, v30);
18803
0
    let v33 = &C::imm8_to_imm8_gpr(ctx, 0x3F);
18804
0
    let v34 = constructor_x64_sar(ctx, I64, v5, v33);
18805
0
    let v36 = RegMemImm::Imm {
18806
0
        simm32: 0x40,
18807
0
    };
18808
0
    let v37 = &C::gpr_mem_imm_new(ctx, &v36);
18809
0
    let v38 = &constructor_x64_test(ctx, &OperandSize::Size64, v37, arg1);
18810
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v31);
18811
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v10);
18812
0
    let v41 = &C::gpr_to_gpr_mem(ctx, v10);
18813
0
    let v42 = &constructor_cmove(ctx, I64, &CC::Z, v41, v34);
18814
0
    let v43 = &constructor_consumes_flags_concat(ctx, v40, v42);
18815
0
    let v44 = constructor_with_flags(ctx, v38, v43);
18816
0
    // Rule at src/isa/x64/lower.isle line 657.
18817
0
    return v44;
18818
0
}
18819
18820
// Generated as internal constructor for term sshr_i8x16_bigger_shift.
18821
0
pub fn constructor_sshr_i8x16_bigger_shift<C: Context>(
18822
0
    ctx: &mut C,
18823
0
    arg0: Type,
18824
0
    arg1: &RegMemImm,
18825
0
) -> XmmMemImm {
18826
0
    match arg1 {
18827
        &RegMemImm::Reg {
18828
0
            reg: v7,
18829
0
        } => {
18830
0
            let v8 = C::gpr_new(ctx, v7);
18831
0
            let v9 = RegMemImm::Imm {
18832
0
                simm32: 0x8,
18833
0
            };
18834
0
            let v10 = &C::gpr_mem_imm_new(ctx, &v9);
18835
0
            let v11 = constructor_x64_add(ctx, arg0, v8, v10);
18836
0
            let v12 = C::gpr_to_reg(ctx, v11);
18837
0
            let v13 = RegMemImm::Reg {
18838
0
                reg: v12,
18839
0
            };
18840
0
            let v14 = &constructor_mov_rmi_to_xmm(ctx, &v13);
18841
0
            // Rule at src/isa/x64/lower.isle line 725.
18842
0
            return v14.clone();
18843
        }
18844
        &RegMemImm::Mem {
18845
0
            addr: ref v15,
18846
0
        } => {
18847
0
            let v17 = constructor_imm(ctx, arg0, 0x8);
18848
0
            let v18 = C::gpr_new(ctx, v17);
18849
0
            let v19 = &C::gpr_mem_imm_new(ctx, arg1);
18850
0
            let v20 = constructor_x64_add(ctx, arg0, v18, v19);
18851
0
            let v21 = C::gpr_to_reg(ctx, v20);
18852
0
            let v22 = RegMemImm::Reg {
18853
0
                reg: v21,
18854
0
            };
18855
0
            let v23 = &constructor_mov_rmi_to_xmm(ctx, &v22);
18856
0
            // Rule at src/isa/x64/lower.isle line 729.
18857
0
            return v23.clone();
18858
        }
18859
        &RegMemImm::Imm {
18860
0
            simm32: v2,
18861
0
        } => {
18862
0
            let v4 = C::u32_add(ctx, v2, 0x8);
18863
0
            let v5 = RegMemImm::Imm {
18864
0
                simm32: v4,
18865
0
            };
18866
0
            let v6 = &C::xmm_mem_imm_new(ctx, &v5);
18867
0
            // Rule at src/isa/x64/lower.isle line 723.
18868
0
            return v6.clone();
18869
        }
18870
0
        _ => {}
18871
0
    }
18872
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sshr_i8x16_bigger_shift", "src/isa/x64/lower.isle line 722")
18873
0
}
18874
18875
// Generated as internal constructor for term lower_bmask.
18876
0
pub fn constructor_lower_bmask<C: Context>(
18877
0
    ctx: &mut C,
18878
0
    arg0: Type,
18879
0
    arg1: Type,
18880
0
    arg2: ValueRegs,
18881
0
) -> ValueRegs {
18882
0
    if arg0 == I128 {
18883
0
        let v23 = constructor_lower_bmask(ctx, I64, arg1, arg2);
18884
0
        let v24 = constructor_value_regs_get_gpr(ctx, v23, 0x0);
18885
0
        let v25 = C::gpr_to_reg(ctx, v24);
18886
0
        let v26 = C::gpr_to_reg(ctx, v24);
18887
0
        let v27 = C::value_regs(ctx, v25, v26);
18888
0
        // Rule at src/isa/x64/lower.isle line 1171.
18889
0
        return v27;
18890
0
    }
18891
0
    let v1 = C::fits_in_64(ctx, arg0);
18892
0
    if let Some(v2) = v1 {
18893
0
        if arg1 == I128 {
18894
0
            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
18895
0
            let v16 = constructor_value_regs_get_gpr(ctx, arg2, 0x1);
18896
0
            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v16);
18897
0
            let v19 = constructor_x64_or(ctx, I64, v8, v18);
18898
0
            let v20 = C::gpr_to_reg(ctx, v19);
18899
0
            let v21 = C::value_reg(ctx, v20);
18900
0
            let v22 = constructor_lower_bmask(ctx, v2, I64, v21);
18901
0
            // Rule at src/isa/x64/lower.isle line 1163.
18902
0
            return v22;
18903
0
        }
18904
0
        let v4 = C::fits_in_64(ctx, arg1);
18905
0
        if let Some(v5) = v4 {
18906
0
            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
18907
0
            let v9 = &constructor_x64_neg_paired(ctx, v5, v8);
18908
0
            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v8);
18909
0
            let v11 = &constructor_x64_sbb_paired(ctx, v2, v8, v10);
18910
0
            let v12 = constructor_with_flags(ctx, v9, v11);
18911
0
            let v14 = C::value_regs_get(ctx, v12, 0x1);
18912
0
            let v15 = C::value_reg(ctx, v14);
18913
0
            // Rule at src/isa/x64/lower.isle line 1152.
18914
0
            return v15;
18915
0
        }
18916
0
    }
18917
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_bmask", "src/isa/x64/lower.isle line 1140")
18918
0
}
18919
18920
// Generated as internal constructor for term i128_not.
18921
0
pub fn constructor_i128_not<C: Context>(
18922
0
    ctx: &mut C,
18923
0
    arg0: Value,
18924
0
) -> ValueRegs {
18925
0
    let v1 = C::put_in_regs(ctx, arg0);
18926
0
    let v3 = constructor_value_regs_get_gpr(ctx, v1, 0x0);
18927
0
    let v5 = constructor_value_regs_get_gpr(ctx, v1, 0x1);
18928
0
    let v7 = constructor_x64_not(ctx, I64, v3);
18929
0
    let v8 = constructor_x64_not(ctx, I64, v5);
18930
0
    let v9 = constructor_value_gprs(ctx, v7, v8);
18931
0
    // Rule at src/isa/x64/lower.isle line 1194.
18932
0
    return v9;
18933
0
}
18934
18935
// Generated as internal constructor for term all_ones_or_all_zeros.
18936
0
pub fn constructor_all_ones_or_all_zeros<C: Context>(
18937
0
    ctx: &mut C,
18938
0
    arg0: Value,
18939
0
) -> Option<bool> {
18940
0
    let v1 = C::def_inst(ctx, arg0);
18941
0
    if let Some(v2) = v1 {
18942
0
        let v3 = &C::inst_data(ctx, v2);
18943
0
        match v3 {
18944
            &InstructionData::FloatCompare {
18945
0
                opcode: ref v16,
18946
0
                args: ref v17,
18947
0
                cond: ref v18,
18948
0
            } => {
18949
0
                if let &Opcode::Fcmp = v16 {
18950
0
                    let v10 = C::value_type(ctx, arg0);
18951
0
                    let v11 = C::multi_lane(ctx, v10);
18952
0
                    if let Some(v12) = v11 {
18953
                        // Rule at src/isa/x64/lower.isle line 1242.
18954
0
                        return Some(true);
18955
0
                    }
18956
0
                }
18957
            }
18958
            &InstructionData::IntCompare {
18959
0
                opcode: ref v4,
18960
0
                args: ref v5,
18961
0
                cond: ref v6,
18962
0
            } => {
18963
0
                if let &Opcode::Icmp = v4 {
18964
0
                    let v10 = C::value_type(ctx, arg0);
18965
0
                    let v11 = C::multi_lane(ctx, v10);
18966
0
                    if let Some(v12) = v11 {
18967
                        // Rule at src/isa/x64/lower.isle line 1241.
18968
0
                        return Some(true);
18969
0
                    }
18970
0
                }
18971
            }
18972
            &InstructionData::UnaryConst {
18973
0
                opcode: ref v22,
18974
0
                constant_handle: v23,
18975
0
            } => {
18976
0
                if let &Opcode::Vconst = v22 {
18977
0
                    let v24 = C::vconst_all_ones_or_all_zeros(ctx, v23);
18978
0
                    if let Some(v25) = v24 {
18979
                        // Rule at src/isa/x64/lower.isle line 1243.
18980
0
                        return Some(true);
18981
0
                    }
18982
0
                }
18983
            }
18984
0
            _ => {}
18985
        }
18986
0
    }
18987
0
    None
18988
0
}
18989
18990
// Generated as internal constructor for term vec_insert_lane.
18991
0
pub fn constructor_vec_insert_lane<C: Context>(
18992
0
    ctx: &mut C,
18993
0
    arg0: Type,
18994
0
    arg1: Xmm,
18995
0
    arg2: &RegMem,
18996
0
    arg3: u8,
18997
0
) -> Xmm {
18998
0
    match arg0 {
18999
        I8X16 => {
19000
0
            let v4 = &C::reg_mem_to_gpr_mem(ctx, arg2);
19001
0
            let v5 = constructor_x64_pinsrb(ctx, arg1, v4, arg3);
19002
0
            // Rule at src/isa/x64/lower.isle line 1275.
19003
0
            return v5;
19004
        }
19005
        I16X8 => {
19006
0
            let v4 = &C::reg_mem_to_gpr_mem(ctx, arg2);
19007
0
            let v6 = constructor_x64_pinsrw(ctx, arg1, v4, arg3);
19008
0
            // Rule at src/isa/x64/lower.isle line 1279.
19009
0
            return v6;
19010
        }
19011
        I32X4 => {
19012
0
            let v4 = &C::reg_mem_to_gpr_mem(ctx, arg2);
19013
0
            let v7 = constructor_x64_pinsrd(ctx, arg1, v4, arg3);
19014
0
            // Rule at src/isa/x64/lower.isle line 1283.
19015
0
            return v7;
19016
        }
19017
        I64X2 => {
19018
0
            let v4 = &C::reg_mem_to_gpr_mem(ctx, arg2);
19019
0
            let v8 = constructor_x64_pinsrq(ctx, arg1, v4, arg3);
19020
0
            // Rule at src/isa/x64/lower.isle line 1287.
19021
0
            return v8;
19022
        }
19023
        F32X4 => {
19024
0
            let v9 = C::use_sse41(ctx);
19025
0
            if v9 == true {
19026
0
                let v10 = &C::reg_mem_to_xmm_mem(ctx, arg2);
19027
0
                let v11 = C::sse_insertps_lane_imm(ctx, arg3);
19028
0
                let v12 = constructor_x64_insertps(ctx, arg1, v10, v11);
19029
0
                // Rule at src/isa/x64/lower.isle line 1291.
19030
0
                return v12;
19031
0
            }
19032
0
            match arg2 {
19033
                &RegMem::Reg {
19034
0
                    reg: v13,
19035
0
                } => {
19036
0
                    match arg3 {
19037
                        0x0 => {
19038
0
                            let v14 = C::xmm_new(ctx, v13);
19039
0
                            let v15 = constructor_x64_movss_regmove(ctx, arg1, v14);
19040
0
                            // Rule at src/isa/x64/lower.isle line 1296.
19041
0
                            return v15;
19042
                        }
19043
                        0x1 => {
19044
0
                            let v14 = C::xmm_new(ctx, v13);
19045
0
                            let v16 = &C::xmm_to_xmm_mem(ctx, arg1);
19046
0
                            let v17 = constructor_x64_movlhps(ctx, v14, v16);
19047
0
                            let v18 = &C::xmm_to_xmm_mem(ctx, arg1);
19048
0
                            let v20 = constructor_x64_shufps(ctx, v17, v18, 0xE2);
19049
0
                            // Rule at src/isa/x64/lower.isle line 1302.
19050
0
                            return v20;
19051
                        }
19052
                        0x2 => {
19053
0
                            let v14 = C::xmm_new(ctx, v13);
19054
0
                            let v16 = &C::xmm_to_xmm_mem(ctx, arg1);
19055
0
                            let v22 = constructor_x64_shufps(ctx, v14, v16, 0x30);
19056
0
                            let v23 = &C::xmm_to_xmm_mem(ctx, v22);
19057
0
                            let v25 = constructor_x64_shufps(ctx, arg1, v23, 0x84);
19058
0
                            // Rule at src/isa/x64/lower.isle line 1309.
19059
0
                            return v25;
19060
                        }
19061
                        0x3 => {
19062
0
                            let v14 = C::xmm_new(ctx, v13);
19063
0
                            let v16 = &C::xmm_to_xmm_mem(ctx, arg1);
19064
0
                            let v27 = constructor_x64_shufps(ctx, v14, v16, 0xE4);
19065
0
                            let v28 = &C::xmm_to_xmm_mem(ctx, v27);
19066
0
                            let v30 = constructor_x64_shufps(ctx, arg1, v28, 0x24);
19067
0
                            // Rule at src/isa/x64/lower.isle line 1316.
19068
0
                            return v30;
19069
                        }
19070
0
                        _ => {}
19071
                    }
19072
                }
19073
                &RegMem::Mem {
19074
0
                    addr: ref v31,
19075
0
                } => {
19076
0
                    let v33 = constructor_x64_movss_load(ctx, v31);
19077
0
                    let v34 = C::xmm_to_reg(ctx, v33);
19078
0
                    let v35 = &constructor_xmm_to_reg_mem(ctx, v34);
19079
0
                    let v36 = &C::xmm_mem_to_reg_mem(ctx, v35);
19080
0
                    let v37 = constructor_vec_insert_lane(ctx, F32X4, arg1, v36, arg3);
19081
0
                    // Rule at src/isa/x64/lower.isle line 1321.
19082
0
                    return v37;
19083
                }
19084
0
                _ => {}
19085
            }
19086
        }
19087
        F64X2 => {
19088
0
            match arg3 {
19089
                0x0 => {
19090
0
                    match arg2 {
19091
                        &RegMem::Reg {
19092
0
                            reg: v13,
19093
0
                        } => {
19094
0
                            let v14 = C::xmm_new(ctx, v13);
19095
0
                            let v38 = constructor_x64_movsd_regmove(ctx, arg1, v14);
19096
0
                            // Rule at src/isa/x64/lower.isle line 1333.
19097
0
                            return v38;
19098
                        }
19099
                        &RegMem::Mem {
19100
0
                            addr: ref v31,
19101
0
                        } => {
19102
0
                            let v39 = constructor_x64_movsd_load(ctx, v31);
19103
0
                            let v40 = constructor_x64_movsd_regmove(ctx, arg1, v39);
19104
0
                            // Rule at src/isa/x64/lower.isle line 1335.
19105
0
                            return v40;
19106
                        }
19107
0
                        _ => {}
19108
                    }
19109
                }
19110
                0x1 => {
19111
0
                    let v10 = &C::reg_mem_to_xmm_mem(ctx, arg2);
19112
0
                    let v41 = constructor_x64_movlhps(ctx, arg1, v10);
19113
0
                    // Rule at src/isa/x64/lower.isle line 1343.
19114
0
                    return v41;
19115
                }
19116
0
                _ => {}
19117
            }
19118
        }
19119
0
        _ => {}
19120
    }
19121
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "vec_insert_lane", "src/isa/x64/lower.isle line 1272")
19122
0
}
19123
19124
// Generated as internal constructor for term cmp_and_choose.
19125
2.17k
pub fn constructor_cmp_and_choose<C: Context>(
19126
2.17k
    ctx: &mut C,
19127
2.17k
    arg0: Type,
19128
2.17k
    arg1: &CC,
19129
2.17k
    arg2: Value,
19130
2.17k
    arg3: Value,
19131
2.17k
) -> ValueRegs {
19132
2.17k
    let v1 = C::fits_in_64(ctx, arg0);
19133
2.17k
    if let Some(v2) = v1 {
19134
2.17k
        let v6 = &C::raw_operand_size_of_type(ctx, v2);
19135
2.17k
        let v7 = C::put_in_reg(ctx, arg2);
19136
2.17k
        let v8 = C::put_in_reg(ctx, arg3);
19137
2.17k
        let v9 = &constructor_reg_to_gpr_mem_imm(ctx, v7);
19138
2.17k
        let v10 = C::gpr_new(ctx, v8);
19139
2.17k
        let v11 = &constructor_x64_cmp(ctx, v6, v9, v10);
19140
2.17k
        let v12 = &C::reg_to_gpr_mem(ctx, v8);
19141
2.17k
        let v13 = C::gpr_new(ctx, v7);
19142
2.17k
        let v14 = &constructor_cmove(ctx, v2, arg1, v12, v13);
19143
2.17k
        let v15 = constructor_with_flags_reg(ctx, v11, v14);
19144
2.17k
        let v16 = C::value_reg(ctx, v15);
19145
2.17k
        // Rule at src/isa/x64/lower.isle line 1351.
19146
2.17k
        return v16;
19147
0
    }
19148
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmp_and_choose", "src/isa/x64/lower.isle line 1350")
19149
2.17k
}
19150
19151
// Generated as internal constructor for term has_pmins.
19152
0
pub fn constructor_has_pmins<C: Context>(
19153
0
    ctx: &mut C,
19154
0
    arg0: Type,
19155
0
) -> bool {
19156
0
    match arg0 {
19157
        I16X8 => {
19158
            // Rule at src/isa/x64/lower.isle line 1377.
19159
0
            return true;
19160
        }
19161
        I64X2 => {
19162
            // Rule at src/isa/x64/lower.isle line 1378.
19163
0
            return false;
19164
        }
19165
0
        _ => {}
19166
0
    }
19167
0
    let v3 = C::use_sse41(ctx);
19168
0
    // Rule at src/isa/x64/lower.isle line 1379.
19169
0
    return v3;
19170
0
}
19171
19172
// Generated as internal constructor for term has_pmaxs.
19173
0
pub fn constructor_has_pmaxs<C: Context>(
19174
0
    ctx: &mut C,
19175
0
    arg0: Type,
19176
0
) -> bool {
19177
0
    match arg0 {
19178
        I16X8 => {
19179
            // Rule at src/isa/x64/lower.isle line 1382.
19180
0
            return true;
19181
        }
19182
        I64X2 => {
19183
            // Rule at src/isa/x64/lower.isle line 1383.
19184
0
            return false;
19185
        }
19186
0
        _ => {}
19187
0
    }
19188
0
    let v3 = C::use_sse41(ctx);
19189
0
    // Rule at src/isa/x64/lower.isle line 1384.
19190
0
    return v3;
19191
0
}
19192
19193
// Generated as internal constructor for term has_pmaxu.
19194
0
pub fn constructor_has_pmaxu<C: Context>(
19195
0
    ctx: &mut C,
19196
0
    arg0: Type,
19197
0
) -> bool {
19198
0
    match arg0 {
19199
        I8X16 => {
19200
            // Rule at src/isa/x64/lower.isle line 1387.
19201
0
            return true;
19202
        }
19203
        I64X2 => {
19204
            // Rule at src/isa/x64/lower.isle line 1388.
19205
0
            return false;
19206
        }
19207
0
        _ => {}
19208
0
    }
19209
0
    let v3 = C::use_sse41(ctx);
19210
0
    // Rule at src/isa/x64/lower.isle line 1389.
19211
0
    return v3;
19212
0
}
19213
19214
// Generated as internal constructor for term has_pminu.
19215
0
pub fn constructor_has_pminu<C: Context>(
19216
0
    ctx: &mut C,
19217
0
    arg0: Type,
19218
0
) -> bool {
19219
0
    match arg0 {
19220
        I8X16 => {
19221
            // Rule at src/isa/x64/lower.isle line 1392.
19222
0
            return true;
19223
        }
19224
        I64X2 => {
19225
            // Rule at src/isa/x64/lower.isle line 1393.
19226
0
            return false;
19227
        }
19228
0
        _ => {}
19229
0
    }
19230
0
    let v3 = C::use_sse41(ctx);
19231
0
    // Rule at src/isa/x64/lower.isle line 1394.
19232
0
    return v3;
19233
0
}
19234
19235
// Generated as internal constructor for term flip_high_bit_mask.
19236
0
pub fn constructor_flip_high_bit_mask<C: Context>(
19237
0
    ctx: &mut C,
19238
0
    arg0: Type,
19239
0
) -> Xmm {
19240
0
    match arg0 {
19241
        I16X8 => {
19242
0
            let v2 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
19243
0
            let v3 = &constructor_const_to_xmm_mem(ctx, v2);
19244
0
            let v4 = constructor_x64_movdqu_load(ctx, v3);
19245
0
            // Rule at src/isa/x64/lower.isle line 1457.
19246
0
            return v4;
19247
        }
19248
        I32X4 => {
19249
0
            let v6 = C::emit_u128_le_const(ctx, 0x80000000800000008000000080000000);
19250
0
            let v7 = &constructor_const_to_xmm_mem(ctx, v6);
19251
0
            let v8 = constructor_x64_movdqu_load(ctx, v7);
19252
0
            // Rule at src/isa/x64/lower.isle line 1459.
19253
0
            return v8;
19254
        }
19255
        I64X2 => {
19256
0
            let v10 = C::emit_u128_le_const(ctx, 0x80000000000000008000000000000000);
19257
0
            let v11 = &constructor_const_to_xmm_mem(ctx, v10);
19258
0
            let v12 = constructor_x64_movdqu_load(ctx, v11);
19259
0
            // Rule at src/isa/x64/lower.isle line 1461.
19260
0
            return v12;
19261
        }
19262
0
        _ => {}
19263
0
    }
19264
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "flip_high_bit_mask", "src/isa/x64/lower.isle line 1456")
19265
0
}
19266
19267
// Generated as internal constructor for term lower_select_fcmp.
19268
0
pub fn constructor_lower_select_fcmp<C: Context>(
19269
0
    ctx: &mut C,
19270
0
    arg0: Type,
19271
0
    arg1: &FcmpCondResult,
19272
0
    arg2: Value,
19273
0
    arg3: Value,
19274
0
) -> InstOutput {
19275
0
    match arg1 {
19276
        &FcmpCondResult::Condition {
19277
0
            producer: ref v2,
19278
0
            cc: ref v3,
19279
0
        } => {
19280
0
            let v6 = &constructor_cmove_from_values(ctx, arg0, v3, arg2, arg3);
19281
0
            let v7 = constructor_with_flags(ctx, v2, v6);
19282
0
            let v8 = C::output(ctx, v7);
19283
0
            // Rule at src/isa/x64/lower.isle line 1780.
19284
0
            return v8;
19285
        }
19286
        &FcmpCondResult::OrCondition {
19287
0
            producer: ref v9,
19288
0
            cc1: ref v10,
19289
0
            cc2: ref v11,
19290
0
        } => {
19291
0
            let v12 = &constructor_cmove_or_from_values(ctx, arg0, v10, v11, arg2, arg3);
19292
0
            let v13 = constructor_with_flags(ctx, v9, v12);
19293
0
            let v14 = C::output(ctx, v13);
19294
0
            // Rule at src/isa/x64/lower.isle line 1782.
19295
0
            return v14;
19296
        }
19297
0
        _ => {}
19298
0
    }
19299
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_select_fcmp", "src/isa/x64/lower.isle line 1779")
19300
0
}
19301
19302
// Generated as internal constructor for term do_clz.
19303
0
pub fn constructor_do_clz<C: Context>(
19304
0
    ctx: &mut C,
19305
0
    arg0: Type,
19306
0
    arg1: Type,
19307
0
    arg2: Gpr,
19308
0
) -> Gpr {
19309
0
    let v5 = constructor_imm_i64(ctx, I64, -0x1);
19310
0
    let v6 = C::gpr_new(ctx, v5);
19311
0
    let v7 = constructor_bsr_or_else(ctx, arg0, arg2, v6);
19312
0
    let v8 = C::gpr_to_reg(ctx, v7);
19313
0
    let v9 = C::ty_bits_u64(ctx, arg1);
19314
0
    let v11 = C::u64_sub(ctx, v9, 0x1);
19315
0
    let v12 = constructor_imm(ctx, arg0, v11);
19316
0
    let v13 = C::gpr_new(ctx, v12);
19317
0
    let v14 = &constructor_reg_to_gpr_mem_imm(ctx, v8);
19318
0
    let v15 = constructor_x64_sub(ctx, arg0, v13, v14);
19319
0
    // Rule at src/isa/x64/lower.isle line 1848.
19320
0
    return v15;
19321
0
}
19322
19323
// Generated as internal constructor for term do_ctz.
19324
0
pub fn constructor_do_ctz<C: Context>(
19325
0
    ctx: &mut C,
19326
0
    arg0: Type,
19327
0
    arg1: Type,
19328
0
    arg2: Gpr,
19329
0
) -> Gpr {
19330
0
    let v4 = C::ty_bits_u64(ctx, arg1);
19331
0
    let v5 = constructor_imm(ctx, I64, v4);
19332
0
    let v6 = C::gpr_new(ctx, v5);
19333
0
    let v7 = constructor_bsf_or_else(ctx, arg0, arg2, v6);
19334
0
    // Rule at src/isa/x64/lower.isle line 1891.
19335
0
    return v7;
19336
0
}
19337
19338
// Generated as internal constructor for term do_popcnt.
19339
0
pub fn constructor_do_popcnt<C: Context>(
19340
0
    ctx: &mut C,
19341
0
    arg0: Type,
19342
0
    arg1: Gpr,
19343
0
) -> Gpr {
19344
0
    match arg0 {
19345
        I32 => {
19346
0
            let v4 = Imm8Reg::Imm8 {
19347
0
                imm: 0x1,
19348
0
            };
19349
0
            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
19350
0
            let v47 = constructor_x64_shr(ctx, I32, arg1, v5);
19351
0
            let v49 = constructor_imm(ctx, I32, 0x77777777);
19352
0
            let v50 = C::gpr_new(ctx, v49);
19353
0
            let v51 = &C::gpr_to_gpr_mem_imm(ctx, v50);
19354
0
            let v52 = constructor_x64_and(ctx, I32, v47, v51);
19355
0
            let v53 = &C::gpr_to_gpr_mem_imm(ctx, v52);
19356
0
            let v54 = constructor_x64_sub(ctx, I32, arg1, v53);
19357
0
            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
19358
0
            let v55 = constructor_x64_shr(ctx, I32, v52, v14);
19359
0
            let v56 = &C::gpr_to_gpr_mem_imm(ctx, v50);
19360
0
            let v57 = constructor_x64_and(ctx, I32, v55, v56);
19361
0
            let v58 = &C::gpr_to_gpr_mem_imm(ctx, v57);
19362
0
            let v59 = constructor_x64_sub(ctx, I32, v54, v58);
19363
0
            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
19364
0
            let v60 = constructor_x64_shr(ctx, I32, v57, v20);
19365
0
            let v61 = &C::gpr_to_gpr_mem_imm(ctx, v50);
19366
0
            let v62 = constructor_x64_and(ctx, I32, v60, v61);
19367
0
            let v63 = &C::gpr_to_gpr_mem_imm(ctx, v62);
19368
0
            let v64 = constructor_x64_sub(ctx, I32, v59, v63);
19369
0
            let v27 = Imm8Reg::Imm8 {
19370
0
                imm: 0x4,
19371
0
            };
19372
0
            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
19373
0
            let v65 = constructor_x64_shr(ctx, I32, v64, v28);
19374
0
            let v66 = &C::gpr_to_gpr_mem_imm(ctx, v64);
19375
0
            let v67 = constructor_x64_add(ctx, I32, v65, v66);
19376
0
            let v69 = RegMemImm::Imm {
19377
0
                simm32: 0xF0F0F0F,
19378
0
            };
19379
0
            let v70 = &C::gpr_mem_imm_new(ctx, &v69);
19380
0
            let v71 = constructor_x64_and(ctx, I32, v67, v70);
19381
0
            let v73 = RegMemImm::Imm {
19382
0
                simm32: 0x1010101,
19383
0
            };
19384
0
            let v74 = &C::gpr_mem_imm_new(ctx, &v73);
19385
0
            let v75 = constructor_x64_mul(ctx, I32, v71, v74);
19386
0
            let v77 = Imm8Reg::Imm8 {
19387
0
                imm: 0x18,
19388
0
            };
19389
0
            let v78 = &C::imm8_reg_to_imm8_gpr(ctx, &v77);
19390
0
            let v79 = constructor_x64_shr(ctx, I32, v75, v78);
19391
0
            // Rule at src/isa/x64/lower.isle line 1982.
19392
0
            return v79;
19393
        }
19394
        I64 => {
19395
0
            let v4 = Imm8Reg::Imm8 {
19396
0
                imm: 0x1,
19397
0
            };
19398
0
            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
19399
0
            let v6 = constructor_x64_shr(ctx, I64, arg1, v5);
19400
0
            let v8 = constructor_imm(ctx, I64, 0x7777777777777777);
19401
0
            let v9 = C::gpr_new(ctx, v8);
19402
0
            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v9);
19403
0
            let v11 = constructor_x64_and(ctx, I64, v6, v10);
19404
0
            let v12 = &C::gpr_to_gpr_mem_imm(ctx, v11);
19405
0
            let v13 = constructor_x64_sub(ctx, I64, arg1, v12);
19406
0
            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
19407
0
            let v15 = constructor_x64_shr(ctx, I64, v11, v14);
19408
0
            let v16 = &C::gpr_to_gpr_mem_imm(ctx, v9);
19409
0
            let v17 = constructor_x64_and(ctx, I64, v15, v16);
19410
0
            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v17);
19411
0
            let v19 = constructor_x64_sub(ctx, I64, v13, v18);
19412
0
            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
19413
0
            let v21 = constructor_x64_shr(ctx, I64, v17, v20);
19414
0
            let v22 = &C::gpr_to_gpr_mem_imm(ctx, v9);
19415
0
            let v23 = constructor_x64_and(ctx, I64, v21, v22);
19416
0
            let v24 = &C::gpr_to_gpr_mem_imm(ctx, v23);
19417
0
            let v25 = constructor_x64_sub(ctx, I64, v19, v24);
19418
0
            let v27 = Imm8Reg::Imm8 {
19419
0
                imm: 0x4,
19420
0
            };
19421
0
            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
19422
0
            let v29 = constructor_x64_shr(ctx, I64, v25, v28);
19423
0
            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v25);
19424
0
            let v31 = constructor_x64_add(ctx, I64, v29, v30);
19425
0
            let v33 = constructor_imm(ctx, I64, 0xF0F0F0F0F0F0F0F);
19426
0
            let v34 = C::gpr_new(ctx, v33);
19427
0
            let v35 = &C::gpr_to_gpr_mem_imm(ctx, v34);
19428
0
            let v36 = constructor_x64_and(ctx, I64, v31, v35);
19429
0
            let v38 = constructor_imm(ctx, I64, 0x101010101010101);
19430
0
            let v39 = C::gpr_new(ctx, v38);
19431
0
            let v40 = &C::gpr_to_gpr_mem_imm(ctx, v39);
19432
0
            let v41 = constructor_x64_mul(ctx, I64, v36, v40);
19433
0
            let v43 = Imm8Reg::Imm8 {
19434
0
                imm: 0x38,
19435
0
            };
19436
0
            let v44 = &C::imm8_reg_to_imm8_gpr(ctx, &v43);
19437
0
            let v45 = constructor_x64_shr(ctx, I64, v41, v44);
19438
0
            // Rule at src/isa/x64/lower.isle line 1939.
19439
0
            return v45;
19440
        }
19441
0
        _ => {}
19442
0
    }
19443
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "do_popcnt", "src/isa/x64/lower.isle line 1938")
19444
0
}
19445
19446
// Generated as internal constructor for term do_bitrev8.
19447
0
pub fn constructor_do_bitrev8<C: Context>(
19448
0
    ctx: &mut C,
19449
0
    arg0: Type,
19450
0
    arg1: Gpr,
19451
0
) -> Gpr {
19452
0
    let v2 = C::ty_mask(ctx, arg0);
19453
0
    let v4 = C::u64_and(ctx, v2, 0x5555555555555555);
19454
0
    let v5 = constructor_imm(ctx, arg0, v4);
19455
0
    let v6 = C::gpr_new(ctx, v5);
19456
0
    let v7 = &C::gpr_to_gpr_mem_imm(ctx, v6);
19457
0
    let v8 = constructor_x64_and(ctx, arg0, arg1, v7);
19458
0
    let v10 = Imm8Reg::Imm8 {
19459
0
        imm: 0x1,
19460
0
    };
19461
0
    let v11 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
19462
0
    let v12 = constructor_x64_shr(ctx, arg0, arg1, v11);
19463
0
    let v13 = &C::gpr_to_gpr_mem_imm(ctx, v6);
19464
0
    let v14 = constructor_x64_and(ctx, arg0, v12, v13);
19465
0
    let v15 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
19466
0
    let v16 = constructor_x64_shl(ctx, arg0, v8, v15);
19467
0
    let v17 = &C::gpr_to_gpr_mem_imm(ctx, v14);
19468
0
    let v18 = constructor_x64_or(ctx, arg0, v16, v17);
19469
0
    let v20 = C::u64_and(ctx, v2, 0x3333333333333333);
19470
0
    let v21 = constructor_imm(ctx, arg0, v20);
19471
0
    let v22 = C::gpr_new(ctx, v21);
19472
0
    let v23 = &C::gpr_to_gpr_mem_imm(ctx, v22);
19473
0
    let v24 = constructor_x64_and(ctx, arg0, v18, v23);
19474
0
    let v26 = Imm8Reg::Imm8 {
19475
0
        imm: 0x2,
19476
0
    };
19477
0
    let v27 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
19478
0
    let v28 = constructor_x64_shr(ctx, arg0, v18, v27);
19479
0
    let v29 = &C::gpr_to_gpr_mem_imm(ctx, v22);
19480
0
    let v30 = constructor_x64_and(ctx, arg0, v28, v29);
19481
0
    let v31 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
19482
0
    let v32 = constructor_x64_shl(ctx, arg0, v24, v31);
19483
0
    let v33 = &C::gpr_to_gpr_mem_imm(ctx, v30);
19484
0
    let v34 = constructor_x64_or(ctx, arg0, v32, v33);
19485
0
    let v36 = C::u64_and(ctx, v2, 0xF0F0F0F0F0F0F0F);
19486
0
    let v37 = constructor_imm(ctx, arg0, v36);
19487
0
    let v38 = C::gpr_new(ctx, v37);
19488
0
    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
19489
0
    let v40 = constructor_x64_and(ctx, arg0, v34, v39);
19490
0
    let v42 = Imm8Reg::Imm8 {
19491
0
        imm: 0x4,
19492
0
    };
19493
0
    let v43 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
19494
0
    let v44 = constructor_x64_shr(ctx, arg0, v34, v43);
19495
0
    let v45 = &C::gpr_to_gpr_mem_imm(ctx, v38);
19496
0
    let v46 = constructor_x64_and(ctx, arg0, v44, v45);
19497
0
    let v47 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
19498
0
    let v48 = constructor_x64_shl(ctx, arg0, v40, v47);
19499
0
    let v49 = &C::gpr_to_gpr_mem_imm(ctx, v46);
19500
0
    let v50 = constructor_x64_or(ctx, arg0, v48, v49);
19501
0
    // Rule at src/isa/x64/lower.isle line 2071.
19502
0
    return v50;
19503
0
}
19504
19505
// Generated as internal constructor for term do_bitrev16.
19506
0
pub fn constructor_do_bitrev16<C: Context>(
19507
0
    ctx: &mut C,
19508
0
    arg0: Type,
19509
0
    arg1: Gpr,
19510
0
) -> Gpr {
19511
0
    let v2 = constructor_do_bitrev8(ctx, arg0, arg1);
19512
0
    let v3 = C::ty_mask(ctx, arg0);
19513
0
    let v5 = C::u64_and(ctx, v3, 0xFF00FF00FF00FF);
19514
0
    let v6 = constructor_imm(ctx, arg0, v5);
19515
0
    let v7 = C::gpr_new(ctx, v6);
19516
0
    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19517
0
    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
19518
0
    let v11 = Imm8Reg::Imm8 {
19519
0
        imm: 0x8,
19520
0
    };
19521
0
    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
19522
0
    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
19523
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19524
0
    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
19525
0
    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
19526
0
    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
19527
0
    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
19528
0
    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
19529
0
    // Rule at src/isa/x64/lower.isle line 2094.
19530
0
    return v19;
19531
0
}
19532
19533
// Generated as internal constructor for term do_bitrev32.
19534
0
pub fn constructor_do_bitrev32<C: Context>(
19535
0
    ctx: &mut C,
19536
0
    arg0: Type,
19537
0
    arg1: Gpr,
19538
0
) -> Gpr {
19539
0
    let v2 = constructor_do_bitrev16(ctx, arg0, arg1);
19540
0
    let v3 = C::ty_mask(ctx, arg0);
19541
0
    let v5 = C::u64_and(ctx, v3, 0xFFFF0000FFFF);
19542
0
    let v6 = constructor_imm(ctx, arg0, v5);
19543
0
    let v7 = C::gpr_new(ctx, v6);
19544
0
    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19545
0
    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
19546
0
    let v11 = Imm8Reg::Imm8 {
19547
0
        imm: 0x10,
19548
0
    };
19549
0
    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
19550
0
    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
19551
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19552
0
    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
19553
0
    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
19554
0
    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
19555
0
    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
19556
0
    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
19557
0
    // Rule at src/isa/x64/lower.isle line 2106.
19558
0
    return v19;
19559
0
}
19560
19561
// Generated as internal constructor for term do_bitrev64.
19562
0
pub fn constructor_do_bitrev64<C: Context>(
19563
0
    ctx: &mut C,
19564
0
    arg0: Type,
19565
0
    arg1: Gpr,
19566
0
) -> Gpr {
19567
0
    if arg0 == I64 {
19568
0
        let v2 = constructor_do_bitrev32(ctx, arg0, arg1);
19569
0
        let v4 = constructor_imm(ctx, arg0, 0xFFFFFFFF);
19570
0
        let v5 = C::gpr_new(ctx, v4);
19571
0
        let v6 = &C::gpr_to_gpr_mem_imm(ctx, v5);
19572
0
        let v7 = constructor_x64_and(ctx, arg0, v2, v6);
19573
0
        let v9 = Imm8Reg::Imm8 {
19574
0
            imm: 0x20,
19575
0
        };
19576
0
        let v10 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
19577
0
        let v11 = constructor_x64_shr(ctx, arg0, v2, v10);
19578
0
        let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
19579
0
        let v13 = constructor_x64_shl(ctx, arg0, v7, v12);
19580
0
        let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
19581
0
        let v15 = constructor_x64_or(ctx, arg0, v13, v14);
19582
0
        // Rule at src/isa/x64/lower.isle line 2118.
19583
0
        return v15;
19584
0
    }
19585
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "do_bitrev64", "src/isa/x64/lower.isle line 2117")
19586
0
}
19587
19588
// Generated as internal constructor for term fmadd.
19589
0
pub fn constructor_fmadd<C: Context>(
19590
0
    ctx: &mut C,
19591
0
    arg0: Type,
19592
0
    arg1: Value,
19593
0
    arg2: Value,
19594
0
    arg3: Value,
19595
0
) -> Xmm {
19596
0
    let v24 = C::def_inst(ctx, arg2);
19597
0
    if let Some(v25) = v24 {
19598
0
        let v26 = &C::inst_data(ctx, v25);
19599
        if let &InstructionData::Unary {
19600
0
            opcode: ref v27,
19601
0
            arg: v28,
19602
0
        } = v26 {
19603
0
            if let &Opcode::Fneg = v27 {
19604
0
                let v29 = constructor_fnmadd(ctx, arg0, arg1, v28, arg3);
19605
0
                // Rule at src/isa/x64/lower.isle line 2573.
19606
0
                return v29;
19607
0
            }
19608
0
        }
19609
0
    }
19610
0
    let v18 = C::def_inst(ctx, arg1);
19611
0
    if let Some(v19) = v18 {
19612
0
        let v20 = &C::inst_data(ctx, v19);
19613
        if let &InstructionData::Unary {
19614
0
            opcode: ref v21,
19615
0
            arg: v22,
19616
0
        } = v20 {
19617
0
            if let &Opcode::Fneg = v21 {
19618
0
                let v23 = constructor_fnmadd(ctx, arg0, v22, arg2, arg3);
19619
0
                // Rule at src/isa/x64/lower.isle line 2572.
19620
0
                return v23;
19621
0
            }
19622
0
        }
19623
0
    }
19624
0
    let v14 = &C::sinkable_load(ctx, arg2);
19625
0
    if let Some(v15) = v14 {
19626
0
        let v4 = constructor_put_in_xmm(ctx, arg1);
19627
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
19628
0
        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
19629
0
        let v17 = constructor_x64_vfmadd132(ctx, arg0, v4, v11, v16);
19630
0
        // Rule at src/isa/x64/lower.isle line 2568.
19631
0
        return v17;
19632
0
    }
19633
0
    let v8 = &C::sinkable_load(ctx, arg1);
19634
0
    if let Some(v9) = v8 {
19635
0
        let v10 = constructor_put_in_xmm(ctx, arg2);
19636
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
19637
0
        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
19638
0
        let v13 = constructor_x64_vfmadd132(ctx, arg0, v10, v11, v12);
19639
0
        // Rule at src/isa/x64/lower.isle line 2567.
19640
0
        return v13;
19641
0
    }
19642
0
    let v4 = constructor_put_in_xmm(ctx, arg1);
19643
0
    let v5 = constructor_put_in_xmm(ctx, arg2);
19644
0
    let v6 = &C::put_in_xmm_mem(ctx, arg3);
19645
0
    let v7 = constructor_x64_vfmadd213(ctx, arg0, v4, v5, v6);
19646
0
    // Rule at src/isa/x64/lower.isle line 2562.
19647
0
    return v7;
19648
0
}
19649
19650
// Generated as internal constructor for term fnmadd.
19651
0
pub fn constructor_fnmadd<C: Context>(
19652
0
    ctx: &mut C,
19653
0
    arg0: Type,
19654
0
    arg1: Value,
19655
0
    arg2: Value,
19656
0
    arg3: Value,
19657
0
) -> Xmm {
19658
0
    let v24 = C::def_inst(ctx, arg2);
19659
0
    if let Some(v25) = v24 {
19660
0
        let v26 = &C::inst_data(ctx, v25);
19661
        if let &InstructionData::Unary {
19662
0
            opcode: ref v27,
19663
0
            arg: v28,
19664
0
        } = v26 {
19665
0
            if let &Opcode::Fneg = v27 {
19666
0
                let v29 = constructor_fmadd(ctx, arg0, arg1, v28, arg3);
19667
0
                // Rule at src/isa/x64/lower.isle line 2581.
19668
0
                return v29;
19669
0
            }
19670
0
        }
19671
0
    }
19672
0
    let v18 = C::def_inst(ctx, arg1);
19673
0
    if let Some(v19) = v18 {
19674
0
        let v20 = &C::inst_data(ctx, v19);
19675
        if let &InstructionData::Unary {
19676
0
            opcode: ref v21,
19677
0
            arg: v22,
19678
0
        } = v20 {
19679
0
            if let &Opcode::Fneg = v21 {
19680
0
                let v23 = constructor_fmadd(ctx, arg0, v22, arg2, arg3);
19681
0
                // Rule at src/isa/x64/lower.isle line 2580.
19682
0
                return v23;
19683
0
            }
19684
0
        }
19685
0
    }
19686
0
    let v14 = &C::sinkable_load(ctx, arg2);
19687
0
    if let Some(v15) = v14 {
19688
0
        let v4 = constructor_put_in_xmm(ctx, arg1);
19689
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
19690
0
        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
19691
0
        let v17 = constructor_x64_vfnmadd132(ctx, arg0, v4, v11, v16);
19692
0
        // Rule at src/isa/x64/lower.isle line 2577.
19693
0
        return v17;
19694
0
    }
19695
0
    let v8 = &C::sinkable_load(ctx, arg1);
19696
0
    if let Some(v9) = v8 {
19697
0
        let v10 = constructor_put_in_xmm(ctx, arg2);
19698
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
19699
0
        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
19700
0
        let v13 = constructor_x64_vfnmadd132(ctx, arg0, v10, v11, v12);
19701
0
        // Rule at src/isa/x64/lower.isle line 2576.
19702
0
        return v13;
19703
0
    }
19704
0
    let v4 = constructor_put_in_xmm(ctx, arg1);
19705
0
    let v5 = constructor_put_in_xmm(ctx, arg2);
19706
0
    let v6 = &C::put_in_xmm_mem(ctx, arg3);
19707
0
    let v7 = constructor_x64_vfnmadd213(ctx, arg0, v4, v5, v6);
19708
0
    // Rule at src/isa/x64/lower.isle line 2575.
19709
0
    return v7;
19710
0
}
19711
19712
// Generated as internal constructor for term cmp_zero_i128.
19713
0
pub fn constructor_cmp_zero_i128<C: Context>(
19714
0
    ctx: &mut C,
19715
0
    arg0: &CC,
19716
0
    arg1: ValueRegs,
19717
0
) -> IcmpCondResult {
19718
0
    let v1 = &C::cc_nz_or_z(ctx, arg0);
19719
0
    if let Some(v2) = v1 {
19720
0
        let v5 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
19721
0
        let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
19722
0
        let v10 = RegMemImm::Imm {
19723
0
            simm32: 0x0,
19724
0
        };
19725
0
        let v11 = &C::gpr_mem_imm_new(ctx, &v10);
19726
0
        let v12 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v11, v5);
19727
0
        let v14 = &constructor_x64_setcc(ctx, &CC::Z);
19728
0
        let v15 = constructor_with_flags_reg(ctx, v12, v14);
19729
0
        let v16 = C::gpr_new(ctx, v15);
19730
0
        let v17 = &C::gpr_mem_imm_new(ctx, &v10);
19731
0
        let v18 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v17, v7);
19732
0
        let v19 = &constructor_x64_setcc(ctx, &CC::Z);
19733
0
        let v20 = constructor_with_flags_reg(ctx, v18, v19);
19734
0
        let v21 = C::gpr_new(ctx, v20);
19735
0
        let v23 = &C::gpr_to_gpr_mem_imm(ctx, v16);
19736
0
        let v24 = &constructor_x64_test(ctx, &OperandSize::Size8, v23, v21);
19737
0
        let v25 = &constructor_icmp_cond_result(ctx, v24, v2);
19738
0
        // Rule at src/isa/x64/lower.isle line 3032.
19739
0
        return v25.clone();
19740
0
    }
19741
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmp_zero_i128", "src/isa/x64/lower.isle line 3031")
19742
0
}
19743
19744
// Generated as internal constructor for term cmp_zero_int_bool_ref.
19745
83.8k
pub fn constructor_cmp_zero_int_bool_ref<C: Context>(
19746
83.8k
    ctx: &mut C,
19747
83.8k
    arg0: Value,
19748
83.8k
) -> ProducesFlags {
19749
83.8k
    let v1 = C::value_type(ctx, arg0);
19750
83.8k
    let v2 = &C::raw_operand_size_of_type(ctx, v1);
19751
83.8k
    let v3 = constructor_put_in_gpr(ctx, arg0);
19752
83.8k
    let v4 = &C::gpr_to_gpr_mem_imm(ctx, v3);
19753
83.8k
    let v5 = &constructor_x64_test(ctx, v2, v4, v3);
19754
83.8k
    // Rule at src/isa/x64/lower.isle line 3043.
19755
83.8k
    return v5.clone();
19756
83.8k
}
19757
19758
// Generated as internal constructor for term lower_swiden_low.
19759
0
pub fn constructor_lower_swiden_low<C: Context>(
19760
0
    ctx: &mut C,
19761
0
    arg0: Type,
19762
0
    arg1: Xmm,
19763
0
) -> Xmm {
19764
0
    match arg0 {
19765
        I16X8 => {
19766
0
            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
19767
0
            let v3 = constructor_x64_punpcklbw(ctx, arg1, v2);
19768
0
            let v5 = &C::xmi_imm(ctx, 0x8);
19769
0
            let v6 = constructor_x64_psraw(ctx, v3, v5);
19770
0
            // Rule at src/isa/x64/lower.isle line 3383.
19771
0
            return v6;
19772
        }
19773
        I32X4 => {
19774
0
            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
19775
0
            let v7 = constructor_x64_punpcklwd(ctx, arg1, v2);
19776
0
            let v9 = &C::xmi_imm(ctx, 0x10);
19777
0
            let v10 = constructor_x64_psrad(ctx, v7, v9);
19778
0
            // Rule at src/isa/x64/lower.isle line 3385.
19779
0
            return v10;
19780
        }
19781
        I64X2 => {
19782
0
            let v12 = constructor_xmm_zero(ctx, I32X4);
19783
0
            let v13 = &C::xmm_to_xmm_mem(ctx, arg1);
19784
0
            let v14 = constructor_x64_pcmpgtd(ctx, v12, v13);
19785
0
            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
19786
0
            let v16 = constructor_x64_punpckldq(ctx, arg1, v15);
19787
0
            // Rule at src/isa/x64/lower.isle line 3391.
19788
0
            return v16;
19789
        }
19790
0
        _ => {}
19791
0
    }
19792
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_swiden_low", "src/isa/x64/lower.isle line 3378")
19793
0
}
19794
19795
// Generated as internal constructor for term lower_uwiden_low.
19796
0
pub fn constructor_lower_uwiden_low<C: Context>(
19797
0
    ctx: &mut C,
19798
0
    arg0: Type,
19799
0
    arg1: Xmm,
19800
0
) -> Xmm {
19801
0
    match arg0 {
19802
        I16X8 => {
19803
0
            let v3 = constructor_xmm_zero(ctx, I8X16);
19804
0
            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
19805
0
            let v5 = constructor_x64_punpcklbw(ctx, arg1, v4);
19806
0
            // Rule at src/isa/x64/lower.isle line 3444.
19807
0
            return v5;
19808
        }
19809
        I32X4 => {
19810
0
            let v3 = constructor_xmm_zero(ctx, I8X16);
19811
0
            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
19812
0
            let v6 = constructor_x64_punpcklwd(ctx, arg1, v4);
19813
0
            // Rule at src/isa/x64/lower.isle line 3445.
19814
0
            return v6;
19815
        }
19816
        I64X2 => {
19817
0
            let v8 = constructor_xmm_zero(ctx, F32X4);
19818
0
            let v9 = &C::xmm_to_xmm_mem(ctx, v8);
19819
0
            let v10 = constructor_x64_unpcklps(ctx, arg1, v9);
19820
0
            // Rule at src/isa/x64/lower.isle line 3446.
19821
0
            return v10;
19822
        }
19823
0
        _ => {}
19824
0
    }
19825
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_uwiden_low", "src/isa/x64/lower.isle line 3443")
19826
0
}
19827
19828
// Generated as internal constructor for term x64_round.
19829
0
pub fn constructor_x64_round<C: Context>(
19830
0
    ctx: &mut C,
19831
0
    arg0: Type,
19832
0
    arg1: Value,
19833
0
    arg2: &RoundImm,
19834
0
) -> Xmm {
19835
0
    match arg0 {
19836
        F32 => {
19837
0
            let v3 = C::use_sse41(ctx);
19838
0
            if v3 == true {
19839
0
                let v4 = &C::put_in_xmm_mem(ctx, arg1);
19840
0
                let v5 = constructor_x64_roundss(ctx, v4, arg2);
19841
0
                // Rule at src/isa/x64/lower.isle line 3553.
19842
0
                return v5;
19843
0
            }
19844
0
            let v10 = &constructor_round_libcall(ctx, F32, arg2);
19845
0
            let v11 = C::put_in_reg(ctx, arg1);
19846
0
            let v12 = C::libcall_1(ctx, v10, v11);
19847
0
            let v13 = C::xmm_new(ctx, v12);
19848
0
            // Rule at src/isa/x64/lower.isle line 3566.
19849
0
            return v13;
19850
        }
19851
        F64 => {
19852
0
            let v3 = C::use_sse41(ctx);
19853
0
            if v3 == true {
19854
0
                let v4 = &C::put_in_xmm_mem(ctx, arg1);
19855
0
                let v6 = constructor_x64_roundsd(ctx, v4, arg2);
19856
0
                // Rule at src/isa/x64/lower.isle line 3556.
19857
0
                return v6;
19858
0
            }
19859
0
            let v15 = &constructor_round_libcall(ctx, F64, arg2);
19860
0
            let v11 = C::put_in_reg(ctx, arg1);
19861
0
            let v16 = C::libcall_1(ctx, v15, v11);
19862
0
            let v17 = C::xmm_new(ctx, v16);
19863
0
            // Rule at src/isa/x64/lower.isle line 3567.
19864
0
            return v17;
19865
        }
19866
        F32X4 => {
19867
0
            let v3 = C::use_sse41(ctx);
19868
0
            if v3 == true {
19869
0
                let v4 = &C::put_in_xmm_mem(ctx, arg1);
19870
0
                let v7 = constructor_x64_roundps(ctx, v4, arg2);
19871
0
                // Rule at src/isa/x64/lower.isle line 3559.
19872
0
                return v7;
19873
0
            }
19874
0
            let v18 = constructor_put_in_xmm(ctx, arg1);
19875
0
            let v19 = &constructor_round_libcall(ctx, F32, arg2);
19876
0
            let v20 = C::xmm_to_reg(ctx, v18);
19877
0
            let v21 = C::libcall_1(ctx, v19, v20);
19878
0
            let v22 = C::xmm_new(ctx, v21);
19879
0
            let v23 = &C::xmm_to_xmm_mem(ctx, v18);
19880
0
            let v25 = constructor_x64_pshufd(ctx, v23, 0x1);
19881
0
            let v26 = C::xmm_to_reg(ctx, v25);
19882
0
            let v27 = C::libcall_1(ctx, v19, v26);
19883
0
            let v28 = C::xmm_new(ctx, v27);
19884
0
            let v30 = C::xmm_to_reg(ctx, v28);
19885
0
            let v31 = &constructor_xmm_to_reg_mem(ctx, v30);
19886
0
            let v32 = &C::xmm_mem_to_reg_mem(ctx, v31);
19887
0
            let v33 = constructor_vec_insert_lane(ctx, F32X4, v22, v32, 0x1);
19888
0
            let v34 = &C::xmm_to_xmm_mem(ctx, v18);
19889
0
            let v36 = constructor_x64_pshufd(ctx, v34, 0x2);
19890
0
            let v37 = C::xmm_to_reg(ctx, v36);
19891
0
            let v38 = C::libcall_1(ctx, v19, v37);
19892
0
            let v39 = C::xmm_new(ctx, v38);
19893
0
            let v40 = C::xmm_to_reg(ctx, v39);
19894
0
            let v41 = &constructor_xmm_to_reg_mem(ctx, v40);
19895
0
            let v42 = &C::xmm_mem_to_reg_mem(ctx, v41);
19896
0
            let v43 = constructor_vec_insert_lane(ctx, F32X4, v33, v42, 0x2);
19897
0
            let v44 = &C::xmm_to_xmm_mem(ctx, v18);
19898
0
            let v46 = constructor_x64_pshufd(ctx, v44, 0x3);
19899
0
            let v47 = C::xmm_to_reg(ctx, v46);
19900
0
            let v48 = C::libcall_1(ctx, v19, v47);
19901
0
            let v49 = C::xmm_new(ctx, v48);
19902
0
            let v50 = C::xmm_to_reg(ctx, v49);
19903
0
            let v51 = &constructor_xmm_to_reg_mem(ctx, v50);
19904
0
            let v52 = &C::xmm_mem_to_reg_mem(ctx, v51);
19905
0
            let v53 = constructor_vec_insert_lane(ctx, F32X4, v43, v52, 0x3);
19906
0
            // Rule at src/isa/x64/lower.isle line 3568.
19907
0
            return v53;
19908
        }
19909
        F64X2 => {
19910
0
            let v3 = C::use_sse41(ctx);
19911
0
            if v3 == true {
19912
0
                let v4 = &C::put_in_xmm_mem(ctx, arg1);
19913
0
                let v8 = constructor_x64_roundpd(ctx, v4, arg2);
19914
0
                // Rule at src/isa/x64/lower.isle line 3562.
19915
0
                return v8;
19916
0
            }
19917
0
            let v18 = constructor_put_in_xmm(ctx, arg1);
19918
0
            let v54 = &constructor_round_libcall(ctx, F64, arg2);
19919
0
            let v20 = C::xmm_to_reg(ctx, v18);
19920
0
            let v55 = C::libcall_1(ctx, v54, v20);
19921
0
            let v56 = C::xmm_new(ctx, v55);
19922
0
            let v23 = &C::xmm_to_xmm_mem(ctx, v18);
19923
0
            let v58 = constructor_x64_pshufd(ctx, v23, 0xE);
19924
0
            let v59 = C::xmm_to_reg(ctx, v58);
19925
0
            let v60 = C::libcall_1(ctx, v54, v59);
19926
0
            let v61 = C::xmm_new(ctx, v60);
19927
0
            let v63 = C::xmm_to_reg(ctx, v61);
19928
0
            let v64 = &constructor_xmm_to_reg_mem(ctx, v63);
19929
0
            let v65 = &C::xmm_mem_to_reg_mem(ctx, v64);
19930
0
            let v66 = constructor_vec_insert_lane(ctx, F64X2, v56, v65, 0x1);
19931
0
            // Rule at src/isa/x64/lower.isle line 3581.
19932
0
            return v66;
19933
        }
19934
0
        _ => {}
19935
0
    }
19936
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_round", "src/isa/x64/lower.isle line 3552")
19937
0
}
19938
19939
// Generated as internal constructor for term round_libcall.
19940
0
pub fn constructor_round_libcall<C: Context>(
19941
0
    ctx: &mut C,
19942
0
    arg0: Type,
19943
0
    arg1: &RoundImm,
19944
0
) -> LibCall {
19945
0
    match arg0 {
19946
        F32 => {
19947
0
            match arg1 {
19948
                &RoundImm::RoundNearest => {
19949
                    // Rule at src/isa/x64/lower.isle line 3596.
19950
0
                    return LibCall::NearestF32;
19951
                }
19952
                &RoundImm::RoundDown => {
19953
                    // Rule at src/isa/x64/lower.isle line 3594.
19954
0
                    return LibCall::FloorF32;
19955
                }
19956
                &RoundImm::RoundUp => {
19957
                    // Rule at src/isa/x64/lower.isle line 3592.
19958
0
                    return LibCall::CeilF32;
19959
                }
19960
                &RoundImm::RoundZero => {
19961
                    // Rule at src/isa/x64/lower.isle line 3598.
19962
0
                    return LibCall::TruncF32;
19963
                }
19964
0
                _ => {}
19965
            }
19966
        }
19967
        F64 => {
19968
0
            match arg1 {
19969
                &RoundImm::RoundNearest => {
19970
                    // Rule at src/isa/x64/lower.isle line 3597.
19971
0
                    return LibCall::NearestF64;
19972
                }
19973
                &RoundImm::RoundDown => {
19974
                    // Rule at src/isa/x64/lower.isle line 3595.
19975
0
                    return LibCall::FloorF64;
19976
                }
19977
                &RoundImm::RoundUp => {
19978
                    // Rule at src/isa/x64/lower.isle line 3593.
19979
0
                    return LibCall::CeilF64;
19980
                }
19981
                &RoundImm::RoundZero => {
19982
                    // Rule at src/isa/x64/lower.isle line 3599.
19983
0
                    return LibCall::TruncF64;
19984
                }
19985
0
                _ => {}
19986
            }
19987
        }
19988
0
        _ => {}
19989
    }
19990
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "round_libcall", "src/isa/x64/lower.isle line 3591")
19991
0
}
19992
19993
// Generated as internal constructor for term nonzero_sdiv_divisor.
19994
212
pub fn constructor_nonzero_sdiv_divisor<C: Context>(
19995
212
    ctx: &mut C,
19996
212
    arg0: Type,
19997
212
    arg1: Value,
19998
212
) -> Reg {
19999
212
    let v2 = C::def_inst(ctx, arg1);
20000
212
    if let Some(v3) = v2 {
20001
212
        let v4 = &C::inst_data(ctx, v3);
20002
        if let &InstructionData::UnaryImm {
20003
212
            opcode: ref v5,
20004
212
            imm: v6,
20005
212
        } = v4 {
20006
212
            if let &Opcode::Iconst = v5 {
20007
212
                let v7 = C::safe_divisor_from_imm64(ctx, arg0, v6);
20008
212
                if let Some(v8) = v7 {
20009
212
                    let v9 = constructor_imm(ctx, arg0, v8);
20010
212
                    // Rule at src/isa/x64/lower.isle line 3679.
20011
212
                    return v9;
20012
0
                }
20013
0
            }
20014
0
        }
20015
0
    }
20016
0
    let v10 = C::put_in_reg(ctx, arg1);
20017
0
    let v11 = &C::raw_operand_size_of_type(ctx, arg0);
20018
0
    let v12 = &constructor_reg_to_gpr_mem_imm(ctx, v10);
20019
0
    let v13 = C::gpr_new(ctx, v10);
20020
0
    let v14 = &constructor_x64_test(ctx, v11, v12, v13);
20021
0
    let v17 = &constructor_trap_if(ctx, &CC::Z, &TrapCode::IntegerDivisionByZero);
20022
0
    let v18 = &constructor_with_flags_side_effect(ctx, v14, v17);
20023
0
    let v19 = constructor_side_effect(ctx, v18);
20024
0
    // Rule at src/isa/x64/lower.isle line 3682.
20025
0
    return v10;
20026
212
}